From: Longbin Li <looong.bin@gmail.com>
To: Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Cc: Longbin Li <looong.bin@gmail.com>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
sophgo@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: [PATCH 3/3] riscv: dts: sophgo: add Sophgo SPI NOR controller driver
Date: Mon, 24 Feb 2025 18:12:02 +0800 [thread overview]
Message-ID: <20250224101213.26003-4-looong.bin@gmail.com> (raw)
In-Reply-To: <20250224101213.26003-1-looong.bin@gmail.com>
Add SPI NOR device node for Sophgo.
Signed-off-by: Longbin Li <looong.bin@gmail.com>
---
.../boot/dts/sophgo/sg2044-sophgo-sd3-10.dts | 18 ++++++++++++++
arch/riscv/boot/dts/sophgo/sg2044.dtsi | 24 +++++++++++++++++++
2 files changed, 42 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-sd3-10.dts b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-sd3-10.dts
index c50e61a50013..9c634920f37e 100644
--- a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-sd3-10.dts
+++ b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-sd3-10.dts
@@ -80,6 +80,24 @@ &sd {
status = "okay";
};
+&spifmc0 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
+&spifmc1 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
&uart1 {
status = "okay";
};
diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
index 6eaf92dd0a90..e45f7218de04 100644
--- a/arch/riscv/boot/dts/sophgo/sg2044.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
@@ -33,6 +33,30 @@ soc {
dma-noncoherent;
ranges;
+ spifmc0: spi@7001000000 {
+ compatible = "sophgo,sg2044-spifmc-nor";
+ reg = <0x70 0x01000000 0x0 0x4000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk CLK_GATE_AHB_SPIFMC>;
+ interrupt-parent = <&intc>;
+ interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst RST_SPIFMC0>;
+ status = "disabled";
+ };
+
+ spifmc1: spi@7005000000 {
+ compatible = "sophgo,sg2044-spifmc-nor";
+ reg = <0x70 0x05000000 0x0 0x4000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk CLK_GATE_AHB_SPIFMC>;
+ interrupt-parent = <&intc>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst RST_SPIFMC1>;
+ status = "disabled";
+ };
+
dmac0: dma-controller@7020000000 {
compatible = "snps,axi-dma-1.01a";
reg = <0x70 0x20000000 0x0 0x10000>;
--
2.48.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Longbin Li <looong.bin@gmail.com>
To: Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Cc: Longbin Li <looong.bin@gmail.com>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
sophgo@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: [PATCH 3/3] riscv: dts: sophgo: add Sophgo SPI NOR controller driver
Date: Mon, 24 Feb 2025 18:12:02 +0800 [thread overview]
Message-ID: <20250224101213.26003-4-looong.bin@gmail.com> (raw)
In-Reply-To: <20250224101213.26003-1-looong.bin@gmail.com>
Add SPI NOR device node for Sophgo.
Signed-off-by: Longbin Li <looong.bin@gmail.com>
---
.../boot/dts/sophgo/sg2044-sophgo-sd3-10.dts | 18 ++++++++++++++
arch/riscv/boot/dts/sophgo/sg2044.dtsi | 24 +++++++++++++++++++
2 files changed, 42 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-sd3-10.dts b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-sd3-10.dts
index c50e61a50013..9c634920f37e 100644
--- a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-sd3-10.dts
+++ b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-sd3-10.dts
@@ -80,6 +80,24 @@ &sd {
status = "okay";
};
+&spifmc0 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
+&spifmc1 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
&uart1 {
status = "okay";
};
diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
index 6eaf92dd0a90..e45f7218de04 100644
--- a/arch/riscv/boot/dts/sophgo/sg2044.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
@@ -33,6 +33,30 @@ soc {
dma-noncoherent;
ranges;
+ spifmc0: spi@7001000000 {
+ compatible = "sophgo,sg2044-spifmc-nor";
+ reg = <0x70 0x01000000 0x0 0x4000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk CLK_GATE_AHB_SPIFMC>;
+ interrupt-parent = <&intc>;
+ interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst RST_SPIFMC0>;
+ status = "disabled";
+ };
+
+ spifmc1: spi@7005000000 {
+ compatible = "sophgo,sg2044-spifmc-nor";
+ reg = <0x70 0x05000000 0x0 0x4000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk CLK_GATE_AHB_SPIFMC>;
+ interrupt-parent = <&intc>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst RST_SPIFMC1>;
+ status = "disabled";
+ };
+
dmac0: dma-controller@7020000000 {
compatible = "snps,axi-dma-1.01a";
reg = <0x70 0x20000000 0x0 0x10000>;
--
2.48.1
next prev parent reply other threads:[~2025-02-24 10:22 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-24 10:11 [PATCH 0/3] spi: sophgo: add Sophgo SPI NOR controller driver Longbin Li
2025-02-24 10:11 ` Longbin Li
2025-02-24 10:12 ` [PATCH 1/3] dt-bindings: spi: " Longbin Li
2025-02-24 10:12 ` Longbin Li
2025-02-24 20:28 ` Rob Herring (Arm)
2025-02-24 20:28 ` Rob Herring (Arm)
2025-02-24 10:12 ` [PATCH 2/3] spi: sophgo: " Longbin Li
2025-02-24 10:12 ` Longbin Li
2025-02-24 13:21 ` Yixun Lan
2025-02-24 13:21 ` Yixun Lan
2025-02-24 14:13 ` Mark Brown
2025-02-24 14:13 ` Mark Brown
2025-02-25 2:46 ` Longbin Li
2025-02-25 2:46 ` Longbin Li
2025-02-25 0:39 ` Chen Wang
2025-02-25 0:39 ` Chen Wang
2025-02-24 10:12 ` Longbin Li [this message]
2025-02-24 10:12 ` [PATCH 3/3] riscv: dts: " Longbin Li
2025-02-25 0:23 ` Chen Wang
2025-02-25 0:23 ` Chen Wang
2025-02-25 0:38 ` Inochi Amaoto
2025-02-25 0:38 ` Inochi Amaoto
2025-02-25 0:44 ` Chen Wang
2025-02-25 0:44 ` Chen Wang
2025-02-25 0:58 ` Chen Wang
2025-02-25 0:58 ` Chen Wang
2025-02-25 0:17 ` [PATCH 0/3] spi: " Chen Wang
2025-02-25 0:17 ` Chen Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250224101213.26003-4-looong.bin@gmail.com \
--to=looong.bin@gmail.com \
--cc=aou@eecs.berkeley.edu \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=inochiama@gmail.com \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-spi@vger.kernel.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh@kernel.org \
--cc=sophgo@lists.linux.dev \
--cc=unicorn_wang@outlook.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.