* [PATCH v2 0/5] reset: introduce generic reset-simple controller
@ 2025-02-26 23:42 ` Inochi Amaoto
0 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
Many SoC have a simple reset controller with toggling bit to perform
assert/deassert. It is annoyed to add device id to the reset-simple
driver for each device when coming a new SoC.
This patch series introduce a generic binding to collect devices
match the following requirement:
- There is a single, contiguous range of 32-bit registers.
- All bits in each register directly control a reset line.
- There are no self-deasserting resets.
- There are no timing requirements.
- The bits are exclusively resets, nothing else.
- All bits behave the same, so all reset bits are either
active-high or all are active-low.
- The bits can be read back, but the read status may
be active-low independently from the writes.
If the device follows the requirement, it can set the compatiable
and reuse the provided "reset-simple" as base compatiable without
changing the reset-simple driver with unnecessary new device id.
Add a generic reset-simple controller, and migrate the Sophgo
SG2042 reset controller as an example.
Change from v1:
- https://lore.kernel.org/all/20250213020900.745551-1-inochiama@gmail.com/
1. fix title to mark it introduce new generic device for
reset-simple driver
2. add "active-low" property support for the generic reset-simple
device.
3. patch 1: update the binding description to illustrate the
suitable scenarios to use this binding.
Inochi Amaoto (5):
dt-bindings: reset: add generic bit reset controller
reset: simple: Add active-low property support.
reset: simple: add support generic reset-simple device
dt-bindings: reset: simple: migrate sophgo sg2042 reset controller
riscv: dts: sg2042: Adapt reset generator for new binding
.../bindings/reset/reset-simple.yaml | 66 +++++++++++++++++++
.../bindings/reset/sophgo,sg2042-reset.yaml | 35 ----------
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 3 +-
drivers/reset/reset-simple.c | 7 ++
4 files changed, 75 insertions(+), 36 deletions(-)
create mode 100644 Documentation/devicetree/bindings/reset/reset-simple.yaml
delete mode 100644 Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
--
2.48.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 0/5] reset: introduce generic reset-simple controller
@ 2025-02-26 23:42 ` Inochi Amaoto
0 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
Many SoC have a simple reset controller with toggling bit to perform
assert/deassert. It is annoyed to add device id to the reset-simple
driver for each device when coming a new SoC.
This patch series introduce a generic binding to collect devices
match the following requirement:
- There is a single, contiguous range of 32-bit registers.
- All bits in each register directly control a reset line.
- There are no self-deasserting resets.
- There are no timing requirements.
- The bits are exclusively resets, nothing else.
- All bits behave the same, so all reset bits are either
active-high or all are active-low.
- The bits can be read back, but the read status may
be active-low independently from the writes.
If the device follows the requirement, it can set the compatiable
and reuse the provided "reset-simple" as base compatiable without
changing the reset-simple driver with unnecessary new device id.
Add a generic reset-simple controller, and migrate the Sophgo
SG2042 reset controller as an example.
Change from v1:
- https://lore.kernel.org/all/20250213020900.745551-1-inochiama@gmail.com/
1. fix title to mark it introduce new generic device for
reset-simple driver
2. add "active-low" property support for the generic reset-simple
device.
3. patch 1: update the binding description to illustrate the
suitable scenarios to use this binding.
Inochi Amaoto (5):
dt-bindings: reset: add generic bit reset controller
reset: simple: Add active-low property support.
reset: simple: add support generic reset-simple device
dt-bindings: reset: simple: migrate sophgo sg2042 reset controller
riscv: dts: sg2042: Adapt reset generator for new binding
.../bindings/reset/reset-simple.yaml | 66 +++++++++++++++++++
.../bindings/reset/sophgo,sg2042-reset.yaml | 35 ----------
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 3 +-
drivers/reset/reset-simple.c | 7 ++
4 files changed, 75 insertions(+), 36 deletions(-)
create mode 100644 Documentation/devicetree/bindings/reset/reset-simple.yaml
delete mode 100644 Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
--
2.48.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 1/5] dt-bindings: reset: add generic bit reset controller
2025-02-26 23:42 ` Inochi Amaoto
@ 2025-02-26 23:42 ` Inochi Amaoto
-1 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
Some SoCs from Aspeed, Allwinner, Sophgo and Synopsys have
a simple reset controller by toggling bit. It is a hard time
for each device to add its own compatible to the driver.
Since these devices share a common design, it is possible to
add a common device to reduce these unnecessary change for
the driver.
Add common binding for these kind generic reset controller.
Check the binding description for its requirement and
suitable scenarios.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
.../bindings/reset/reset-simple.yaml | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/reset-simple.yaml
diff --git a/Documentation/devicetree/bindings/reset/reset-simple.yaml b/Documentation/devicetree/bindings/reset/reset-simple.yaml
new file mode 100644
index 000000000000..86c33a608148
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/reset-simple.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/reset-simple.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Generic Bit Reset Controller
+
+maintainers:
+ - Inochi Amaoto <inochiama@gmail.com>
+
+description: |
+ This document defines device tree properties common to reset
+ controller devices that perform assert/deassert by simply
+ toggling bit.
+
+ All devices in this binding should satisfy the following requirement:
+ - There is a single, contiguous range of 32-bit registers.
+ - All bits in each register directly control a reset line.
+ - There are no self-deasserting resets.
+ - There are no timing requirements.
+ - The bits are exclusively resets, nothing else.
+ - All bits behave the same, so all reset bits are either
+ active-high or all are active-low.
+ - The bits can be read back, but the read status may
+ be active-low independently from the writes.
+
+ If the device is not meet the requirement, it should use its
+ own binding to describe the device.
+
+properties:
+ compatible:
+ const: reset-simple
+
+ reg:
+ maxItems: 1
+
+ "#reset-cells":
+ const: 1
+
+ active-low:
+ type: boolean
+ description:
+ If true, bits are cleared to assert the reset. Otherwise,
+ bits are set to assert the reset. This also applies to
+ read back.
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@1000000 {
+ compatible = "reset-simple";
+ reg = <0x1000000 0x1000>;
+ #reset-cells = <1>;
+ };
--
2.48.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 1/5] dt-bindings: reset: add generic bit reset controller
@ 2025-02-26 23:42 ` Inochi Amaoto
0 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
Some SoCs from Aspeed, Allwinner, Sophgo and Synopsys have
a simple reset controller by toggling bit. It is a hard time
for each device to add its own compatible to the driver.
Since these devices share a common design, it is possible to
add a common device to reduce these unnecessary change for
the driver.
Add common binding for these kind generic reset controller.
Check the binding description for its requirement and
suitable scenarios.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
.../bindings/reset/reset-simple.yaml | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/reset-simple.yaml
diff --git a/Documentation/devicetree/bindings/reset/reset-simple.yaml b/Documentation/devicetree/bindings/reset/reset-simple.yaml
new file mode 100644
index 000000000000..86c33a608148
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/reset-simple.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/reset-simple.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Generic Bit Reset Controller
+
+maintainers:
+ - Inochi Amaoto <inochiama@gmail.com>
+
+description: |
+ This document defines device tree properties common to reset
+ controller devices that perform assert/deassert by simply
+ toggling bit.
+
+ All devices in this binding should satisfy the following requirement:
+ - There is a single, contiguous range of 32-bit registers.
+ - All bits in each register directly control a reset line.
+ - There are no self-deasserting resets.
+ - There are no timing requirements.
+ - The bits are exclusively resets, nothing else.
+ - All bits behave the same, so all reset bits are either
+ active-high or all are active-low.
+ - The bits can be read back, but the read status may
+ be active-low independently from the writes.
+
+ If the device is not meet the requirement, it should use its
+ own binding to describe the device.
+
+properties:
+ compatible:
+ const: reset-simple
+
+ reg:
+ maxItems: 1
+
+ "#reset-cells":
+ const: 1
+
+ active-low:
+ type: boolean
+ description:
+ If true, bits are cleared to assert the reset. Otherwise,
+ bits are set to assert the reset. This also applies to
+ read back.
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@1000000 {
+ compatible = "reset-simple";
+ reg = <0x1000000 0x1000>;
+ #reset-cells = <1>;
+ };
--
2.48.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 2/5] reset: simple: Add active-low property support.
2025-02-26 23:42 ` Inochi Amaoto
@ 2025-02-26 23:42 ` Inochi Amaoto
-1 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
Introduce "active-low" property support for the reset-simple driver.
This property allow users to mark the reset device is active low
without adding a new device id in the driver.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
drivers/reset/reset-simple.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 276067839830..4b08f8d70942 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -16,6 +16,7 @@
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of.h>
+#include <linux/property.h>
#include <linux/platform_device.h>
#include <linux/reset-controller.h>
#include <linux/reset/reset-simple.h>
@@ -190,6 +191,11 @@ static int reset_simple_probe(struct platform_device *pdev)
data->status_active_low = devdata->status_active_low;
}
+ if (device_property_present(dev, "active-low")) {
+ data->active_low = true;
+ data->status_active_low = true;
+ }
+
data->membase += reg_offset;
return devm_reset_controller_register(dev, &data->rcdev);
--
2.48.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 2/5] reset: simple: Add active-low property support.
@ 2025-02-26 23:42 ` Inochi Amaoto
0 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
Introduce "active-low" property support for the reset-simple driver.
This property allow users to mark the reset device is active low
without adding a new device id in the driver.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
drivers/reset/reset-simple.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 276067839830..4b08f8d70942 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -16,6 +16,7 @@
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of.h>
+#include <linux/property.h>
#include <linux/platform_device.h>
#include <linux/reset-controller.h>
#include <linux/reset/reset-simple.h>
@@ -190,6 +191,11 @@ static int reset_simple_probe(struct platform_device *pdev)
data->status_active_low = devdata->status_active_low;
}
+ if (device_property_present(dev, "active-low")) {
+ data->active_low = true;
+ data->status_active_low = true;
+ }
+
data->membase += reg_offset;
return devm_reset_controller_register(dev, &data->rcdev);
--
2.48.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 3/5] reset: simple: add support generic reset-simple device
2025-02-26 23:42 ` Inochi Amaoto
@ 2025-02-26 23:42 ` Inochi Amaoto
-1 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
Add support for generic bit reset device.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
drivers/reset/reset-simple.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 4b08f8d70942..0681f2db7459 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -149,6 +149,7 @@ static const struct of_device_id reset_simple_dt_ids[] = {
.data = &reset_simple_active_low },
{ .compatible = "brcm,bcm4908-misc-pcie-reset",
.data = &reset_simple_active_low },
+ { .compatible = "reset-simple" },
{ .compatible = "snps,dw-high-reset" },
{ .compatible = "snps,dw-low-reset",
.data = &reset_simple_active_low },
--
2.48.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 3/5] reset: simple: add support generic reset-simple device
@ 2025-02-26 23:42 ` Inochi Amaoto
0 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
Add support for generic bit reset device.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
drivers/reset/reset-simple.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 4b08f8d70942..0681f2db7459 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -149,6 +149,7 @@ static const struct of_device_id reset_simple_dt_ids[] = {
.data = &reset_simple_active_low },
{ .compatible = "brcm,bcm4908-misc-pcie-reset",
.data = &reset_simple_active_low },
+ { .compatible = "reset-simple" },
{ .compatible = "snps,dw-high-reset" },
{ .compatible = "snps,dw-low-reset",
.data = &reset_simple_active_low },
--
2.48.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 4/5] dt-bindings: reset: simple: migrate sophgo sg2042 reset controller
2025-02-26 23:42 ` Inochi Amaoto
@ 2025-02-26 23:42 ` Inochi Amaoto
-1 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
Migrate SG2042 reset controller to reuse the simple device binding.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
.../bindings/reset/reset-simple.yaml | 7 +++-
.../bindings/reset/sophgo,sg2042-reset.yaml | 35 -------------------
2 files changed, 6 insertions(+), 36 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
diff --git a/Documentation/devicetree/bindings/reset/reset-simple.yaml b/Documentation/devicetree/bindings/reset/reset-simple.yaml
index 86c33a608148..644884206ee4 100644
--- a/Documentation/devicetree/bindings/reset/reset-simple.yaml
+++ b/Documentation/devicetree/bindings/reset/reset-simple.yaml
@@ -30,7 +30,12 @@ description: |
properties:
compatible:
- const: reset-simple
+ oneOf:
+ - items:
+ - enum:
+ - sophgo,sg2042-reset
+ - const: reset-simple
+ - const: reset-simple
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml b/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
deleted file mode 100644
index 76e1931f0908..000000000000
--- a/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
+++ /dev/null
@@ -1,35 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/reset/sophgo,sg2042-reset.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Sophgo SG2042 SoC Reset Controller
-
-maintainers:
- - Chen Wang <unicorn_wang@outlook.com>
-
-properties:
- compatible:
- const: sophgo,sg2042-reset
-
- reg:
- maxItems: 1
-
- "#reset-cells":
- const: 1
-
-required:
- - compatible
- - reg
- - "#reset-cells"
-
-additionalProperties: false
-
-examples:
- - |
- rstgen: reset-controller@c00 {
- compatible = "sophgo,sg2042-reset";
- reg = <0xc00 0xc>;
- #reset-cells = <1>;
- };
--
2.48.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 4/5] dt-bindings: reset: simple: migrate sophgo sg2042 reset controller
@ 2025-02-26 23:42 ` Inochi Amaoto
0 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
Migrate SG2042 reset controller to reuse the simple device binding.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
.../bindings/reset/reset-simple.yaml | 7 +++-
.../bindings/reset/sophgo,sg2042-reset.yaml | 35 -------------------
2 files changed, 6 insertions(+), 36 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
diff --git a/Documentation/devicetree/bindings/reset/reset-simple.yaml b/Documentation/devicetree/bindings/reset/reset-simple.yaml
index 86c33a608148..644884206ee4 100644
--- a/Documentation/devicetree/bindings/reset/reset-simple.yaml
+++ b/Documentation/devicetree/bindings/reset/reset-simple.yaml
@@ -30,7 +30,12 @@ description: |
properties:
compatible:
- const: reset-simple
+ oneOf:
+ - items:
+ - enum:
+ - sophgo,sg2042-reset
+ - const: reset-simple
+ - const: reset-simple
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml b/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
deleted file mode 100644
index 76e1931f0908..000000000000
--- a/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml
+++ /dev/null
@@ -1,35 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/reset/sophgo,sg2042-reset.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Sophgo SG2042 SoC Reset Controller
-
-maintainers:
- - Chen Wang <unicorn_wang@outlook.com>
-
-properties:
- compatible:
- const: sophgo,sg2042-reset
-
- reg:
- maxItems: 1
-
- "#reset-cells":
- const: 1
-
-required:
- - compatible
- - reg
- - "#reset-cells"
-
-additionalProperties: false
-
-examples:
- - |
- rstgen: reset-controller@c00 {
- compatible = "sophgo,sg2042-reset";
- reg = <0xc00 0xc>;
- #reset-cells = <1>;
- };
--
2.48.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 5/5] riscv: dts: sg2042: Adapt reset generator for new binding
2025-02-26 23:42 ` Inochi Amaoto
@ 2025-02-26 23:42 ` Inochi Amaoto
-1 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
As the SG2042 reset controller reuse new binding, change the device
compatible with new string.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index e62ac51ac55a..2be10cbba0ce 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -499,9 +499,10 @@ intc: interrupt-controller@7090000000 {
};
rstgen: reset-controller@7030013000 {
- compatible = "sophgo,sg2042-reset";
+ compatible = "sophgo,sg2042-reset", "reset-simple";
reg = <0x00000070 0x30013000 0x00000000 0x0000000c>;
#reset-cells = <1>;
+ active-low;
};
uart0: serial@7040000000 {
--
2.48.1
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 5/5] riscv: dts: sg2042: Adapt reset generator for new binding
@ 2025-02-26 23:42 ` Inochi Amaoto
0 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-26 23:42 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Uwe Kleine-König, Guo Ren
Cc: devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
As the SG2042 reset controller reuse new binding, change the device
compatible with new string.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index e62ac51ac55a..2be10cbba0ce 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -499,9 +499,10 @@ intc: interrupt-controller@7090000000 {
};
rstgen: reset-controller@7030013000 {
- compatible = "sophgo,sg2042-reset";
+ compatible = "sophgo,sg2042-reset", "reset-simple";
reg = <0x00000070 0x30013000 0x00000000 0x0000000c>;
#reset-cells = <1>;
+ active-low;
};
uart0: serial@7040000000 {
--
2.48.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/5] dt-bindings: reset: add generic bit reset controller
2025-02-26 23:42 ` Inochi Amaoto
@ 2025-02-27 13:35 ` Rob Herring
-1 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2025-02-27 13:35 UTC (permalink / raw)
To: Inochi Amaoto
Cc: Philipp Zabel, Krzysztof Kozlowski, Conor Dooley, Chen Wang,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Uwe Kleine-König,
Guo Ren, devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
On Thu, Feb 27, 2025 at 07:42:29AM +0800, Inochi Amaoto wrote:
> Some SoCs from Aspeed, Allwinner, Sophgo and Synopsys have
> a simple reset controller by toggling bit. It is a hard time
> for each device to add its own compatible to the driver.
It's a 1 line change. That isn't hard.
> Since these devices share a common design, it is possible to
> add a common device to reduce these unnecessary change for
> the driver.
>
> Add common binding for these kind generic reset controller.
> Check the binding description for its requirement and
> suitable scenarios.
We generally don't want 1 register per node type bindings. That level of
detail in DT has proven impossible to get right.
Rob
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/5] dt-bindings: reset: add generic bit reset controller
@ 2025-02-27 13:35 ` Rob Herring
0 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2025-02-27 13:35 UTC (permalink / raw)
To: Inochi Amaoto
Cc: Philipp Zabel, Krzysztof Kozlowski, Conor Dooley, Chen Wang,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Uwe Kleine-König,
Guo Ren, devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
On Thu, Feb 27, 2025 at 07:42:29AM +0800, Inochi Amaoto wrote:
> Some SoCs from Aspeed, Allwinner, Sophgo and Synopsys have
> a simple reset controller by toggling bit. It is a hard time
> for each device to add its own compatible to the driver.
It's a 1 line change. That isn't hard.
> Since these devices share a common design, it is possible to
> add a common device to reduce these unnecessary change for
> the driver.
>
> Add common binding for these kind generic reset controller.
> Check the binding description for its requirement and
> suitable scenarios.
We generally don't want 1 register per node type bindings. That level of
detail in DT has proven impossible to get right.
Rob
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/5] dt-bindings: reset: add generic bit reset controller
2025-02-27 13:35 ` Rob Herring
@ 2025-02-28 0:39 ` Inochi Amaoto
-1 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-28 0:39 UTC (permalink / raw)
To: Rob Herring, Inochi Amaoto
Cc: Philipp Zabel, Krzysztof Kozlowski, Conor Dooley, Chen Wang,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Uwe Kleine-König,
Guo Ren, devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
On Thu, Feb 27, 2025 at 07:35:09AM -0600, Rob Herring wrote:
> On Thu, Feb 27, 2025 at 07:42:29AM +0800, Inochi Amaoto wrote:
> > Some SoCs from Aspeed, Allwinner, Sophgo and Synopsys have
> > a simple reset controller by toggling bit. It is a hard time
> > for each device to add its own compatible to the driver.
>
> It's a 1 line change. That isn't hard.
>
Yeah, it is not hard. But it is annoying and sometimes
I felt it is a waste of time to add a device id to the
reset-simple driver.
> > Since these devices share a common design, it is possible to
> > add a common device to reduce these unnecessary change for
> > the driver.
> >
> > Add common binding for these kind generic reset controller.
> > Check the binding description for its requirement and
> > suitable scenarios.
>
> We generally don't want 1 register per node type bindings. That level of
> detail in DT has proven impossible to get right.
>
> Rob
It is not 1 register per node, but a contiguous range.
In most SoC satisfy the requirement, only one reset
device is added. This is what the reset-simple handle.
1 register per node is too crazy for everyone....
Regards,
Inochi
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/5] dt-bindings: reset: add generic bit reset controller
@ 2025-02-28 0:39 ` Inochi Amaoto
0 siblings, 0 replies; 16+ messages in thread
From: Inochi Amaoto @ 2025-02-28 0:39 UTC (permalink / raw)
To: Rob Herring, Inochi Amaoto
Cc: Philipp Zabel, Krzysztof Kozlowski, Conor Dooley, Chen Wang,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Uwe Kleine-König,
Guo Ren, devicetree, linux-kernel, sophgo, linux-riscv, Yixun Lan,
Longbin Li
On Thu, Feb 27, 2025 at 07:35:09AM -0600, Rob Herring wrote:
> On Thu, Feb 27, 2025 at 07:42:29AM +0800, Inochi Amaoto wrote:
> > Some SoCs from Aspeed, Allwinner, Sophgo and Synopsys have
> > a simple reset controller by toggling bit. It is a hard time
> > for each device to add its own compatible to the driver.
>
> It's a 1 line change. That isn't hard.
>
Yeah, it is not hard. But it is annoying and sometimes
I felt it is a waste of time to add a device id to the
reset-simple driver.
> > Since these devices share a common design, it is possible to
> > add a common device to reduce these unnecessary change for
> > the driver.
> >
> > Add common binding for these kind generic reset controller.
> > Check the binding description for its requirement and
> > suitable scenarios.
>
> We generally don't want 1 register per node type bindings. That level of
> detail in DT has proven impossible to get right.
>
> Rob
It is not 1 register per node, but a contiguous range.
In most SoC satisfy the requirement, only one reset
device is added. This is what the reset-simple handle.
1 register per node is too crazy for everyone....
Regards,
Inochi
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2025-02-28 0:39 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-26 23:42 [PATCH v2 0/5] reset: introduce generic reset-simple controller Inochi Amaoto
2025-02-26 23:42 ` Inochi Amaoto
2025-02-26 23:42 ` [PATCH v2 1/5] dt-bindings: reset: add generic bit reset controller Inochi Amaoto
2025-02-26 23:42 ` Inochi Amaoto
2025-02-27 13:35 ` Rob Herring
2025-02-27 13:35 ` Rob Herring
2025-02-28 0:39 ` Inochi Amaoto
2025-02-28 0:39 ` Inochi Amaoto
2025-02-26 23:42 ` [PATCH v2 2/5] reset: simple: Add active-low property support Inochi Amaoto
2025-02-26 23:42 ` Inochi Amaoto
2025-02-26 23:42 ` [PATCH v2 3/5] reset: simple: add support generic reset-simple device Inochi Amaoto
2025-02-26 23:42 ` Inochi Amaoto
2025-02-26 23:42 ` [PATCH v2 4/5] dt-bindings: reset: simple: migrate sophgo sg2042 reset controller Inochi Amaoto
2025-02-26 23:42 ` Inochi Amaoto
2025-02-26 23:42 ` [PATCH v2 5/5] riscv: dts: sg2042: Adapt reset generator for new binding Inochi Amaoto
2025-02-26 23:42 ` Inochi Amaoto
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