* [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+
@ 2025-03-06 3:15 Jessica Zhang
2025-03-06 5:06 ` Abhinav Kumar
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Jessica Zhang @ 2025-03-06 3:15 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Sean Paul, Marijn Suijten,
David Airlie, Simona Vetter
Cc: Abhinav Kumar, linux-arm-msm, dri-devel, freedreno, linux-kernel,
Jessica Zhang
Now that CDM_0 has been enabled for DPU 5.x+, add support for YUV formats
on writeback
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 4 ++--
12 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
index 85fde7243dd4..6ac97c378056 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
@@ -343,8 +343,8 @@ static const struct dpu_wb_cfg sm8650_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.xin_id = 6,
.vbif_idx = VBIF_RT,
.maxlinewidth = 4096,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
index 23188290001f..979527d98fbc 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
@@ -298,8 +298,8 @@ static const struct dpu_wb_cfg sm8150_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.clk_ctrl = DPU_CLK_CTRL_WB2,
.xin_id = 6,
.vbif_idx = VBIF_RT,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
index de8ccf589f1f..d76b8992a6c1 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
@@ -305,8 +305,8 @@ static const struct dpu_wb_cfg sc8180x_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.clk_ctrl = DPU_CLK_CTRL_WB2,
.xin_id = 6,
.vbif_idx = VBIF_RT,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
index b2ebf76e3867..83db11339b29 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
@@ -261,8 +261,8 @@ static const struct dpu_wb_cfg sm7150_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.clk_ctrl = DPU_CLK_CTRL_WB2,
.xin_id = 6,
.vbif_idx = VBIF_RT,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
index 2b4aea177bca..da11830d4407 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
@@ -168,8 +168,8 @@ static const struct dpu_wb_cfg sm6150_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.clk_ctrl = DPU_CLK_CTRL_WB2,
.xin_id = 6,
.vbif_idx = VBIF_RT,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
index cc2951112bda..d3d3a34d0b45 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
@@ -145,8 +145,8 @@ static const struct dpu_wb_cfg sm6125_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.clk_ctrl = DPU_CLK_CTRL_WB2,
.xin_id = 6,
.vbif_idx = VBIF_RT,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
index 42a00550eefb..040c94c0bb66 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
@@ -157,8 +157,8 @@ static const struct dpu_wb_cfg sc7180_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.clk_ctrl = DPU_CLK_CTRL_WB2,
.xin_id = 6,
.vbif_idx = VBIF_RT,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
index 828a02429405..397278ba999b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
@@ -151,8 +151,8 @@ static const struct dpu_wb_cfg sm6350_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.clk_ctrl = DPU_CLK_CTRL_WB2,
.xin_id = 6,
.vbif_idx = VBIF_RT,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
index 795e9ebf8c11..0c860e804cab 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
@@ -305,8 +305,8 @@ static const struct dpu_wb_cfg sm8350_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.clk_ctrl = DPU_CLK_CTRL_WB2,
.xin_id = 6,
.vbif_idx = VBIF_RT,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
index 048dfb9dbb60..19b2ee8bbd5f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
@@ -321,8 +321,8 @@ static const struct dpu_wb_cfg sm8450_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.clk_ctrl = DPU_CLK_CTRL_WB2,
.xin_id = 6,
.vbif_idx = VBIF_RT,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
index a5b90e5e3120..24f988465bf6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
@@ -317,8 +317,8 @@ static const struct dpu_wb_cfg sm8550_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.xin_id = 6,
.vbif_idx = VBIF_RT,
.maxlinewidth = 4096,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
index 8977fa48926b..6417baa84f82 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
@@ -317,8 +317,8 @@ static const struct dpu_wb_cfg x1e80100_wb[] = {
.name = "wb_2", .id = WB_2,
.base = 0x65000, .len = 0x2c8,
.features = WB_SM8250_MASK,
- .format_list = wb2_formats_rgb,
- .num_formats = ARRAY_SIZE(wb2_formats_rgb),
+ .format_list = wb2_formats_rgb_yuv,
+ .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
.xin_id = 6,
.vbif_idx = VBIF_RT,
.maxlinewidth = 4096,
---
base-commit: 6d3175a72cc07e90f81fb35841048a8a9b5134cb
change-id: 20250305-cdm-yuv-fix-ef1cb4ff5c0a
Best regards,
--
Jessica Zhang <quic_jesszhan@quicinc.com>
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+
2025-03-06 3:15 [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+ Jessica Zhang
@ 2025-03-06 5:06 ` Abhinav Kumar
2025-03-06 6:48 ` Dmitry Baryshkov
2025-03-07 10:20 ` kernel test robot
2025-03-07 12:30 ` kernel test robot
2 siblings, 1 reply; 5+ messages in thread
From: Abhinav Kumar @ 2025-03-06 5:06 UTC (permalink / raw)
To: Jessica Zhang, Rob Clark, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
On 3/5/2025 7:15 PM, Jessica Zhang wrote:
> Now that CDM_0 has been enabled for DPU 5.x+, add support for YUV formats
> on writeback
>
> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 4 ++--
> 12 files changed, 24 insertions(+), 24 deletions(-)
>
Good catch!
Fixes: 15f2825defeb ("drm/msm/dpu: enable CDM_0 for DPUs 5.x+")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+
2025-03-06 5:06 ` Abhinav Kumar
@ 2025-03-06 6:48 ` Dmitry Baryshkov
0 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2025-03-06 6:48 UTC (permalink / raw)
To: Abhinav Kumar
Cc: Jessica Zhang, Rob Clark, Sean Paul, Marijn Suijten, David Airlie,
Simona Vetter, linux-arm-msm, dri-devel, freedreno, linux-kernel
On Wed, Mar 05, 2025 at 09:06:08PM -0800, Abhinav Kumar wrote:
>
>
> On 3/5/2025 7:15 PM, Jessica Zhang wrote:
> > Now that CDM_0 has been enabled for DPU 5.x+, add support for YUV formats
> > on writeback
> >
> > Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 4 ++--
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 4 ++--
> > 12 files changed, 24 insertions(+), 24 deletions(-)
> >
>
> Good catch!
>
> Fixes: 15f2825defeb ("drm/msm/dpu: enable CDM_0 for DPUs 5.x+")
Again, this adds new feature, it's not a fix. There is nothing wrong
with the current tree.
For the patch:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+
2025-03-06 3:15 [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+ Jessica Zhang
2025-03-06 5:06 ` Abhinav Kumar
@ 2025-03-07 10:20 ` kernel test robot
2025-03-07 12:30 ` kernel test robot
2 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2025-03-07 10:20 UTC (permalink / raw)
To: Jessica Zhang; +Cc: llvm, oe-kbuild-all
Hi Jessica,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 6d3175a72cc07e90f81fb35841048a8a9b5134cb]
url: https://github.com/intel-lab-lkp/linux/commits/Jessica-Zhang/drm-msm-dpu-Support-YUV-formats-on-writeback-for-DPU-5-x/20250306-111647
base: 6d3175a72cc07e90f81fb35841048a8a9b5134cb
patch link: https://lore.kernel.org/r/20250305-cdm-yuv-fix-v1-1-5f1dd8ecf76c%40quicinc.com
patch subject: [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+
config: arm-randconfig-001-20250307 (https://download.01.org/0day-ci/archive/20250307/202503071857.oZbQsPaE-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project e15545cad8297ec7555f26e5ae74a9f0511203e7)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250307/202503071857.oZbQsPaE-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503071857.oZbQsPaE-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c:235:18: warning: unused variable 'wb2_formats_rgb' [-Wunused-const-variable]
235 | static const u32 wb2_formats_rgb[] = {
| ^~~~~~~~~~~~~~~
1 warning generated.
vim +/wb2_formats_rgb +235 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
dabfdd89eaa9283 Vinod Polimera 2022-04-11 234
8c16b988ba2d3df Abhinav Kumar 2023-12-12 @235 static const u32 wb2_formats_rgb[] = {
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 236 DRM_FORMAT_RGB565,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 237 DRM_FORMAT_BGR565,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 238 DRM_FORMAT_RGB888,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 239 DRM_FORMAT_ARGB8888,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 240 DRM_FORMAT_RGBA8888,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 241 DRM_FORMAT_ABGR8888,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 242 DRM_FORMAT_XRGB8888,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 243 DRM_FORMAT_RGBX8888,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 244 DRM_FORMAT_XBGR8888,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 245 DRM_FORMAT_ARGB1555,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 246 DRM_FORMAT_RGBA5551,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 247 DRM_FORMAT_XRGB1555,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 248 DRM_FORMAT_RGBX5551,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 249 DRM_FORMAT_ARGB4444,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 250 DRM_FORMAT_RGBA4444,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 251 DRM_FORMAT_RGBX4444,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 252 DRM_FORMAT_XRGB4444,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 253 DRM_FORMAT_BGR888,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 254 DRM_FORMAT_BGRA8888,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 255 DRM_FORMAT_BGRX8888,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 256 DRM_FORMAT_ABGR1555,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 257 DRM_FORMAT_BGRA5551,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 258 DRM_FORMAT_XBGR1555,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 259 DRM_FORMAT_BGRX5551,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 260 DRM_FORMAT_ABGR4444,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 261 DRM_FORMAT_BGRA4444,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 262 DRM_FORMAT_BGRX4444,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 263 DRM_FORMAT_XBGR4444,
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 264 };
53324b99bd7b4d6 Abhinav Kumar 2022-04-26 265
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+
2025-03-06 3:15 [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+ Jessica Zhang
2025-03-06 5:06 ` Abhinav Kumar
2025-03-07 10:20 ` kernel test robot
@ 2025-03-07 12:30 ` kernel test robot
2 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2025-03-07 12:30 UTC (permalink / raw)
To: Jessica Zhang; +Cc: oe-kbuild-all
Hi Jessica,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 6d3175a72cc07e90f81fb35841048a8a9b5134cb]
url: https://github.com/intel-lab-lkp/linux/commits/Jessica-Zhang/drm-msm-dpu-Support-YUV-formats-on-writeback-for-DPU-5-x/20250306-111647
base: 6d3175a72cc07e90f81fb35841048a8a9b5134cb
patch link: https://lore.kernel.org/r/20250305-cdm-yuv-fix-v1-1-5f1dd8ecf76c%40quicinc.com
patch subject: [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+
config: loongarch-allyesconfig (https://download.01.org/0day-ci/archive/20250307/202503072004.KTOFOoOq-lkp@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250307/202503072004.KTOFOoOq-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503072004.KTOFOoOq-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c:235:18: warning: 'wb2_formats_rgb' defined but not used [-Wunused-const-variable=]
235 | static const u32 wb2_formats_rgb[] = {
| ^~~~~~~~~~~~~~~
vim +/wb2_formats_rgb +235 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
dabfdd89eaa928 Vinod Polimera 2022-04-11 234
8c16b988ba2d3d Abhinav Kumar 2023-12-12 @235 static const u32 wb2_formats_rgb[] = {
53324b99bd7b4d Abhinav Kumar 2022-04-26 236 DRM_FORMAT_RGB565,
53324b99bd7b4d Abhinav Kumar 2022-04-26 237 DRM_FORMAT_BGR565,
53324b99bd7b4d Abhinav Kumar 2022-04-26 238 DRM_FORMAT_RGB888,
53324b99bd7b4d Abhinav Kumar 2022-04-26 239 DRM_FORMAT_ARGB8888,
53324b99bd7b4d Abhinav Kumar 2022-04-26 240 DRM_FORMAT_RGBA8888,
53324b99bd7b4d Abhinav Kumar 2022-04-26 241 DRM_FORMAT_ABGR8888,
53324b99bd7b4d Abhinav Kumar 2022-04-26 242 DRM_FORMAT_XRGB8888,
53324b99bd7b4d Abhinav Kumar 2022-04-26 243 DRM_FORMAT_RGBX8888,
53324b99bd7b4d Abhinav Kumar 2022-04-26 244 DRM_FORMAT_XBGR8888,
53324b99bd7b4d Abhinav Kumar 2022-04-26 245 DRM_FORMAT_ARGB1555,
53324b99bd7b4d Abhinav Kumar 2022-04-26 246 DRM_FORMAT_RGBA5551,
53324b99bd7b4d Abhinav Kumar 2022-04-26 247 DRM_FORMAT_XRGB1555,
53324b99bd7b4d Abhinav Kumar 2022-04-26 248 DRM_FORMAT_RGBX5551,
53324b99bd7b4d Abhinav Kumar 2022-04-26 249 DRM_FORMAT_ARGB4444,
53324b99bd7b4d Abhinav Kumar 2022-04-26 250 DRM_FORMAT_RGBA4444,
53324b99bd7b4d Abhinav Kumar 2022-04-26 251 DRM_FORMAT_RGBX4444,
53324b99bd7b4d Abhinav Kumar 2022-04-26 252 DRM_FORMAT_XRGB4444,
53324b99bd7b4d Abhinav Kumar 2022-04-26 253 DRM_FORMAT_BGR888,
53324b99bd7b4d Abhinav Kumar 2022-04-26 254 DRM_FORMAT_BGRA8888,
53324b99bd7b4d Abhinav Kumar 2022-04-26 255 DRM_FORMAT_BGRX8888,
53324b99bd7b4d Abhinav Kumar 2022-04-26 256 DRM_FORMAT_ABGR1555,
53324b99bd7b4d Abhinav Kumar 2022-04-26 257 DRM_FORMAT_BGRA5551,
53324b99bd7b4d Abhinav Kumar 2022-04-26 258 DRM_FORMAT_XBGR1555,
53324b99bd7b4d Abhinav Kumar 2022-04-26 259 DRM_FORMAT_BGRX5551,
53324b99bd7b4d Abhinav Kumar 2022-04-26 260 DRM_FORMAT_ABGR4444,
53324b99bd7b4d Abhinav Kumar 2022-04-26 261 DRM_FORMAT_BGRA4444,
53324b99bd7b4d Abhinav Kumar 2022-04-26 262 DRM_FORMAT_BGRX4444,
53324b99bd7b4d Abhinav Kumar 2022-04-26 263 DRM_FORMAT_XBGR4444,
53324b99bd7b4d Abhinav Kumar 2022-04-26 264 };
53324b99bd7b4d Abhinav Kumar 2022-04-26 265
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2025-03-07 12:31 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-03-06 3:15 [PATCH] drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+ Jessica Zhang
2025-03-06 5:06 ` Abhinav Kumar
2025-03-06 6:48 ` Dmitry Baryshkov
2025-03-07 10:20 ` kernel test robot
2025-03-07 12:30 ` kernel test robot
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.