From: Andrew Jones <ajones@ventanamicro.com>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org,
Samuel Holland <samuel.holland@sifive.com>
Subject: Re: [PATCH v3 05/17] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing
Date: Thu, 13 Mar 2025 13:57:32 +0100 [thread overview]
Message-ID: <20250313-311b94f9bafe73bcd41158a1@orel> (raw)
In-Reply-To: <20250310151229.2365992-6-cleger@rivosinc.com>
On Mon, Mar 10, 2025 at 04:12:12PM +0100, Clément Léger wrote:
> schedule_on_each_cpu() was used without any good reason while documented
> as very slow. This call was in the boot path, so better use
> on_each_cpu() for scalar misaligned checking. Vector misaligned check
> still needs to use schedule_on_each_cpu() since it requires irqs to be
> enabled but that's less of a problem since this code is ran in a kthread.
> Add a comment to explicit that.
>
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> ---
> arch/riscv/kernel/traps_misaligned.c | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
> index 90ac74191357..ffac424faa88 100644
> --- a/arch/riscv/kernel/traps_misaligned.c
> +++ b/arch/riscv/kernel/traps_misaligned.c
> @@ -616,6 +616,11 @@ bool check_vector_unaligned_access_emulated_all_cpus(void)
> return false;
> }
>
> + /*
> + * While being documented as very slow, schedule_on_each_cpu() is used
> + * since kernel_vector_begin() that is called inside the vector code
> + * expects irqs to be enabled or it will panic().
which expects
> + */
> schedule_on_each_cpu(check_vector_unaligned_access_emulated);
>
> for_each_online_cpu(cpu)
> @@ -636,7 +641,7 @@ bool check_vector_unaligned_access_emulated_all_cpus(void)
>
> static bool unaligned_ctl __read_mostly;
>
> -static void check_unaligned_access_emulated(struct work_struct *work __always_unused)
> +static void check_unaligned_access_emulated(void *arg __always_unused)
> {
> int cpu = smp_processor_id();
> long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu);
> @@ -677,7 +682,7 @@ bool check_unaligned_access_emulated_all_cpus(void)
> * accesses emulated since tasks requesting such control can run on any
> * CPU.
> */
> - schedule_on_each_cpu(check_unaligned_access_emulated);
> + on_each_cpu(check_unaligned_access_emulated, NULL, 1);
>
> for_each_online_cpu(cpu)
> if (per_cpu(misaligned_access_speed, cpu)
> --
> 2.47.2
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
--
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org,
Samuel Holland <samuel.holland@sifive.com>
Subject: Re: [PATCH v3 05/17] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing
Date: Thu, 13 Mar 2025 13:57:32 +0100 [thread overview]
Message-ID: <20250313-311b94f9bafe73bcd41158a1@orel> (raw)
In-Reply-To: <20250310151229.2365992-6-cleger@rivosinc.com>
On Mon, Mar 10, 2025 at 04:12:12PM +0100, Clément Léger wrote:
> schedule_on_each_cpu() was used without any good reason while documented
> as very slow. This call was in the boot path, so better use
> on_each_cpu() for scalar misaligned checking. Vector misaligned check
> still needs to use schedule_on_each_cpu() since it requires irqs to be
> enabled but that's less of a problem since this code is ran in a kthread.
> Add a comment to explicit that.
>
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> ---
> arch/riscv/kernel/traps_misaligned.c | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
> index 90ac74191357..ffac424faa88 100644
> --- a/arch/riscv/kernel/traps_misaligned.c
> +++ b/arch/riscv/kernel/traps_misaligned.c
> @@ -616,6 +616,11 @@ bool check_vector_unaligned_access_emulated_all_cpus(void)
> return false;
> }
>
> + /*
> + * While being documented as very slow, schedule_on_each_cpu() is used
> + * since kernel_vector_begin() that is called inside the vector code
> + * expects irqs to be enabled or it will panic().
which expects
> + */
> schedule_on_each_cpu(check_vector_unaligned_access_emulated);
>
> for_each_online_cpu(cpu)
> @@ -636,7 +641,7 @@ bool check_vector_unaligned_access_emulated_all_cpus(void)
>
> static bool unaligned_ctl __read_mostly;
>
> -static void check_unaligned_access_emulated(struct work_struct *work __always_unused)
> +static void check_unaligned_access_emulated(void *arg __always_unused)
> {
> int cpu = smp_processor_id();
> long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu);
> @@ -677,7 +682,7 @@ bool check_unaligned_access_emulated_all_cpus(void)
> * accesses emulated since tasks requesting such control can run on any
> * CPU.
> */
> - schedule_on_each_cpu(check_unaligned_access_emulated);
> + on_each_cpu(check_unaligned_access_emulated, NULL, 1);
>
> for_each_online_cpu(cpu)
> if (per_cpu(misaligned_access_speed, cpu)
> --
> 2.47.2
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org,
Samuel Holland <samuel.holland@sifive.com>
Subject: Re: [PATCH v3 05/17] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing
Date: Thu, 13 Mar 2025 13:57:32 +0100 [thread overview]
Message-ID: <20250313-311b94f9bafe73bcd41158a1@orel> (raw)
In-Reply-To: <20250310151229.2365992-6-cleger@rivosinc.com>
On Mon, Mar 10, 2025 at 04:12:12PM +0100, Clément Léger wrote:
> schedule_on_each_cpu() was used without any good reason while documented
> as very slow. This call was in the boot path, so better use
> on_each_cpu() for scalar misaligned checking. Vector misaligned check
> still needs to use schedule_on_each_cpu() since it requires irqs to be
> enabled but that's less of a problem since this code is ran in a kthread.
> Add a comment to explicit that.
>
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> ---
> arch/riscv/kernel/traps_misaligned.c | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
> index 90ac74191357..ffac424faa88 100644
> --- a/arch/riscv/kernel/traps_misaligned.c
> +++ b/arch/riscv/kernel/traps_misaligned.c
> @@ -616,6 +616,11 @@ bool check_vector_unaligned_access_emulated_all_cpus(void)
> return false;
> }
>
> + /*
> + * While being documented as very slow, schedule_on_each_cpu() is used
> + * since kernel_vector_begin() that is called inside the vector code
> + * expects irqs to be enabled or it will panic().
which expects
> + */
> schedule_on_each_cpu(check_vector_unaligned_access_emulated);
>
> for_each_online_cpu(cpu)
> @@ -636,7 +641,7 @@ bool check_vector_unaligned_access_emulated_all_cpus(void)
>
> static bool unaligned_ctl __read_mostly;
>
> -static void check_unaligned_access_emulated(struct work_struct *work __always_unused)
> +static void check_unaligned_access_emulated(void *arg __always_unused)
> {
> int cpu = smp_processor_id();
> long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu);
> @@ -677,7 +682,7 @@ bool check_unaligned_access_emulated_all_cpus(void)
> * accesses emulated since tasks requesting such control can run on any
> * CPU.
> */
> - schedule_on_each_cpu(check_unaligned_access_emulated);
> + on_each_cpu(check_unaligned_access_emulated, NULL, 1);
>
> for_each_online_cpu(cpu)
> if (per_cpu(misaligned_access_speed, cpu)
> --
> 2.47.2
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2025-03-13 12:57 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-10 15:12 [PATCH v3 00/17] riscv: add SBI FWFT misaligned exception delegation support Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 01/17] riscv: add Firmware Feature (FWFT) SBI extensions definitions Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 12:24 ` Andrew Jones
2025-03-13 12:24 ` Andrew Jones
2025-03-13 12:24 ` Andrew Jones
2025-03-10 15:12 ` [PATCH v3 02/17] riscv: sbi: add FWFT extension interface Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 12:39 ` Andrew Jones
2025-03-13 12:39 ` Andrew Jones
2025-03-13 12:39 ` Andrew Jones
2025-03-14 11:33 ` Clément Léger
2025-03-14 11:33 ` Clément Léger
2025-03-14 11:33 ` Clément Léger
2025-03-14 12:02 ` Andrew Jones
2025-03-14 12:02 ` Andrew Jones
2025-03-14 12:02 ` Andrew Jones
2025-03-14 12:23 ` Clément Léger
2025-03-14 12:23 ` Clément Léger
2025-03-14 12:23 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 03/17] riscv: sbi: add SBI FWFT extension calls Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 12:44 ` Andrew Jones
2025-03-13 12:44 ` Andrew Jones
2025-03-13 12:44 ` Andrew Jones
2025-03-14 11:21 ` Clément Léger
2025-03-14 11:21 ` Clément Léger
2025-03-14 11:21 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 04/17] riscv: misaligned: request misaligned exception from SBI Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 12:52 ` Andrew Jones
2025-03-13 12:52 ` Andrew Jones
2025-03-13 12:52 ` Andrew Jones
2025-03-10 15:12 ` [PATCH v3 05/17] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 12:57 ` Andrew Jones [this message]
2025-03-13 12:57 ` Andrew Jones
2025-03-13 12:57 ` Andrew Jones
2025-03-14 11:44 ` Clément Léger
2025-03-14 11:44 ` Clément Léger
2025-03-14 11:44 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 06/17] riscv: misaligned: use correct CONFIG_ ifdef for misaligned_access_speed Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 13:06 ` Andrew Jones
2025-03-13 13:06 ` Andrew Jones
2025-03-13 13:06 ` Andrew Jones
2025-03-14 11:47 ` Clément Léger
2025-03-14 11:47 ` Clément Léger
2025-03-14 11:47 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 07/17] riscv: misaligned: move emulated access uniformity check in a function Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 13:07 ` Andrew Jones
2025-03-13 13:07 ` Andrew Jones
2025-03-13 13:07 ` Andrew Jones
2025-03-10 15:12 ` [PATCH v3 08/17] riscv: misaligned: add a function to check misalign trap delegability Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 13:19 ` Andrew Jones
2025-03-13 13:19 ` Andrew Jones
2025-03-13 13:19 ` Andrew Jones
2025-03-14 11:49 ` Clément Léger
2025-03-14 11:49 ` Clément Léger
2025-03-14 11:49 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 09/17] riscv: misaligned: factorize trap handling Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 10/17] riscv: misaligned: enable IRQs while handling misaligned accesses Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 11/17] riscv: misaligned: use get_user() instead of __get_user() Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 12/17] Documentation/sysctl: add riscv to unaligned-trap supported archs Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 13/17] selftests: riscv: add misaligned access testing Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 14/17] RISC-V: KVM: add SBI extension init()/deinit() functions Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 14:27 ` Andrew Jones
2025-03-13 14:27 ` Andrew Jones
2025-03-13 14:27 ` Andrew Jones
2025-03-14 13:53 ` Clément Léger
2025-03-14 13:53 ` Clément Léger
2025-03-14 13:53 ` Clément Léger
2025-03-10 15:12 ` [PATCH v3 15/17] RISC-V: KVM: add SBI extension reset callback Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 14:29 ` Andrew Jones
2025-03-13 14:29 ` Andrew Jones
2025-03-13 14:29 ` Andrew Jones
2025-03-10 15:12 ` [PATCH v3 16/17] RISC-V: KVM: add support for FWFT SBI extension Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 15:18 ` Andrew Jones
2025-03-13 15:18 ` Andrew Jones
2025-03-13 15:18 ` Andrew Jones
2025-03-10 15:12 ` [PATCH v3 17/17] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-10 15:12 ` Clément Léger
2025-03-13 15:23 ` Andrew Jones
2025-03-13 15:23 ` Andrew Jones
2025-03-13 15:23 ` Andrew Jones
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250313-311b94f9bafe73bcd41158a1@orel \
--to=ajones@ventanamicro.com \
--cc=anup@brainfault.org \
--cc=atishp@atishpatra.org \
--cc=cleger@rivosinc.com \
--cc=corbet@lwn.net \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=samuel.holland@sifive.com \
--cc=shuah@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.