* [PATCH 2/2] x86/asm: Use asm_inline instead of asm in clwb()
2025-03-13 10:26 [PATCH 1/2] x86/asm: Use CLFLUSHOPT and CLWB mnemonics in special_insns.h Uros Bizjak
@ 2025-03-13 10:26 ` Uros Bizjak
2025-03-13 11:02 ` [tip: x86/asm] x86/asm: Use asm_inline() instead of asm() " tip-bot2 for Uros Bizjak
2025-03-19 11:03 ` [tip: x86/core] " tip-bot2 for Uros Bizjak
2025-03-13 11:02 ` [tip: x86/asm] x86/asm: Use CLFLUSHOPT and CLWB mnemonics in <asm/special_insns.h> tip-bot2 for Uros Bizjak
2025-03-19 11:03 ` [tip: x86/core] " tip-bot2 for Uros Bizjak
2 siblings, 2 replies; 6+ messages in thread
From: Uros Bizjak @ 2025-03-13 10:26 UTC (permalink / raw)
To: x86, linux-kernel
Cc: Uros Bizjak, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, H. Peter Anvin
Use asm_inline to instruct the compiler that the size of asm()
is the minimum size of one instruction, ignoring how many instructions
the compiler thinks it is. ALTERNATIVE macro that expands to several
pseudo directives causes instruction length estimate to count
more than 20 instructions.
bloat-o-meter reports slight increase of the code size
for x86_64 defconfig object file, compiled with gcc-14.2:
add/remove: 0/2 grow/shrink: 3/0 up/down: 190/-59 (131)
Function old new delta
__copy_user_flushcache 166 247 +81
__memcpy_flushcache 369 437 +68
arch_wb_cache_pmem 6 47 +41
__pfx_clean_cache_range 16 - -16
clean_cache_range 43 - -43
Total: Before=22807167, After=22807298, chg +0.00%
The compiler now inlines and removes clean_cache_range() function.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
---
arch/x86/include/asm/special_insns.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 9b10bd102d3d..6266d6b9e0b8 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -185,7 +185,7 @@ static inline void clwb(volatile void *__p)
{
volatile struct { char x[64]; } *p = __p;
- asm volatile(ALTERNATIVE_2(
+ asm_inline volatile(ALTERNATIVE_2(
"ds clflush %0",
"clflushopt %0", X86_FEATURE_CLFLUSHOPT,
"clwb %0", X86_FEATURE_CLWB)
--
2.48.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [tip: x86/asm] x86/asm: Use asm_inline() instead of asm() in clwb()
2025-03-13 10:26 ` [PATCH 2/2] x86/asm: Use asm_inline instead of asm in clwb() Uros Bizjak
@ 2025-03-13 11:02 ` tip-bot2 for Uros Bizjak
2025-03-19 11:03 ` [tip: x86/core] " tip-bot2 for Uros Bizjak
1 sibling, 0 replies; 6+ messages in thread
From: tip-bot2 for Uros Bizjak @ 2025-03-13 11:02 UTC (permalink / raw)
To: linux-tip-commits
Cc: Uros Bizjak, Ingo Molnar, Andy Lutomirski, Brian Gerst,
H. Peter Anvin, Linus Torvalds, x86, linux-kernel
The following commit has been merged into the x86/asm branch of tip:
Commit-ID: 6e9e4961767b76ec67268c991ae90116ce76cc70
Gitweb: https://git.kernel.org/tip/6e9e4961767b76ec67268c991ae90116ce76cc70
Author: Uros Bizjak <ubizjak@gmail.com>
AuthorDate: Thu, 13 Mar 2025 11:26:56 +01:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Thu, 13 Mar 2025 11:50:14 +01:00
x86/asm: Use asm_inline() instead of asm() in clwb()
Use asm_inline() to instruct the compiler that the size of asm()
is the minimum size of one instruction, ignoring how many instructions
the compiler thinks it is. ALTERNATIVE macro that expands to several
pseudo directives causes instruction length estimate to count
more than 20 instructions.
bloat-o-meter reports slight increase of the code size
for x86_64 defconfig object file, compiled with gcc-14.2:
add/remove: 0/2 grow/shrink: 3/0 up/down: 190/-59 (131)
Function old new delta
__copy_user_flushcache 166 247 +81
__memcpy_flushcache 369 437 +68
arch_wb_cache_pmem 6 47 +41
__pfx_clean_cache_range 16 - -16
clean_cache_range 43 - -43
Total: Before=22807167, After=22807298, chg +0.00%
The compiler now inlines and removes the clean_cache_range() function.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://lore.kernel.org/r/20250313102715.333142-2-ubizjak@gmail.com
---
arch/x86/include/asm/special_insns.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 856d4ad..f5a8ff4 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -185,7 +185,7 @@ static inline void clwb(volatile void *__p)
{
volatile struct { char x[64]; } *p = __p;
- asm volatile(ALTERNATIVE_2(
+ asm_inline volatile(ALTERNATIVE_2(
"ds clflush %0",
"clflushopt %0", X86_FEATURE_CLFLUSHOPT,
"clwb %0", X86_FEATURE_CLWB)
^ permalink raw reply related [flat|nested] 6+ messages in thread* [tip: x86/core] x86/asm: Use asm_inline() instead of asm() in clwb()
2025-03-13 10:26 ` [PATCH 2/2] x86/asm: Use asm_inline instead of asm in clwb() Uros Bizjak
2025-03-13 11:02 ` [tip: x86/asm] x86/asm: Use asm_inline() instead of asm() " tip-bot2 for Uros Bizjak
@ 2025-03-19 11:03 ` tip-bot2 for Uros Bizjak
1 sibling, 0 replies; 6+ messages in thread
From: tip-bot2 for Uros Bizjak @ 2025-03-19 11:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: Uros Bizjak, Ingo Molnar, Andy Lutomirski, Brian Gerst,
H. Peter Anvin, Linus Torvalds, x86, linux-kernel
The following commit has been merged into the x86/core branch of tip:
Commit-ID: f685a96bfd7963a587c76bd5709f2d9170820875
Gitweb: https://git.kernel.org/tip/f685a96bfd7963a587c76bd5709f2d9170820875
Author: Uros Bizjak <ubizjak@gmail.com>
AuthorDate: Thu, 13 Mar 2025 11:26:56 +01:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Wed, 19 Mar 2025 11:26:58 +01:00
x86/asm: Use asm_inline() instead of asm() in clwb()
Use asm_inline() to instruct the compiler that the size of asm()
is the minimum size of one instruction, ignoring how many instructions
the compiler thinks it is. ALTERNATIVE macro that expands to several
pseudo directives causes instruction length estimate to count
more than 20 instructions.
bloat-o-meter reports slight increase of the code size
for x86_64 defconfig object file, compiled with gcc-14.2:
add/remove: 0/2 grow/shrink: 3/0 up/down: 190/-59 (131)
Function old new delta
__copy_user_flushcache 166 247 +81
__memcpy_flushcache 369 437 +68
arch_wb_cache_pmem 6 47 +41
__pfx_clean_cache_range 16 - -16
clean_cache_range 43 - -43
Total: Before=22807167, After=22807298, chg +0.00%
The compiler now inlines and removes the clean_cache_range() function.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://lore.kernel.org/r/20250313102715.333142-2-ubizjak@gmail.com
---
arch/x86/include/asm/special_insns.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 9b10bd1..6266d6b 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -185,7 +185,7 @@ static inline void clwb(volatile void *__p)
{
volatile struct { char x[64]; } *p = __p;
- asm volatile(ALTERNATIVE_2(
+ asm_inline volatile(ALTERNATIVE_2(
"ds clflush %0",
"clflushopt %0", X86_FEATURE_CLFLUSHOPT,
"clwb %0", X86_FEATURE_CLWB)
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [tip: x86/asm] x86/asm: Use CLFLUSHOPT and CLWB mnemonics in <asm/special_insns.h>
2025-03-13 10:26 [PATCH 1/2] x86/asm: Use CLFLUSHOPT and CLWB mnemonics in special_insns.h Uros Bizjak
2025-03-13 10:26 ` [PATCH 2/2] x86/asm: Use asm_inline instead of asm in clwb() Uros Bizjak
@ 2025-03-13 11:02 ` tip-bot2 for Uros Bizjak
2025-03-19 11:03 ` [tip: x86/core] " tip-bot2 for Uros Bizjak
2 siblings, 0 replies; 6+ messages in thread
From: tip-bot2 for Uros Bizjak @ 2025-03-13 11:02 UTC (permalink / raw)
To: linux-tip-commits
Cc: Uros Bizjak, Ingo Molnar, Andy Lutomirski, Brian Gerst,
H. Peter Anvin, Linus Torvalds, x86, linux-kernel
The following commit has been merged into the x86/asm branch of tip:
Commit-ID: cc2e9e09d1a3c59cfb138a0fc6ad6f624f3d4ac8
Gitweb: https://git.kernel.org/tip/cc2e9e09d1a3c59cfb138a0fc6ad6f624f3d4ac8
Author: Uros Bizjak <ubizjak@gmail.com>
AuthorDate: Thu, 13 Mar 2025 11:26:55 +01:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Thu, 13 Mar 2025 11:50:14 +01:00
x86/asm: Use CLFLUSHOPT and CLWB mnemonics in <asm/special_insns.h>
Current minimum required version of binutils is 2.25,
which supports CLFLUSHOPT and CLWB instruction mnemonics.
Replace the byte-wise specification of CLFLUSHOPT and
CLWB with these proper mnemonics.
No functional change intended.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://lore.kernel.org/r/20250313102715.333142-1-ubizjak@gmail.com
---
arch/x86/include/asm/special_insns.h | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 03e7c2d..856d4ad 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -176,9 +176,8 @@ static __always_inline void clflush(volatile void *__p)
static inline void clflushopt(volatile void *__p)
{
- alternative_io(".byte 0x3e; clflush %0",
- ".byte 0x66; clflush %0",
- X86_FEATURE_CLFLUSHOPT,
+ alternative_io("ds clflush %0",
+ "clflushopt %0", X86_FEATURE_CLFLUSHOPT,
"+m" (*(volatile char __force *)__p));
}
@@ -187,13 +186,10 @@ static inline void clwb(volatile void *__p)
volatile struct { char x[64]; } *p = __p;
asm volatile(ALTERNATIVE_2(
- ".byte 0x3e; clflush (%[pax])",
- ".byte 0x66; clflush (%[pax])", /* clflushopt (%%rax) */
- X86_FEATURE_CLFLUSHOPT,
- ".byte 0x66, 0x0f, 0xae, 0x30", /* clwb (%%rax) */
- X86_FEATURE_CLWB)
- : [p] "+m" (*p)
- : [pax] "a" (p));
+ "ds clflush %0",
+ "clflushopt %0", X86_FEATURE_CLFLUSHOPT,
+ "clwb %0", X86_FEATURE_CLWB)
+ : "+m" (*p));
}
#ifdef CONFIG_X86_USER_SHADOW_STACK
^ permalink raw reply related [flat|nested] 6+ messages in thread* [tip: x86/core] x86/asm: Use CLFLUSHOPT and CLWB mnemonics in <asm/special_insns.h>
2025-03-13 10:26 [PATCH 1/2] x86/asm: Use CLFLUSHOPT and CLWB mnemonics in special_insns.h Uros Bizjak
2025-03-13 10:26 ` [PATCH 2/2] x86/asm: Use asm_inline instead of asm in clwb() Uros Bizjak
2025-03-13 11:02 ` [tip: x86/asm] x86/asm: Use CLFLUSHOPT and CLWB mnemonics in <asm/special_insns.h> tip-bot2 for Uros Bizjak
@ 2025-03-19 11:03 ` tip-bot2 for Uros Bizjak
2 siblings, 0 replies; 6+ messages in thread
From: tip-bot2 for Uros Bizjak @ 2025-03-19 11:03 UTC (permalink / raw)
To: linux-tip-commits
Cc: Uros Bizjak, Ingo Molnar, Andy Lutomirski, Brian Gerst,
H. Peter Anvin, Linus Torvalds, x86, linux-kernel
The following commit has been merged into the x86/core branch of tip:
Commit-ID: 53286632450835c49b5c177f97e4899645f15730
Gitweb: https://git.kernel.org/tip/53286632450835c49b5c177f97e4899645f15730
Author: Uros Bizjak <ubizjak@gmail.com>
AuthorDate: Thu, 13 Mar 2025 11:26:55 +01:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Wed, 19 Mar 2025 11:26:58 +01:00
x86/asm: Use CLFLUSHOPT and CLWB mnemonics in <asm/special_insns.h>
Current minimum required version of binutils is 2.25,
which supports CLFLUSHOPT and CLWB instruction mnemonics.
Replace the byte-wise specification of CLFLUSHOPT and
CLWB with these proper mnemonics.
No functional change intended.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://lore.kernel.org/r/20250313102715.333142-1-ubizjak@gmail.com
---
arch/x86/include/asm/special_insns.h | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 21ce480..9b10bd1 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -176,9 +176,8 @@ static __always_inline void clflush(volatile void *__p)
static inline void clflushopt(volatile void *__p)
{
- alternative_io(".byte 0x3e; clflush %0",
- ".byte 0x66; clflush %0",
- X86_FEATURE_CLFLUSHOPT,
+ alternative_io("ds clflush %0",
+ "clflushopt %0", X86_FEATURE_CLFLUSHOPT,
"+m" (*(volatile char __force *)__p));
}
@@ -187,13 +186,10 @@ static inline void clwb(volatile void *__p)
volatile struct { char x[64]; } *p = __p;
asm volatile(ALTERNATIVE_2(
- ".byte 0x3e; clflush (%[pax])",
- ".byte 0x66; clflush (%[pax])", /* clflushopt (%%rax) */
- X86_FEATURE_CLFLUSHOPT,
- ".byte 0x66, 0x0f, 0xae, 0x30", /* clwb (%%rax) */
- X86_FEATURE_CLWB)
- : [p] "+m" (*p)
- : [pax] "a" (p));
+ "ds clflush %0",
+ "clflushopt %0", X86_FEATURE_CLFLUSHOPT,
+ "clwb %0", X86_FEATURE_CLWB)
+ : "+m" (*p));
}
#ifdef CONFIG_X86_USER_SHADOW_STACK
^ permalink raw reply related [flat|nested] 6+ messages in thread