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* [PATCH] arm64: dts: amlogic: a4: add pinctrl node
@ 2025-03-26  5:17 ` Xianwei Zhao via B4 Relay
  0 siblings, 0 replies; 9+ messages in thread
From: Xianwei Zhao @ 2025-03-26  5:17 UTC (permalink / raw)
  To: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
	Rob Herring, Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-kernel, linux-amlogic, devicetree, linux-kernel,
	Xianwei Zhao

Add pinctrl device to support Amlogic A4 and add uart pinconf.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
This commit is based on the Neil's suggestion, rebase the commit on top of
https://web.git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git/log/?h=for-next 
which merges this commit:
https://lore.kernel.org/all/20250212-amlogic-pinctrl-v5-4-282bc2516804@amlogic.com/
with another one:
https://lore.kernel.org/all/20250321-fix-a4-pinctrl-node-v1-1-5719f9f09932@amlogic.com/
---
 arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 125 ++++++++++++++++++++++++++++
 1 file changed, 125 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
index a06838552f21..c02fa5ee9fd2 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
@@ -5,6 +5,7 @@
 
 #include "amlogic-a4-common.dtsi"
 #include <dt-bindings/power/amlogic,a4-pwrc.h>
+#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
 / {
 	cpus {
 		#address-cells = <2>;
@@ -50,6 +51,107 @@ pwrc: power-controller {
 };
 
 &apb {
+	periphs_pinctrl: pinctrl@4000 {
+		compatible = "amlogic,pinctrl-a4";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x0 0x0 0x0 0x4000 0x0 0x280>;
+
+		gpiox: gpio@100 {
+			reg = <0 0x100 0 0x40>, <0 0xc 0 0xc>;
+			reg-names = "gpio", "mux";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 18>;
+		};
+
+		gpiot: gpio@140 {
+			reg = <0 0x140 0 0x40>, <0 0x2c 0 0xc>;
+			reg-names = "gpio", "mux";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_T<<8) 23>;
+		};
+
+		gpiod: gpio@180 {
+			reg = <0 0x180 0 0x40>, <0 0x40 0 0x8>;
+			reg-names = "gpio", "mux";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 16>;
+		};
+
+		gpioe: gpio@1c0 {
+			reg = <0 0x1c0 0 0x40>, <0 0x48 0 0x4>;
+			reg-names = "gpio", "mux";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 2>;
+		};
+
+		gpiob: gpio@240 {
+			reg = <0 0x240 0 0x40>, <0 0 0 0x8>;
+			reg-names = "gpio", "mux";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>;
+		};
+
+		func-uart-a {
+			uart_a_default: group-uart-a-pins1 {
+				pinmux = <AML_PINMUX(AMLOGIC_GPIO_X, 11, 1)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_X, 12, 1)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_X, 13, 1)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_X, 14, 1)>;
+			};
+
+			group-uart-a-pins2 {
+				pinmux = <AML_PINMUX(AMLOGIC_GPIO_D, 2, 3)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_D, 3, 3)>;
+				bias-pull-up;
+				drive-strength-microamp = <4000>;
+			};
+		};
+
+		func-uart-b {
+			uart_b_default: group-uart-b-pins {
+				pinmux = <AML_PINMUX(AMLOGIC_GPIO_E, 0, 3)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_E, 1, 3)>;
+				bias-pull-up;
+				drive-strength-microamp = <4000>;
+			};
+		};
+
+		func-uart-d {
+			uart_d_default: group-uart-d-pins1 {
+				pinmux = <AML_PINMUX(AMLOGIC_GPIO_T, 18, 4)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_T, 19, 4)>;
+				bias-pull-up;
+				drive-strength-microamp = <4000>;
+			};
+
+			group-uart-d-pins2 {
+				pinmux = <AML_PINMUX(AMLOGIC_GPIO_T, 7, 2)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_T, 8, 2)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_T, 9, 2)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_T, 10, 2)>;
+				bias-pull-up;
+				drive-strength-microamp = <4000>;
+			};
+		};
+
+		func-uart-e {
+			uart_e_default: group-uart-e-pins {
+				pinmux = <AML_PINMUX(AMLOGIC_GPIO_T, 14, 3)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_T, 15, 3)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_T, 16, 3)>,
+					 <AML_PINMUX(AMLOGIC_GPIO_T, 17, 3)>;
+				bias-pull-up;
+				drive-strength-microamp = <4000>;
+			};
+		};
+	};
+
 	gpio_intc: interrupt-controller@4080 {
 		compatible = "amlogic,a4-gpio-intc",
 			     "amlogic,meson-gpio-intc";
@@ -60,6 +162,29 @@ gpio_intc: interrupt-controller@4080 {
 			<10 11 12 13 14 15 16 17 18 19 20 21>;
 	};
 
+	ao_pinctrl: pinctrl@8e700 {
+		compatible = "amlogic,pinctrl-a4";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x0 0x0 0x0 0x8e700 0x0 0x80>;
+
+		gpioao: gpio@4 {
+			reg = <0 0x4 0 0x16>, <0 0 0 0x4>;
+			reg-names = "gpio", "mux";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_AO<<8) 7>;
+		};
+
+		test_n: gpio@44 {
+			reg = <0 0x44 0 0x20>;
+			reg-names = "gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>;
+		};
+	};
+
 	gpio_ao_intc: interrupt-controller@8e72c {
 		compatible = "amlogic,a4-gpio-ao-intc",
 			     "amlogic,meson-gpio-intc";

---
base-commit: 23a708916ec7ab21c8c81d61bdb7cb933f6867d5
change-id: 20250325-pinctrl-node-a4-a4667d5ec8cb

Best regards,
-- 
Xianwei Zhao <xianwei.zhao@amlogic.com>


^ permalink raw reply related	[flat|nested] 9+ messages in thread
* Re: [PATCH] arm64: dts: amlogic: a4: add pinctrl node
@ 2025-03-26  8:39 kernel test robot
  0 siblings, 0 replies; 9+ messages in thread
From: kernel test robot @ 2025-03-26  8:39 UTC (permalink / raw)
  To: oe-kbuild; +Cc: lkp

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

BCC: lkp@intel.com
CC: llvm@lists.linux.dev
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250326-pinctrl-node-a4-v1-1-8c30639480f6@amlogic.com>
References: <20250326-pinctrl-node-a4-v1-1-8c30639480f6@amlogic.com>
TO: Xianwei Zhao via B4 Relay <devnull+xianwei.zhao.amlogic.com@kernel.org>

Hi Xianwei,

kernel test robot noticed the following build errors:

[auto build test ERROR on 23a708916ec7ab21c8c81d61bdb7cb933f6867d5]

url:    https://github.com/intel-lab-lkp/linux/commits/Xianwei-Zhao-via-B4-Relay/arm64-dts-amlogic-a4-add-pinctrl-node/20250326-131834
base:   23a708916ec7ab21c8c81d61bdb7cb933f6867d5
patch link:    https://lore.kernel.org/r/20250326-pinctrl-node-a4-v1-1-8c30639480f6%40amlogic.com
patch subject: [PATCH] arm64: dts: amlogic: a4: add pinctrl node
:::::: branch date: 3 hours ago
:::::: commit date: 3 hours ago
config: arm64-randconfig-001-20250326 (https://download.01.org/0day-ci/archive/20250326/202503261610.i7nZRUav-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project c2692afc0a92cd5da140dfcdfff7818a5b8ce997)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250326/202503261610.i7nZRUav-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202503261610.i7nZRUav-lkp@intel.com/

All errors (new ones prefixed by >>):

   In file included from arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts:8:
>> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi:8:10: fatal error: 'dt-bindings/pinctrl/amlogic,pinctrl.h' file not found
       8 | #include <dt-bindings/pinctrl/amlogic,pinctrl.h>
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   1 error generated.

dtcheck warnings: (new ones prefixed by >>)
>> In file included from arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts:8:
   arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi:8:10: fatal error: 'dt-bindings/pinctrl/amlogic,pinctrl.h' file not found
       8 | #include <dt-bindings/pinctrl/amlogic,pinctrl.h>
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   1 error generated.

vim +8 arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi

04c73f8d458050 Xianwei Zhao 2025-03-26  @8  #include <dt-bindings/pinctrl/amlogic,pinctrl.h>
6ef63301fa3708 Xianwei Zhao 2024-04-01   9  / {
6ef63301fa3708 Xianwei Zhao 2024-04-01  10  	cpus {
6ef63301fa3708 Xianwei Zhao 2024-04-01  11  		#address-cells = <2>;
6ef63301fa3708 Xianwei Zhao 2024-04-01  12  		#size-cells = <0>;
6ef63301fa3708 Xianwei Zhao 2024-04-01  13  
6ef63301fa3708 Xianwei Zhao 2024-04-01  14  		cpu0: cpu@0 {
6ef63301fa3708 Xianwei Zhao 2024-04-01  15  			device_type = "cpu";
6ef63301fa3708 Xianwei Zhao 2024-04-01  16  			compatible = "arm,cortex-a53";
6ef63301fa3708 Xianwei Zhao 2024-04-01  17  			reg = <0x0 0x0>;
6ef63301fa3708 Xianwei Zhao 2024-04-01  18  			enable-method = "psci";
6ef63301fa3708 Xianwei Zhao 2024-04-01  19  		};
6ef63301fa3708 Xianwei Zhao 2024-04-01  20  
6ef63301fa3708 Xianwei Zhao 2024-04-01  21  		cpu1: cpu@1 {
6ef63301fa3708 Xianwei Zhao 2024-04-01  22  			device_type = "cpu";
6ef63301fa3708 Xianwei Zhao 2024-04-01  23  			compatible = "arm,cortex-a53";
6ef63301fa3708 Xianwei Zhao 2024-04-01  24  			reg = <0x0 0x1>;
6ef63301fa3708 Xianwei Zhao 2024-04-01  25  			enable-method = "psci";
6ef63301fa3708 Xianwei Zhao 2024-04-01  26  		};
6ef63301fa3708 Xianwei Zhao 2024-04-01  27  
6ef63301fa3708 Xianwei Zhao 2024-04-01  28  		cpu2: cpu@2 {
6ef63301fa3708 Xianwei Zhao 2024-04-01  29  			device_type = "cpu";
6ef63301fa3708 Xianwei Zhao 2024-04-01  30  			compatible = "arm,cortex-a53";
6ef63301fa3708 Xianwei Zhao 2024-04-01  31  			reg = <0x0 0x2>;
6ef63301fa3708 Xianwei Zhao 2024-04-01  32  			enable-method = "psci";
6ef63301fa3708 Xianwei Zhao 2024-04-01  33  		};
6ef63301fa3708 Xianwei Zhao 2024-04-01  34  
6ef63301fa3708 Xianwei Zhao 2024-04-01  35  		cpu3: cpu@3 {
6ef63301fa3708 Xianwei Zhao 2024-04-01  36  			device_type = "cpu";
6ef63301fa3708 Xianwei Zhao 2024-04-01  37  			compatible = "arm,cortex-a53";
6ef63301fa3708 Xianwei Zhao 2024-04-01  38  			reg = <0x0 0x3>;
6ef63301fa3708 Xianwei Zhao 2024-04-01  39  			enable-method = "psci";
6ef63301fa3708 Xianwei Zhao 2024-04-01  40  		};
6ef63301fa3708 Xianwei Zhao 2024-04-01  41  	};
c830ead0d16131 Xianwei Zhao 2024-05-29  42  
c830ead0d16131 Xianwei Zhao 2024-05-29  43  	sm: secure-monitor {
c830ead0d16131 Xianwei Zhao 2024-05-29  44  		compatible = "amlogic,meson-gxbb-sm";
c830ead0d16131 Xianwei Zhao 2024-05-29  45  
c830ead0d16131 Xianwei Zhao 2024-05-29  46  		pwrc: power-controller {
c830ead0d16131 Xianwei Zhao 2024-05-29  47  			compatible = "amlogic,a4-pwrc";
c830ead0d16131 Xianwei Zhao 2024-05-29  48  			#power-domain-cells = <1>;
c830ead0d16131 Xianwei Zhao 2024-05-29  49  		};
c830ead0d16131 Xianwei Zhao 2024-05-29  50  	};
6ef63301fa3708 Xianwei Zhao 2024-04-01  51  };
66eae21a0c1405 Xianwei Zhao 2025-03-11  52  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2025-03-27 10:15 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-03-26  5:17 [PATCH] arm64: dts: amlogic: a4: add pinctrl node Xianwei Zhao
2025-03-26  5:17 ` Xianwei Zhao via B4 Relay
2025-03-26  5:17 ` Xianwei Zhao via B4 Relay
2025-03-26 13:18 ` kernel test robot
2025-03-27 10:10 ` Neil Armstrong
2025-03-27 10:10   ` Neil Armstrong
2025-03-27 10:13 ` Neil Armstrong
2025-03-27 10:13   ` Neil Armstrong
  -- strict thread matches above, loose matches on Subject: below --
2025-03-26  8:39 kernel test robot

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