From: Hal Feng <hal.feng@starfivetech.com>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Minda Chen <minda.chen@starfivetech.com>
Cc: Hal Feng <hal.feng@starfivetech.com>,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1] phy: starfive: jh7110-usb: Fix USB 2.0 host occasional detection failure
Date: Tue, 22 Apr 2025 18:12:44 +0800 [thread overview]
Message-ID: <20250422101244.51686-1-hal.feng@starfivetech.com> (raw)
JH7110 USB 2.0 host fails to detect USB 2.0 devices occasionally. With a
long time of debugging and testing, we found that setting Rx clock gating
control signal to normal power consumption mode can solve this problem.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
drivers/phy/starfive/phy-jh7110-usb.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/phy/starfive/phy-jh7110-usb.c b/drivers/phy/starfive/phy-jh7110-usb.c
index cb5454fbe2c8..b505d89860b4 100644
--- a/drivers/phy/starfive/phy-jh7110-usb.c
+++ b/drivers/phy/starfive/phy-jh7110-usb.c
@@ -18,6 +18,8 @@
#include <linux/usb/of.h>
#define USB_125M_CLK_RATE 125000000
+#define USB_CLK_MODE_OFF 0x0
+#define USB_CLK_MODE_RX_NORMAL_PWR BIT(1)
#define USB_LS_KEEPALIVE_OFF 0x4
#define USB_LS_KEEPALIVE_ENABLE BIT(4)
@@ -78,6 +80,7 @@ static int jh7110_usb2_phy_init(struct phy *_phy)
{
struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
int ret;
+ unsigned int val;
ret = clk_set_rate(phy->usb_125m_clk, USB_125M_CLK_RATE);
if (ret)
@@ -87,6 +90,10 @@ static int jh7110_usb2_phy_init(struct phy *_phy)
if (ret)
return ret;
+ val = readl(phy->regs + USB_CLK_MODE_OFF);
+ val |= USB_CLK_MODE_RX_NORMAL_PWR;
+ writel(val, phy->regs + USB_CLK_MODE_OFF);
+
return 0;
}
base-commit: a33b5a08cbbdd7aadff95f40cbb45ab86841679e
--
2.43.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Hal Feng <hal.feng@starfivetech.com>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Minda Chen <minda.chen@starfivetech.com>
Cc: Hal Feng <hal.feng@starfivetech.com>,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1] phy: starfive: jh7110-usb: Fix USB 2.0 host occasional detection failure
Date: Tue, 22 Apr 2025 18:12:44 +0800 [thread overview]
Message-ID: <20250422101244.51686-1-hal.feng@starfivetech.com> (raw)
JH7110 USB 2.0 host fails to detect USB 2.0 devices occasionally. With a
long time of debugging and testing, we found that setting Rx clock gating
control signal to normal power consumption mode can solve this problem.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
drivers/phy/starfive/phy-jh7110-usb.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/phy/starfive/phy-jh7110-usb.c b/drivers/phy/starfive/phy-jh7110-usb.c
index cb5454fbe2c8..b505d89860b4 100644
--- a/drivers/phy/starfive/phy-jh7110-usb.c
+++ b/drivers/phy/starfive/phy-jh7110-usb.c
@@ -18,6 +18,8 @@
#include <linux/usb/of.h>
#define USB_125M_CLK_RATE 125000000
+#define USB_CLK_MODE_OFF 0x0
+#define USB_CLK_MODE_RX_NORMAL_PWR BIT(1)
#define USB_LS_KEEPALIVE_OFF 0x4
#define USB_LS_KEEPALIVE_ENABLE BIT(4)
@@ -78,6 +80,7 @@ static int jh7110_usb2_phy_init(struct phy *_phy)
{
struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
int ret;
+ unsigned int val;
ret = clk_set_rate(phy->usb_125m_clk, USB_125M_CLK_RATE);
if (ret)
@@ -87,6 +90,10 @@ static int jh7110_usb2_phy_init(struct phy *_phy)
if (ret)
return ret;
+ val = readl(phy->regs + USB_CLK_MODE_OFF);
+ val |= USB_CLK_MODE_RX_NORMAL_PWR;
+ writel(val, phy->regs + USB_CLK_MODE_OFF);
+
return 0;
}
base-commit: a33b5a08cbbdd7aadff95f40cbb45ab86841679e
--
2.43.2
next reply other threads:[~2025-04-22 11:01 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-22 10:12 Hal Feng [this message]
2025-04-22 10:12 ` [PATCH v1] phy: starfive: jh7110-usb: Fix USB 2.0 host occasional detection failure Hal Feng
2025-05-14 11:31 ` Vinod Koul
2025-05-14 11:31 ` Vinod Koul
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