[PATCH v1 00/10] Add rtc and suspend to ram for Maxim MAX77686 PMIC

[PATCH v1 00/10] Add rtc and suspend to ram for Maxim MAX77686 PMIC

[Anand Moon]

The Maxim MAX77686 family of PMICs supports RTC crystal clocks.
Device tree bindings have been added to enable this feature across all
devices.

Add information which regulators can be disabled during system suspend.

Regulators which can be turned off during system suspend:
        -LDOn   :       2, 6-8, 10-12, 14-16,
        -BUCKn  :       1-4.
Use standard regulator bindings for it ('regulator-off-in-suspend').

Tested on Exynos4412 Odroid U3.

Previous version
v1: https://lore.kernel.org/all/20181204194025.2719-1-linux.amoon@gmail.com/

Thanks
-Anand

Anand Moon (10):
  dt-bindings: clock: Add RTC clock binding for Maxim MAX77686
  ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for
    Exynos4412 Odroid
  ARM: dts: exynos: Add proper regulator states for suspend-to-mem for
    Exynos4412 Odroid
  ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for
    Exynos4412 Midas
  ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for
    Exynos4412 p4note
  ARM: dts: exynos: Update proper regulator states for suspend-to-mem
    for Exynos4412 p4node
  ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for
    Exynos5250 smdk5250
  ARM: dts: exynos: Add proper regulator states for suspend-to-mem for
    Exyno5250 smdk5250
  ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for
    Exynos5250 snow
  ARM: dts: exynos: Add proper regulator states for suspend-to-mem for
    Exynos5250 snow

 .../bindings/clock/maxim,max77686.yaml        | 48 ++++++++++++++
 .../boot/dts/samsung/exynos4412-midas.dtsi    |  7 +++
 .../dts/samsung/exynos4412-odroid-common.dtsi | 63 +++++++++++++++++++
 .../boot/dts/samsung/exynos4412-p4note.dtsi   | 31 +++++----
 .../boot/dts/samsung/exynos5250-smdk5250.dts  | 63 +++++++++++++++++++
 .../dts/samsung/exynos5250-snow-common.dtsi   | 55 ++++++++++++++++
 6 files changed, 255 insertions(+), 12 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/maxim,max77686.yaml


base-commit: 02ddfb981de88a2c15621115dd7be2431252c568
-- 
2.49.0

[PATCH v1 01/10] dt-bindings: clock: Add RTC clock binding for Maxim MAX77686

[Anand Moon]

Add device tree schema for the RTC clock in the Maxim MAX77686
family of PMICs. This binding defines the 32k clock generator
block, which includes three 32.768kHz crystal clock outputs
controllable via I2C.

The detailed binding information can be found in the MFD DT binding
documentation at bindings/mfd/maxim,max77686.yaml.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 .../bindings/clock/maxim,max77686.yaml        | 48 +++++++++++++++++++
 1 file changed, 48 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/maxim,max77686.yaml

diff --git a/Documentation/devicetree/bindings/clock/maxim,max77686.yaml b/Documentation/devicetree/bindings/clock/maxim,max77686.yaml
new file mode 100644
index 000000000000..72f11309f033
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/maxim,max77686.yaml
@@ -0,0 +1,48 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/maxim,max77686.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Maxim MAX77686 family clock generator block
+
+maintainers:
+  - Anand Moon <linux.amoon@gmail.com>
+
+description: |
+  Binding for Maxim MAX77686 32k clock generator block
+
+  This is a part of device tree bindings of MAX77686 multi-function
+  device. More information can be found in MFD DT binding
+  doc as follows:
+    bindings/mfd/maxim,max77686.yaml for MAX77686
+
+  The MAX77686 contains three 32.768khz crystal clock outputs that can
+  be controlled (gated/ungated) over I2C. Clocks are defined as
+  preprocessor macros in dt-bindings/clock/maxim,max77686.h.
+
+properties:
+  compatible:
+    enum:
+      - max77686-rtc
+
+  "#clock-cells":
+    const: 1
+
+  clock-output-names:
+    maxItems: 3
+    description: Names for AP, CP and BT clocks.
+
+required:
+  - compatible
+  - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    max77686_osc: clocks {
+        compatible = "max77686-rtc";
+        #clock-cells = <1>;
+        clock-output-names = "32khz_ap", "32khz_cp", "32khz_pmic";
+    };
-- 
2.49.0

Re: [PATCH v1 01/10] dt-bindings: clock: Add RTC clock binding for Maxim MAX77686

[Krzysztof Kozlowski]

On 25/04/2025 15:26, Anand Moon wrote:
> +
> +  The MAX77686 contains three 32.768khz crystal clock outputs that can
> +  be controlled (gated/ungated) over I2C. Clocks are defined as
> +  preprocessor macros in dt-bindings/clock/maxim,max77686.h.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - max77686-rtc

So you claim RTC is a clock, right? Did not even think that RTC has a
bit different meaning?

But regardless, this code make no sense and was never tested. It cannot
work.

It reminds me previous approaches with whatever patches you found in the
downstream...

Best regards,
Krzysztof

Re: [PATCH v1 01/10] dt-bindings: clock: Add RTC clock binding for Maxim MAX77686

[Anand Moon]

Hi Krzysztof,

On Fri, 25 Apr 2025 at 20:14, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On 25/04/2025 15:26, Anand Moon wrote:
> > +
> > +  The MAX77686 contains three 32.768khz crystal clock outputs that can
> > +  be controlled (gated/ungated) over I2C. Clocks are defined as
> > +  preprocessor macros in dt-bindings/clock/maxim,max77686.h.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - max77686-rtc
>
> So you claim RTC is a clock, right? Did not even think that RTC has a
> bit different meaning?
>
> But regardless, this code make no sense and was never tested. It cannot
> work.
>
> It reminds me previous approaches with whatever patches you found in the
> downstream...

Okay, I found the MAX77686A datasheet that Hardkernel shared long
ago and tried to interpret the information in it.
I will remove this repo once this is done.

[0] https://github.com/moonlinux/Samsung_user_manuals/blob/master/MAX77686A%20Datasheet%20REV00.pdf

I have gone through MAX77686A the regulator and the datasheet
If you have some improvements to the code plz suggest so,

>
> Best regards,
> Krzysztof

Thanks
-Anand

[PATCH v1 02/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 Odroid

[Anand Moon]

The MAX77686A includes a crystal driver with an external load capacitance.
When enabled, the crystal driver starts in low power mode. The
LowJitterMode bit controls the crystal driver, allowing it to switch
between low power mode and low jitter mode (high power mode).
Setting the LowJitterMode bit to 1 activates low jitter mode on
three channels simultaneously. These three 32khz buffer outputs
(32KHAP, 32KHCP, P32KH) are independently enabled/disabled over I2C.

The 32khz_ap output is typically routed to the AP Processor, while the
32khz_cp and 32khz_pmic outputs are intended for BT, WLAN, BB,
or peripheral chipsets.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
index 93ddbd4b0a18..03943c666d11 100644
--- a/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
@@ -289,6 +289,13 @@ max77686: pmic@9 {
 		reg = <0x09>;
 		#clock-cells = <1>;
 
+		max77686_osc: clocks {
+			compatible = "max77686-rtc";
+			#clock-cells = <1>;
+			clock-output-names = "32khz_ap",
+				"32khz_cp", "32khz_pmic";
+		};
+
 		voltage-regulators {
 			ldo1_reg: LDO1 {
 				regulator-name = "VDD_ALIVE_1.0V";
-- 
2.49.0

Re: [PATCH v1 02/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 Odroid

[Krzysztof Kozlowski]

On 25/04/2025 15:26, Anand Moon wrote:
> The MAX77686A includes a crystal driver with an external load capacitance.
> When enabled, the crystal driver starts in low power mode. The
> LowJitterMode bit controls the crystal driver, allowing it to switch
> between low power mode and low jitter mode (high power mode).
> Setting the LowJitterMode bit to 1 activates low jitter mode on
> three channels simultaneously. These three 32khz buffer outputs
> (32KHAP, 32KHCP, P32KH) are independently enabled/disabled over I2C.
> 
> The 32khz_ap output is typically routed to the AP Processor, while the
> 32khz_cp and 32khz_pmic outputs are intended for BT, WLAN, BB,
> or peripheral chipsets.
> 
> Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> ---
>  arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
> index 93ddbd4b0a18..03943c666d11 100644
> --- a/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
> +++ b/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
> @@ -289,6 +289,13 @@ max77686: pmic@9 {
>  		reg = <0x09>;
>  		#clock-cells = <1>;
>  
> +		max77686_osc: clocks {
> +			compatible = "max77686-rtc";

I don't believe this works.

Best regards,
Krzysztof

[PATCH v1 03/10] ARM: dts: exynos: Add proper regulator states for suspend-to-mem for Exynos4412 Odroid

[Anand Moon]

MAX77686 PMCI is able to power down and up key core supplies and other
voltage rails via PWRREQ signal to enter / exit (deep) sleep mode.
PWRREQ status is ignored during initial power up and down processes.
All programming must be done before the AP enterns the sleep mode by
pulling PWRREQ low since the AP does not have programming capability
in (deep) sleep mode.

Add suspend-to-mem node to regulator core to be enabled or disabled
during system suspend and also support changing the regulator operating
mode during runtime and when the system enter sleep mode (stand by mode).

Regulators which can be turned off during system suspend:
	-LDOn	:	2, 6-8, 10-12, 14-16,
	-BUCKn	:	1-4.
Use standard regulator bindings for it ('regulator-off-in-suspend').

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 .../dts/samsung/exynos4412-odroid-common.dtsi | 56 +++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
index 03943c666d11..3837e038c266 100644
--- a/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
@@ -309,6 +309,10 @@ ldo2_reg: LDO2 {
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo3_reg: LDO3 {
@@ -338,6 +342,10 @@ ldo6_reg: LDO6 {
 				regulator-min-microvolt = <1000000>;
 				regulator-max-microvolt = <1000000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo7_reg: LDO7 {
@@ -345,18 +353,30 @@ ldo7_reg: LDO7 {
 				regulator-min-microvolt = <1000000>;
 				regulator-max-microvolt = <1000000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo8_reg: LDO8 {
 				regulator-name = "VDD10_HDMI_1.0V";
 				regulator-min-microvolt = <1000000>;
 				regulator-max-microvolt = <1000000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo10_reg: LDO10 {
 				regulator-name = "VDDQ_MIPIHSI_1.8V";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo11_reg: LDO11 {
@@ -364,6 +384,10 @@ ldo11_reg: LDO11 {
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo12_reg: LDO12 {
@@ -372,6 +396,10 @@ ldo12_reg: LDO12 {
 				regulator-max-microvolt = <3300000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo13_reg: LDO13 {
@@ -388,6 +416,10 @@ ldo14_reg: LDO14 {
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo15_reg: LDO15 {
@@ -396,6 +428,10 @@ ldo15_reg: LDO15 {
 				regulator-max-microvolt = <1000000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo16_reg: LDO16 {
@@ -404,6 +440,10 @@ ldo16_reg: LDO16 {
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo20_reg: LDO20 {
@@ -442,6 +482,10 @@ buck1_reg: BUCK1 {
 				regulator-max-microvolt = <1100000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck2_reg: BUCK2 {
@@ -450,6 +494,10 @@ buck2_reg: BUCK2 {
 				regulator-max-microvolt = <1350000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck3_reg: BUCK3 {
@@ -458,6 +506,10 @@ buck3_reg: BUCK3 {
 				regulator-max-microvolt = <1050000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck4_reg: BUCK4 {
@@ -465,6 +517,10 @@ buck4_reg: BUCK4 {
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <1100000>;
 				regulator-microvolt-offset = <50000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck5_reg: BUCK5 {
-- 
2.49.0

[PATCH v1 04/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 Midas

[Anand Moon]

The MAX77686A includes a crystal driver with an external load capacitance.
When enabled, the crystal driver starts in low power mode. The
LowJitterMode bit controls the crystal driver, allowing it to switch
between low power mode and low jitter mode (high power mode).
Setting the LowJitterMode bit to 1 activates low jitter mode on
three channels simultaneously. These three 32khz buffer outputs
(32KHAP, 32KHCP, P32KH) are independently enabled/disabled over I2C.

The 32khz_ap output is typically routed to the AP Processor, while the
32khz_cp and 32khz_pmic outputs are intended for BT, WLAN, BB,
or peripheral chipsets.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 arch/arm/boot/dts/samsung/exynos4412-midas.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi b/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi
index 3d5aace668dc..ad2c7ebfdc41 100644
--- a/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi
@@ -729,6 +729,13 @@ max77686: pmic@9 {
 		reg = <0x09>;
 		#clock-cells = <1>;
 
+		max77686_osc: clocks {
+			compatible = "max77686-rtc";
+			#clock-cells = <1>;
+			clock-output-names = "32khz_ap",
+				"32khz_cp", "32khz_pmic";
+		};
+
 		voltage-regulators {
 			ldo1_reg: LDO1 {
 				regulator-name = "VALIVE_1.0V_AP";
-- 
2.49.0

[PATCH v1 05/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 p4note

[Anand Moon]

The MAX77686A includes a crystal driver with an external load capacitance.
When enabled, the crystal driver starts in low power mode. The
LowJitterMode bit controls the crystal driver, allowing it to switch
between low power mode and low jitter mode (high power mode).
Setting the LowJitterMode bit to 1 activates low jitter mode on
three channels simultaneously. These three 32khz buffer outputs
(32KHAP, 32KHCP, P32KH) are independently enabled/disabled over I2C.

The 32khz_ap output is typically routed to the AP Processor, while the
32khz_cp and 32khz_pmic outputs are intended for BT, WLAN, BB,
or peripheral chipsets.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi b/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi
index 28a605802733..ad0abe8d9e30 100644
--- a/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi
@@ -432,6 +432,13 @@ max77686: pmic@9 {
 		reg = <0x09>;
 		#clock-cells = <1>;
 
+		max77686_osc: clocks {
+			compatible = "max77686-rtc";
+			#clock-cells = <1>;
+			clock-output-names = "32khz_ap",
+				"32khz_cp", "32khz_pmic";
+		};
+
 		voltage-regulators {
 			ldo1_reg: LDO1 {
 				regulator-name = "ldo1";
-- 
2.49.0

[PATCH v1 06/10] ARM: dts: exynos: Update proper regulator states for suspend-to-mem for Exynos4412 p4node

[Anand Moon]

The MAX77686 PMCI is able to power down and up key core supplies and other
voltage rails via PWRREQ signal to enter / exit (deep) sleep mode.
PWRREQ status is ignored during initial power up and down processes.
All programming must be done before the AP enterns the sleep mode by
pulling PWRREQ low since the AP does not have programming capability
in (deep) sleep mode.

Update few regulator node with support suspend-to-mem node to regulator.
dropped suspend-to-mem as MAX77686 do not support these.

Regulators which can be turned off during system suspend:
     -LDOn   :       2, 6-8, 10-12, 14-16,
     -BUCKn  :       1-4.
Use standard regulator bindings for it ('regulator-off-in-suspend').

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 .../boot/dts/samsung/exynos4412-p4note.dtsi   | 24 +++++++++----------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi b/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi
index ad0abe8d9e30..d0ecb1c6a922 100644
--- a/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi
@@ -448,6 +448,10 @@ ldo1_reg: LDO1 {
 			ldo2_reg: LDO2 {
 				regulator-name = "ldo2";
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			/* WM8994 audio */
@@ -457,10 +461,6 @@ ldo3_reg: LDO3 {
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
 				regulator-boot-on;
-
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
 			};
 
 			ldo4_reg: LDO4 {
@@ -472,20 +472,24 @@ ldo5_reg: LDO5 {
 				regulator-name = "VCC_1.8V_IO";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
 			};
 
 			ldo6_reg: LDO6 {
 				regulator-name = "ldo6";
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo7_reg: LDO7 {
 				regulator-name = "ldo7";
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			/* CSI IP block */
@@ -506,10 +510,6 @@ ldo9_reg: LDO9 {
 				regulator-name = "VLED_IC_1.9V";
 				regulator-min-microvolt = <1950000>;
 				regulator-max-microvolt = <1950000>;
-
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
 			};
 
 			/* CSI IP block */
-- 
2.49.0

[PATCH v1 07/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos5250 smdk5250

[Anand Moon]

The MAX77686A includes a crystal driver with an external load capacitance.
When enabled, the crystal driver starts in low power mode. The
LowJitterMode bit controls the crystal driver, allowing it to switch
between low power mode and low jitter mode (high power mode).
Setting the LowJitterMode bit to 1 activates low jitter mode on
three channels simultaneously. These three 32khz buffer outputs
(32KHAP, 32KHCP, P32KH) are independently enabled/disabled over I2C.

The 32khz_ap output is typically routed to the AP Processor, while the
32khz_cp and 32khz_pmic outputs are intended for BT, WLAN, BB,
or peripheral chipsets.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts b/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts
index bb623726ef1e..d41409019671 100644
--- a/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts
@@ -145,6 +145,13 @@ max77686: pmic@9 {
 		#clock-cells = <1>;
 		wakeup-source;
 
+		max77686_osc: clocks {
+			compatible = "max77686-rtc";
+			#clock-cells = <1>;
+			clock-output-names = "32khz_ap",
+				"32khz_cp", "32khz_pmic";
+		};
+
 		voltage-regulators {
 			ldo1_reg: LDO1 {
 				regulator-name = "P1.0V_LDO_OUT1";
-- 
2.49.0

[PATCH v1 08/10] ARM: dts: exynos: Add proper regulator states for suspend-to-mem for Exyno5250 smdk5250

[Anand Moon]

The MAX77686 PMCI is able to power down and up key core supplies and other
voltage rails via PWRREQ signal to enter / exit (deep) sleep mode.
PWRREQ status is ignored during initial power up and down processes.
All programming must be done before the AP enterns the sleep mode by
pulling PWRREQ low since the AP does not have programming capability
in (deep) sleep mode.

Add suspend-to-mem node to regulator core to be enabled or disabled
during system suspend and also support changing the regulator operating
mode during runtime and when the system enter sleep mode (stand by mode).

Regulators which can be turned off during system suspend:
	-LDOn   :       2, 6-8, 10-12, 14-16,
        -BUCKn  :       1-4.
Use standard regulator bindings for it ('regulator-off-in-suspend').

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 .../boot/dts/samsung/exynos5250-smdk5250.dts  | 56 +++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts b/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts
index d41409019671..866e56915a2a 100644
--- a/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts
@@ -165,6 +165,10 @@ ldo2_reg: LDO2 {
 				regulator-min-microvolt = <1200000>;
 				regulator-max-microvolt = <1200000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo3_reg: LDO3 {
@@ -191,6 +195,10 @@ ldo6_reg: LDO6 {
 				regulator-min-microvolt = <1100000>;
 				regulator-max-microvolt = <1100000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo7_reg: LDO7 {
@@ -198,12 +206,20 @@ ldo7_reg: LDO7 {
 				regulator-min-microvolt = <1100000>;
 				regulator-max-microvolt = <1100000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo8_reg: LDO8 {
 				regulator-name = "P1.0V_LDO_OUT8";
 				regulator-min-microvolt = <1000000>;
 				regulator-max-microvolt = <1000000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo10_reg: LDO10 {
@@ -211,18 +227,30 @@ ldo10_reg: LDO10 {
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo11_reg: LDO11 {
 				regulator-name = "P1.8V_LDO_OUT11";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo12_reg: LDO12 {
 				regulator-name = "P3.0V_LDO_OUT12";
 				regulator-min-microvolt = <3000000>;
 				regulator-max-microvolt = <3000000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo13_reg: LDO13 {
@@ -235,18 +263,30 @@ ldo14_reg: LDO14 {
 				regulator-name = "P1.8V_LDO_OUT14";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo15_reg: LDO15 {
 				regulator-name = "P1.0V_LDO_OUT15";
 				regulator-min-microvolt = <1000000>;
 				regulator-max-microvolt = <1000000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo16_reg: LDO16 {
 				regulator-name = "P1.8V_LDO_OUT16";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck1_reg: BUCK1 {
@@ -255,6 +295,10 @@ buck1_reg: BUCK1 {
 				regulator-max-microvolt = <1300000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck2_reg: BUCK2 {
@@ -263,6 +307,10 @@ buck2_reg: BUCK2 {
 				regulator-max-microvolt = <1350000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck3_reg: BUCK3 {
@@ -271,6 +319,10 @@ buck3_reg: BUCK3 {
 				regulator-max-microvolt = <1200000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck4_reg: BUCK4 {
@@ -279,6 +331,10 @@ buck4_reg: BUCK4 {
 				regulator-max-microvolt = <1300000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck5_reg: BUCK5 {
-- 
2.49.0

Re: [PATCH v1 08/10] ARM: dts: exynos: Add proper regulator states for suspend-to-mem for Exyno5250 smdk5250

[Krzysztof Kozlowski]

On 25/04/2025 15:26, Anand Moon wrote:
> The MAX77686 PMCI is able to power down and up key core supplies and other
> voltage rails via PWRREQ signal to enter / exit (deep) sleep mode.
> PWRREQ status is ignored during initial power up and down processes.
> All programming must be done before the AP enterns the sleep mode by
> pulling PWRREQ low since the AP does not have programming capability
> in (deep) sleep mode.
> 
> Add suspend-to-mem node to regulator core to be enabled or disabled
> during system suspend and also support changing the regulator operating
> mode during runtime and when the system enter sleep mode (stand by mode).
> 
> Regulators which can be turned off during system suspend:
> 	-LDOn   :       2, 6-8, 10-12, 14-16,
>         -BUCKn  :       1-4.
> Use standard regulator bindings for it ('regulator-off-in-suspend').

I do not believe you tested this but instead send whatever you found
somewhere without actually understanding the code. In the past you were
sending such patches - without knowing what they do and without actually
testing.

NAK

Best regards,
Krzysztof

Re: [PATCH v1 08/10] ARM: dts: exynos: Add proper regulator states for suspend-to-mem for Exyno5250 smdk5250

[Anand Moon]

Hi Krzysztof,

On Fri, 25 Apr 2025 at 20:18, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On 25/04/2025 15:26, Anand Moon wrote:
> > The MAX77686 PMCI is able to power down and up key core supplies and other
> > voltage rails via PWRREQ signal to enter / exit (deep) sleep mode.
> > PWRREQ status is ignored during initial power up and down processes.
> > All programming must be done before the AP enterns the sleep mode by
> > pulling PWRREQ low since the AP does not have programming capability
> > in (deep) sleep mode.
> >
> > Add suspend-to-mem node to regulator core to be enabled or disabled
> > during system suspend and also support changing the regulator operating
> > mode during runtime and when the system enter sleep mode (stand by mode).
> >
> > Regulators which can be turned off during system suspend:
> >       -LDOn   :       2, 6-8, 10-12, 14-16,
> >         -BUCKn  :       1-4.
> > Use standard regulator bindings for it ('regulator-off-in-suspend').
>
> I do not believe you tested this but instead send whatever you found
> somewhere without actually understanding the code. In the past you were
> sending such patches - without knowing what they do and without actually
> testing.
>
> NAK
>
Thanks for your review comments,

All the MAX77686 control register supports On/Off Control by PWRREQ signal.

Once the Application Processor (AP) boots up, the AP is able to power
down and up key
core supplies and other voltage rails via PWRREQ signal to enter /
exit (deep) sleep mode.
PWRREQ status is ignored during initial power up and down processes.
All programming must be done before the AP enterns the sleep mode by
pulling PWRREQ l
ow since the AP does not have programming capability in (deep) sleep mode.

So PWRREQ has the following states for control registers

00: OFF (regardless of PWRREQ)
01: Output ON/OFF controlled by PWRREQ PWRREQ=H (1) : Output ON
PWRREQ=L (0) : Output OFF
10: unused
11: ON (Regardless of PWRREQ)

I have dome code mapping through the driver to understand this feature.
If there is some code improvement plz suggest so.

> Best regards,
> Krzysztof

Thanks
-Anand

[PATCH v1 09/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos5250 snow

[Anand Moon]

The MAX77686A includes a crystal driver with an external load capacitance.
When enabled, the crystal driver starts in low power mode. The
LowJitterMode bit controls the crystal driver, allowing it to switch
between low power mode and low jitter mode (high power mode).
Setting the LowJitterMode bit to 1 activates low jitter mode on
three channels simultaneously. These three 32khz buffer outputs
(32KHAP, 32KHCP, P32KH) are independently enabled/disabled over I2C.

The 32khz_ap output is typically routed to the AP Processor, while the
32khz_cp and 32khz_pmic outputs are intended for BT, WLAN, BB,
or peripheral chipsets.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi
index 65b000df176e..ca6ebd8a9d62 100644
--- a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi
@@ -298,6 +298,13 @@ max77686: pmic@9 {
 		reg = <0x09>;
 		#clock-cells = <1>;
 
+		max77686_osc: clocks {
+			compatible = "max77686-rtc";
+			#clock-cells = <1>;
+			clock-output-names = "32khz_ap",
+				"32khz_cp", "32khz_pmic";
+		};
+
 		voltage-regulators {
 			ldo1_reg: LDO1 {
 				regulator-name = "P1.0V_LDO_OUT1";
-- 
2.49.0

[PATCH v1 10/10] ARM: dts: exynos: Add proper regulator states for suspend-to-mem for Exynos5250 snow

[Anand Moon]

The MAX77686 PMCI is able to power down and up key core supplies and other
voltage rails via PWRREQ signal to enter / exit (deep) sleep mode.
PWRREQ status is ignored during initial power up and down processes.
All programming must be done before the AP enterns the sleep mode by
pulling PWRREQ low since the AP does not have programming capability
in (deep) sleep mode.

Add suspend-to-mem node to regulator core to be enabled or disabled
during system suspend and also support changing the regulator operating
mode during runtime and when the system enter sleep mode (stand by mode).

Regulators which can be turned off during system suspend:
        -LDOn   :       2, 6-8, 10-12, 14-16,
        -BUCKn  :       1-4.
Use standard regulator bindings for it ('regulator-off-in-suspend').

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 .../dts/samsung/exynos5250-snow-common.dtsi   | 48 +++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi
index ca6ebd8a9d62..70c3e6da55b7 100644
--- a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi
@@ -318,6 +318,10 @@ ldo2_reg: LDO2 {
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo3_reg: LDO3 {
@@ -332,6 +336,10 @@ ldo7_reg: LDO7 {
 				regulator-min-microvolt = <1100000>;
 				regulator-max-microvolt = <1100000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo8_reg: LDO8 {
@@ -339,6 +347,10 @@ ldo8_reg: LDO8 {
 				regulator-min-microvolt = <1000000>;
 				regulator-max-microvolt = <1000000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo10_reg: LDO10 {
@@ -346,6 +358,10 @@ ldo10_reg: LDO10 {
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo12_reg: LDO12 {
@@ -353,6 +369,10 @@ ldo12_reg: LDO12 {
 				regulator-min-microvolt = <3000000>;
 				regulator-max-microvolt = <3000000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo14_reg: LDO14 {
@@ -360,6 +380,10 @@ ldo14_reg: LDO14 {
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo15_reg: LDO15 {
@@ -367,6 +391,10 @@ ldo15_reg: LDO15 {
 				regulator-min-microvolt = <1000000>;
 				regulator-max-microvolt = <1000000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			ldo16_reg: LDO16 {
@@ -374,6 +402,10 @@ ldo16_reg: LDO16 {
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck1_reg: BUCK1 {
@@ -382,6 +414,10 @@ buck1_reg: BUCK1 {
 				regulator-max-microvolt = <1300000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck2_reg: BUCK2 {
@@ -390,6 +426,10 @@ buck2_reg: BUCK2 {
 				regulator-max-microvolt = <1350000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck3_reg: BUCK3 {
@@ -398,6 +438,10 @@ buck3_reg: BUCK3 {
 				regulator-max-microvolt = <1200000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck4_reg: BUCK4 {
@@ -406,6 +450,10 @@ buck4_reg: BUCK4 {
 				regulator-max-microvolt = <1300000>;
 				regulator-always-on;
 				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
 			};
 
 			buck5_reg: BUCK5 {
-- 
2.49.0

Re: [PATCH v1 02/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 Odroid

[kernel test robot]

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250425132727.5160-3-linux.amoon@gmail.com>
References: <20250425132727.5160-3-linux.amoon@gmail.com>
TO: Anand Moon <linux.amoon@gmail.com>
TO: Chanwoo Choi <cw00.choi@samsung.com>
TO: Krzysztof Kozlowski <krzk@kernel.org>
TO: Michael Turquette <mturquette@baylibre.com>
TO: Stephen Boyd <sboyd@kernel.org>
TO: Rob Herring <robh@kernel.org>
TO: Conor Dooley <conor+dt@kernel.org>
TO: Alim Akhtar <alim.akhtar@samsung.com>
TO: linux-kernel@vger.kernel.org
TO: linux-clk@vger.kernel.org
TO: devicetree@vger.kernel.org
CC: Anand Moon <linux.amoon@gmail.com>

Hi Anand,

kernel test robot noticed the following build warnings:

[auto build test WARNING on 02ddfb981de88a2c15621115dd7be2431252c568]

url:    https://github.com/intel-lab-lkp/linux/commits/Anand-Moon/dt-bindings-clock-Add-RTC-clock-binding-for-Maxim-MAX77686/20250425-213549
base:   02ddfb981de88a2c15621115dd7be2431252c568
patch link:    https://lore.kernel.org/r/20250425132727.5160-3-linux.amoon%40gmail.com
patch subject: [PATCH v1 02/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 Odroid
:::::: branch date: 6 days ago
:::::: commit date: 6 days ago
config: arm-randconfig-052-20250429 (https://download.01.org/0day-ci/archive/20250501/202505010934.ucJLL8xG-lkp@intel.com/config)
compiler: clang version 20.1.2 (https://github.com/llvm/llvm-project 58df0ef89dd64126512e4ee27b4ac3fd8ddf6247)
dtschema version: 2025.3.dev21+ge6ea659
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250501/202505010934.ucJLL8xG-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202505010934.ucJLL8xG-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
>> arch/arm/boot/dts/samsung/exynos4412-odroidu3.dtb: pmic@9 (maxim,max77686): 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
   	from schema $id: http://devicetree.org/schemas/mfd/maxim,max77686.yaml#
--
>> arch/arm/boot/dts/samsung/exynos4412-odroidx.dtb: pmic@9 (maxim,max77686): 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
   	from schema $id: http://devicetree.org/schemas/mfd/maxim,max77686.yaml#
--
>> arch/arm/boot/dts/samsung/exynos4412-odroidx2.dtb: pmic@9 (maxim,max77686): 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
   	from schema $id: http://devicetree.org/schemas/mfd/maxim,max77686.yaml#

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki