* [frank-w-bpi-r2-4.14:6.13-main 74/81] drivers/net/phy/mediatek/mtk-2p5ge.c:92:24: warning: unused variable 'pm_dev'
@ 2025-04-25 22:16 kernel test robot
0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2025-04-25 22:16 UTC (permalink / raw)
To: Frank Wunderlich; +Cc: oe-kbuild-all
tree: https://github.com/frank-w/BPI-R2-4.14 6.13-main
head: e1fb0102e1d7178a0110247bd75df738336948e2
commit: 0d3880fd0565b134a4637d6856c916d95e470b16 [74/81] net: phy: mediatek: drop pm code from 2g5 driver
config: loongarch-randconfig-001-20250426 (https://download.01.org/0day-ci/archive/20250426/202504260616.BPqRIEcL-lkp@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250426/202504260616.BPqRIEcL-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202504260616.BPqRIEcL-lkp@intel.com/
All warnings (new ones prefixed by >>):
drivers/net/phy/mediatek/mtk-2p5ge.c: In function 'mt7988_2p5ge_phy_config_init':
>> drivers/net/phy/mediatek/mtk-2p5ge.c:92:24: warning: unused variable 'pm_dev' [-Wunused-variable]
92 | struct device *pm_dev;
| ^~~~~~
vim +/pm_dev +92 drivers/net/phy/mediatek/mtk-2p5ge.c
f74876ffb0bd38 Daniel Golle 2023-02-28 86
f74876ffb0bd38 Daniel Golle 2023-02-28 87 static int mt7988_2p5ge_phy_config_init(struct phy_device *phydev)
f74876ffb0bd38 Daniel Golle 2023-02-28 88 {
f74876ffb0bd38 Daniel Golle 2023-02-28 89 int ret, i;
f74876ffb0bd38 Daniel Golle 2023-02-28 90 const struct firmware *fw;
f74876ffb0bd38 Daniel Golle 2023-02-28 91 struct device *dev = &phydev->mdio.dev;
f74876ffb0bd38 Daniel Golle 2023-02-28 @92 struct device *pm_dev;
f74876ffb0bd38 Daniel Golle 2023-02-28 93 struct device_node *np;
f74876ffb0bd38 Daniel Golle 2023-02-28 94 void __iomem *pmb_addr;
f74876ffb0bd38 Daniel Golle 2023-02-28 95 void __iomem *md32_en_cfg_base;
f74876ffb0bd38 Daniel Golle 2023-02-28 96 struct mtk_i2p5ge_phy_priv *phy_priv = phydev->priv;
f74876ffb0bd38 Daniel Golle 2023-02-28 97 u16 reg;
f74876ffb0bd38 Daniel Golle 2023-02-28 98 struct pinctrl *pinctrl;
f74876ffb0bd38 Daniel Golle 2023-02-28 99
f74876ffb0bd38 Daniel Golle 2023-02-28 100 if (!phy_priv->fw_loaded) {
f74876ffb0bd38 Daniel Golle 2023-02-28 101 np = of_find_compatible_node(NULL, NULL, "mediatek,2p5gphy-fw");
f74876ffb0bd38 Daniel Golle 2023-02-28 102 if (!np)
f74876ffb0bd38 Daniel Golle 2023-02-28 103 return -ENOENT;
f74876ffb0bd38 Daniel Golle 2023-02-28 104 pmb_addr = of_iomap(np, 0);
f74876ffb0bd38 Daniel Golle 2023-02-28 105 if (!pmb_addr)
f74876ffb0bd38 Daniel Golle 2023-02-28 106 return -ENOMEM;
f74876ffb0bd38 Daniel Golle 2023-02-28 107 md32_en_cfg_base = of_iomap(np, 1);
f74876ffb0bd38 Daniel Golle 2023-02-28 108 if (!md32_en_cfg_base)
f74876ffb0bd38 Daniel Golle 2023-02-28 109 return -ENOMEM;
f74876ffb0bd38 Daniel Golle 2023-02-28 110
f74876ffb0bd38 Daniel Golle 2023-02-28 111 ret = request_firmware(&fw, MT7988_2P5GE_PMB_FW, dev);
f74876ffb0bd38 Daniel Golle 2023-02-28 112 if (ret) {
f74876ffb0bd38 Daniel Golle 2023-02-28 113 dev_err(dev, "failed to load firmware: %s, ret: %d\n",
f74876ffb0bd38 Daniel Golle 2023-02-28 114 MT7988_2P5GE_PMB_FW, ret);
f74876ffb0bd38 Daniel Golle 2023-02-28 115 return ret;
f74876ffb0bd38 Daniel Golle 2023-02-28 116 }
f74876ffb0bd38 Daniel Golle 2023-02-28 117
f74876ffb0bd38 Daniel Golle 2023-02-28 118 reg = readw(md32_en_cfg_base);
f74876ffb0bd38 Daniel Golle 2023-02-28 119 writew(reg | DMEM_PRIORITY | PMEM_PRIORITY, md32_en_cfg_base);
f74876ffb0bd38 Daniel Golle 2023-02-28 120
f74876ffb0bd38 Daniel Golle 2023-02-28 121 for (i = 0; i < fw->size - 1; i += 4)
f74876ffb0bd38 Daniel Golle 2023-02-28 122 writel(*((uint32_t *)(fw->data + i)), pmb_addr + i);
f74876ffb0bd38 Daniel Golle 2023-02-28 123 release_firmware(fw);
f74876ffb0bd38 Daniel Golle 2023-02-28 124
f74876ffb0bd38 Daniel Golle 2023-02-28 125 reg = readw(md32_en_cfg_base);
f74876ffb0bd38 Daniel Golle 2023-02-28 126 reg &= ~(DMEM_PRIORITY | PMEM_PRIORITY | MD32_EN);
f74876ffb0bd38 Daniel Golle 2023-02-28 127 writew(reg, md32_en_cfg_base);
f74876ffb0bd38 Daniel Golle 2023-02-28 128 writew(reg | MD32_EN, md32_en_cfg_base);
f74876ffb0bd38 Daniel Golle 2023-02-28 129 dev_info(dev, "Firmware loading/trigger ok.\n");
f74876ffb0bd38 Daniel Golle 2023-02-28 130
f74876ffb0bd38 Daniel Golle 2023-02-28 131 phy_priv->fw_loaded = true;
f74876ffb0bd38 Daniel Golle 2023-02-28 132 }
f74876ffb0bd38 Daniel Golle 2023-02-28 133
f74876ffb0bd38 Daniel Golle 2023-02-28 134 /* Setup LED */
f74876ffb0bd38 Daniel Golle 2023-02-28 135 phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_ON_CTRL,
f74876ffb0bd38 Daniel Golle 2023-02-28 136 MTK_PHY_LED0_POLARITY | MTK_PHY_LED0_ON_LINK10 |
f74876ffb0bd38 Daniel Golle 2023-02-28 137 MTK_PHY_LED0_ON_LINK100 | MTK_PHY_LED0_ON_LINK1000 |
f74876ffb0bd38 Daniel Golle 2023-02-28 138 MTK_PHY_LED0_ON_LINK2500);
f74876ffb0bd38 Daniel Golle 2023-02-28 139 phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED1_ON_CTRL,
f74876ffb0bd38 Daniel Golle 2023-02-28 140 MTK_PHY_LED1_ON_FDX | MTK_PHY_LED1_ON_HDX);
f74876ffb0bd38 Daniel Golle 2023-02-28 141
f74876ffb0bd38 Daniel Golle 2023-02-28 142 pinctrl = devm_pinctrl_get_select(&phydev->mdio.dev, "i2p5gbe-led");
f74876ffb0bd38 Daniel Golle 2023-02-28 143 if (IS_ERR(pinctrl)) {
f74876ffb0bd38 Daniel Golle 2023-02-28 144 dev_err(&phydev->mdio.dev, "Fail to set LED pins!\n");
f74876ffb0bd38 Daniel Golle 2023-02-28 145 return PTR_ERR(pinctrl);
f74876ffb0bd38 Daniel Golle 2023-02-28 146 }
f74876ffb0bd38 Daniel Golle 2023-02-28 147
f74876ffb0bd38 Daniel Golle 2023-02-28 148 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LPI_PCS_DSP_CTRL,
f74876ffb0bd38 Daniel Golle 2023-02-28 149 MTK_PHY_LPI_SIG_EN_LO_THRESH100_MASK, 0);
f74876ffb0bd38 Daniel Golle 2023-02-28 150
f74876ffb0bd38 Daniel Golle 2023-02-28 151 /* Enable 16-bit next page exchange bit if 1000-BT isn't advertizing */
f74876ffb0bd38 Daniel Golle 2023-02-28 152 phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
f74876ffb0bd38 Daniel Golle 2023-02-28 153 __phy_write(phydev, 0x11, 0xfbfa);
f74876ffb0bd38 Daniel Golle 2023-02-28 154 __phy_write(phydev, 0x12, 0xc3);
f74876ffb0bd38 Daniel Golle 2023-02-28 155 __phy_write(phydev, 0x10, 0x87f8);
f74876ffb0bd38 Daniel Golle 2023-02-28 156 phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
f74876ffb0bd38 Daniel Golle 2023-02-28 157
f74876ffb0bd38 Daniel Golle 2023-02-28 158 return 0;
f74876ffb0bd38 Daniel Golle 2023-02-28 159 }
f74876ffb0bd38 Daniel Golle 2023-02-28 160
:::::: The code at line 92 was first introduced by commit
:::::: f74876ffb0bd38e20a6d865151cfdadef09d34fe net: phy: add driver for MediaTek 2.5G PHY
:::::: TO: Daniel Golle <daniel@makrotopia.org>
:::::: CC: Frank Wunderlich <frank-w@public-files.de>
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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2025-04-25 22:16 [frank-w-bpi-r2-4.14:6.13-main 74/81] drivers/net/phy/mediatek/mtk-2p5ge.c:92:24: warning: unused variable 'pm_dev' kernel test robot
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