[PATCH v3 0/2] Fix PLL lock timeout and calibration wait time

From: Devarsh Thakkar <devarsht@ti.com>
To: <vkoul@kernel.org>, <kishon@kernel.org>, <mripard@kernel.org>,
	<linux-phy@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: <sakari.ailus@linux.intel.com>, <u.kleine-koenig@baylibre.com>,
	<vigneshr@ti.com>, <aradhya.bhatia@linux.dev>, <s-jain1@ti.com>,
	<r-donadkar@ti.com>, <tomi.valkeinen@ideasonboard.com>,
	<devarsht@ti.com>
Subject: [PATCH v3 0/2] Fix PLL lock timeout and calibration wait time
Date: Fri, 2 May 2025 09:04:49 +0530	[thread overview]
Message-ID: <20250502033451.2291330-1-devarsht@ti.com> (raw)

This fixes PLL lockup and O_CMN_READY timeout by moving the polling
function after common state machine gets enabled. Also fix the
calibration wait time to optimize the polling time.

Changelog:
V3: 
-   Use read-modify-write for using calibrated value for PLL
    lock time
-   Move out PLL clock configuration part to power_on function

V2: Separate patch for calibration logic and
    return error code on polling 

Previous versions:
V2: https://lore.kernel.org/all/20250326152320.3835249-1-devarsht@ti.com/
V1: https://lore.kernel.org/all/20241230125319.941372-1-devarsht@ti.com/

Test logs:
Link: https://gist.github.com/devarsht/89e4830e886774fcd50aa6e29cce3a79

Rangediff:
V2->V3:
https://gist.github.com/devarsht/c4d2c4f6715ec7aa4df4cb2c7991b7aa

Devarsh Thakkar (2):
  phy: cadence: cdns-dphy: Fix PLL lock and O_CMN_READY polling
  phy: cadence: cdns-dphy: Update calibration wait time for startup
    state machine

 drivers/phy/cadence/cdns-dphy.c | 111 +++++++++++++++++++++++++-------
 1 file changed, 87 insertions(+), 24 deletions(-)

-- 
2.39.1

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