* [PULL v2 00/59] tcg patch queue
@ 2025-05-05 19:50 Richard Henderson
2025-05-05 19:50 ` [PULL v2 48/59] accel/tcg: Use vaddr in cpu_loop.h Richard Henderson
2025-05-07 13:17 ` [PULL v2 00/59] tcg patch queue Stefan Hajnoczi
0 siblings, 2 replies; 3+ messages in thread
From: Richard Henderson @ 2025-05-05 19:50 UTC (permalink / raw)
To: qemu-devel
v2: Fix a bsd-user build error.
r~
The following changes since commit 5134cf9b5d3aee4475fe7e1c1c11b093731073cf:
Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging (2025-04-30 13:34:44 -0400)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20250501-v2
for you to fetch changes up to 768cb76d14f1a50c00d60fbb1d393996c76645d8:
accel/tcg: Build user-exec.c once (2025-05-05 09:24:10 -0700)
----------------------------------------------------------------
include: Remove 'exec/exec-all.h'
accel/tcg: Build tb-maint.c twice
accel/tcg: Build cpu-exec.c twice
accel/tcg: Build translate-all.c twice
accel/tcg: Build tcg-all.c twice
accel/tcg: Build cputlb.c once
accel/tcg: Build user-exec.c once
----------------------------------------------------------------
Philippe Mathieu-Daudé (10):
include/exec: Include missing headers in exec-all.h
target/riscv: Include missing 'accel/tcg/getpc.h' in csr.c
accel/tcg: Include 'accel/tcg/getpc.h' in 'exec/helper-proto'
physmem: Move TCG IOTLB methods around
physmem: Restrict TCG IOTLB code to TCG accel
accel/tcg: Extract probe API out of 'exec/exec-all.h'
include: Remove 'exec/exec-all.h'
system/vl: Filter machine list available for a particular target binary
qemu/target_info: Add %target_cpu_type field to TargetInfo
qemu: Introduce target_long_bits()
Richard Henderson (49):
accel/tcg: Add CPUState argument to page_unprotect
accel/tcg: Add CPUState argument to tb_invalidate_phys_page_unwind
accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked
accel/tcg: Merge tb_invalidate_phys_range{__locked}
accel/tcg: Add CPUState arg to tb_invalidate_phys_range
accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast
accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc
accel/tcg: Simplify CPU_TLB_DYN_MAX_BITS
accel/tcg: Simplify L1_MAP_ADDR_SPACE_BITS
accel/tcg: Merge internal-target.h into internal-common.h
accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target
accel/tcg: Use vaddr for walk_memory_regions callback
accel/tcg: Use vaddr in user/page-protection.h
include/exec: Move tb_invalidate_phys_range to translation-block.h
accel/tcg: Compile tb-maint.c twice
accel/tcg: Remove #error for non-tcg in getpc.h
accel/tcg: Generalize fake_user_interrupt test
accel/tcg: Unconditionally use CPU_DUMP_CCOP in log_cpu_exec
accel/tcg: Introduce TCGCPUOps.cpu_exec_reset
target/i386: Split out x86_cpu_exec_reset
accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h
target/arm: Move cpu_get_tb_cpu_state to hflags.c
target/arm: Unexport assert_hflags_rebuild_correctly
target/riscv: Move cpu_get_tb_cpu_state to tcg-cpu.c
accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state
accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps
accel/tcg: Pass TCGTBCPUState to tb_lookup
accel/tcg: Pass TCGTBCPUState to tb_htable_lookup
accel/tcg: Use TCGTBCPUState in struct tb_desc
accel/tcg: Pass TCGTBCPUState to tb_gen_code
accel/tcg: Split out accel/tcg/helper-retaddr.h
accel/tcg: Compile cpu-exec.c twice
tcg: Define INSN_START_WORDS as constant 3
accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128
accel/tcg: Use target_long_bits() in translate-all.c
accel/tcg: Build translate-all.c twice
accel/tcg: Build tcg-all.c twice
accel/tcg: Use vaddr in cpu_loop.h
accel/tcg: Move user-only tlb_vaddr_to_host out of line
accel/tcg: Move tlb_vaddr_to_host declaration to probe.h
accel/tcg: Use target_long_bits() in cputlb.c
accel/tcg: Use vaddr for plugin_{load,store}_cb
accel/tcg: Build cputlb.c once
include/user: Convert GUEST_ADDR_MAX to a variable
include/user: Use vaddr in guest-host.h
accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr
accel/tcg: Remove TARGET_PAGE_DATA_SIZE
accel/tcg: Avoid abi_ptr in user-exec.c
accel/tcg: Build user-exec.c once
accel/tcg/internal-common.h | 37 +++++-
accel/tcg/internal-target.h | 46 -------
accel/tcg/tb-hash.h | 3 +-
accel/tcg/tb-internal.h | 8 +-
accel/tcg/tlb-bounds.h | 21 +---
bsd-user/qemu.h | 1 -
include/accel/tcg/cpu-ldst.h | 58 ---------
include/accel/tcg/cpu-ops.h | 23 ++++
include/accel/tcg/getpc.h | 4 -
include/accel/tcg/helper-retaddr.h | 43 +++++++
include/accel/tcg/iommu.h | 41 +++++++
include/{exec/exec-all.h => accel/tcg/probe.h} | 67 +++-------
include/accel/tcg/tb-cpu-state.h | 18 +++
include/exec/helper-proto-common.h | 2 +
include/exec/poison.h | 1 -
include/exec/translation-block.h | 4 +
include/qemu/target-info-impl.h | 6 +
include/qemu/target-info.h | 15 +++
include/system/ram_addr.h | 1 -
include/tcg/insn-start-words.h | 11 +-
include/tcg/tcg-op.h | 17 ++-
include/tcg/tcg-opc.h | 3 +-
include/tcg/tcg.h | 12 +-
include/user/cpu_loop.h | 12 +-
include/user/guest-host.h | 49 +++-----
include/user/page-protection.h | 30 +++--
linux-user/user-internals.h | 1 -
target/alpha/cpu.h | 11 --
target/arm/cpu-param.h | 7 +-
target/arm/cpu.h | 39 +-----
target/arm/internals.h | 4 +-
target/arm/tcg/translate.h | 1 -
target/avr/cpu.h | 18 ---
target/hexagon/cpu.h | 15 ---
target/hexagon/mmvec/macros.h | 1 +
target/hppa/cpu.h | 3 -
target/i386/cpu.h | 18 ---
target/i386/tcg/helper-tcg.h | 1 -
target/loongarch/cpu.h | 12 --
target/m68k/cpu.h | 16 ---
target/microblaze/cpu.h | 8 --
target/mips/cpu.h | 9 --
target/openrisc/cpu.h | 10 --
target/ppc/cpu.h | 13 --
target/ppc/internal.h | 3 +
target/riscv/cpu.h | 3 -
target/rx/cpu.h | 9 --
target/s390x/cpu.h | 11 --
target/sh4/cpu.h | 15 ---
target/sparc/cpu.h | 3 -
target/tricore/cpu.h | 12 --
target/xtensa/cpu.h | 68 ----------
accel/hvf/hvf-accel-ops.c | 1 -
accel/tcg/cpu-exec.c | 164 ++++++++++---------------
accel/tcg/cputlb.c | 34 ++---
accel/tcg/tb-maint.c | 100 ++++++---------
accel/tcg/tcg-all.c | 6 +-
accel/tcg/translate-all.c | 95 +++++---------
accel/tcg/user-exec.c | 145 ++++++++++++----------
bsd-user/main.c | 9 +-
bsd-user/signal.c | 4 +-
hw/ppc/spapr_nested.c | 1 -
hw/riscv/riscv-iommu-sys.c | 1 -
hw/sh4/sh7750.c | 1 -
linux-user/elfload.c | 21 ++--
linux-user/main.c | 9 +-
linux-user/signal.c | 4 +-
linux-user/syscall.c | 8 +-
semihosting/uaccess.c | 2 +-
system/physmem.c | 58 +++++----
system/vl.c | 3 +-
target-info-stub.c | 9 +-
target-info.c | 15 +++
target/alpha/cpu.c | 18 ++-
target/alpha/fpu_helper.c | 1 -
target/alpha/int_helper.c | 1 -
target/alpha/mem_helper.c | 1 -
target/alpha/translate.c | 1 -
target/alpha/vax_helper.c | 1 -
target/arm/cpu.c | 30 ++++-
target/arm/debug_helper.c | 1 -
target/arm/helper.c | 113 +----------------
target/arm/ptw.c | 2 +-
target/arm/tcg-stubs.c | 4 -
target/arm/tcg/cpu-v7m.c | 2 +
target/arm/tcg/helper-a64.c | 3 +-
target/arm/tcg/hflags.c | 117 +++++++++++++++++-
target/arm/tcg/m_helper.c | 1 -
target/arm/tcg/mte_helper.c | 6 +-
target/arm/tcg/mve_helper.c | 1 -
target/arm/tcg/op_helper.c | 2 +-
target/arm/tcg/pauth_helper.c | 1 -
target/arm/tcg/sme_helper.c | 2 +-
target/arm/tcg/sve_helper.c | 3 +-
target/arm/tcg/tlb_helper.c | 1 -
target/arm/tcg/translate-a64.c | 1 -
target/avr/cpu.c | 21 +++-
target/avr/helper.c | 1 -
target/avr/translate.c | 1 -
target/hexagon/cpu.c | 21 +++-
target/hexagon/op_helper.c | 2 +-
target/hppa/cpu.c | 16 +--
target/hppa/fpu_helper.c | 1 -
target/hppa/helper.c | 1 -
target/hppa/mem_helper.c | 2 +-
target/hppa/op_helper.c | 2 +-
target/hppa/sys_helper.c | 1 -
target/hppa/translate.c | 1 -
target/i386/helper.c | 2 +-
target/i386/tcg/access.c | 2 +-
target/i386/tcg/excp_helper.c | 1 -
target/i386/tcg/int_helper.c | 1 -
target/i386/tcg/mem_helper.c | 1 -
target/i386/tcg/mpx_helper.c | 1 -
target/i386/tcg/seg_helper.c | 2 +-
target/i386/tcg/system/bpt_helper.c | 1 -
target/i386/tcg/system/excp_helper.c | 1 +
target/i386/tcg/tcg-cpu.c | 34 ++++-
target/i386/tcg/translate.c | 1 -
target/i386/tcg/user/excp_helper.c | 1 -
target/i386/tcg/user/seg_helper.c | 1 -
target/loongarch/cpu.c | 20 ++-
target/loongarch/tcg/fpu_helper.c | 1 -
target/loongarch/tcg/iocsr_helper.c | 1 -
target/loongarch/tcg/op_helper.c | 1 -
target/loongarch/tcg/tlb_helper.c | 1 -
target/loongarch/tcg/vec_helper.c | 1 -
target/m68k/cpu.c | 24 +++-
target/m68k/fpu_helper.c | 1 -
target/m68k/helper.c | 1 -
target/m68k/op_helper.c | 1 -
target/m68k/translate.c | 1 -
target/microblaze/cpu.c | 17 ++-
target/microblaze/op_helper.c | 1 -
target/microblaze/translate.c | 1 -
target/mips/cpu.c | 14 ++-
target/mips/system/physaddr.c | 1 -
target/mips/tcg/exception.c | 1 -
target/mips/tcg/fpu_helper.c | 1 -
target/mips/tcg/ldst_helper.c | 1 -
target/mips/tcg/msa_helper.c | 2 +-
target/mips/tcg/op_helper.c | 1 -
target/mips/tcg/system/special_helper.c | 1 -
target/mips/tcg/system/tlb_helper.c | 1 -
target/openrisc/cpu.c | 18 ++-
target/openrisc/exception.c | 1 -
target/openrisc/exception_helper.c | 1 -
target/openrisc/fpu_helper.c | 1 -
target/openrisc/interrupt.c | 1 -
target/openrisc/interrupt_helper.c | 1 -
target/openrisc/sys_helper.c | 3 +-
target/openrisc/translate.c | 1 -
target/ppc/cpu_init.c | 3 +-
target/ppc/excp_helper.c | 1 -
target/ppc/fpu_helper.c | 1 -
target/ppc/helper_regs.c | 19 ++-
target/ppc/machine.c | 1 -
target/ppc/mem_helper.c | 3 +-
target/ppc/misc_helper.c | 1 -
target/ppc/mmu-hash32.c | 1 -
target/ppc/mmu-hash64.c | 1 -
target/ppc/mmu-radix64.c | 1 -
target/ppc/mmu_common.c | 1 -
target/ppc/mmu_helper.c | 1 -
target/ppc/power8-pmu.c | 1 -
target/ppc/tcg-excp_helper.c | 1 -
target/ppc/timebase_helper.c | 1 -
target/ppc/translate.c | 1 -
target/ppc/user_only_helper.c | 1 -
target/riscv/cpu.c | 1 -
target/riscv/cpu_helper.c | 98 ---------------
target/riscv/crypto_helper.c | 1 -
target/riscv/csr.c | 2 +-
target/riscv/debug.c | 1 -
target/riscv/fpu_helper.c | 1 -
target/riscv/m128_helper.c | 1 -
target/riscv/op_helper.c | 2 +-
target/riscv/tcg/tcg-cpu.c | 101 ++++++++++++++-
target/riscv/translate.c | 1 -
target/riscv/vcrypto_helper.c | 1 -
target/riscv/vector_helper.c | 2 +-
target/riscv/zce_helper.c | 1 -
target/rx/cpu.c | 16 ++-
target/rx/op_helper.c | 1 -
target/rx/translate.c | 1 -
target/s390x/cpu.c | 18 ++-
target/s390x/interrupt.c | 1 -
target/s390x/mmu_helper.c | 1 -
target/s390x/sigp.c | 1 -
target/s390x/tcg/cc_helper.c | 1 -
target/s390x/tcg/crypto_helper.c | 1 -
target/s390x/tcg/excp_helper.c | 1 -
target/s390x/tcg/fpu_helper.c | 1 -
target/s390x/tcg/int_helper.c | 1 -
target/s390x/tcg/mem_helper.c | 3 +-
target/s390x/tcg/misc_helper.c | 1 -
target/s390x/tcg/translate.c | 1 -
target/s390x/tcg/vec_fpu_helper.c | 1 -
target/s390x/tcg/vec_helper.c | 1 -
target/sh4/cpu.c | 29 ++++-
target/sh4/helper.c | 1 -
target/sh4/op_helper.c | 1 -
target/sh4/translate.c | 1 -
target/sparc/cpu.c | 20 +--
target/sparc/fop_helper.c | 1 -
target/sparc/helper.c | 1 -
target/sparc/ldst_helper.c | 1 -
target/sparc/machine.c | 1 -
target/sparc/translate.c | 1 -
target/sparc/win_helper.c | 1 -
target/tricore/cpu.c | 16 ++-
target/tricore/op_helper.c | 1 -
target/tricore/translate.c | 1 -
target/xtensa/cpu.c | 79 +++++++++++-
target/xtensa/dbg_helper.c | 1 -
target/xtensa/exc_helper.c | 1 -
target/xtensa/fpu_helper.c | 1 -
target/xtensa/mmu_helper.c | 2 +-
target/xtensa/op_helper.c | 1 -
target/xtensa/translate.c | 1 -
target/xtensa/win_helper.c | 1 -
tcg/perf.c | 5 +-
tcg/tcg.c | 12 +-
MAINTAINERS | 3 +-
accel/tcg/ldst_common.c.inc | 4 +-
accel/tcg/meson.build | 20 +--
226 files changed, 1232 insertions(+), 1366 deletions(-)
delete mode 100644 accel/tcg/internal-target.h
create mode 100644 include/accel/tcg/helper-retaddr.h
create mode 100644 include/accel/tcg/iommu.h
rename include/{exec/exec-all.h => accel/tcg/probe.h} (64%)
create mode 100644 include/accel/tcg/tb-cpu-state.h
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PULL v2 48/59] accel/tcg: Use vaddr in cpu_loop.h
2025-05-05 19:50 [PULL v2 00/59] tcg patch queue Richard Henderson
@ 2025-05-05 19:50 ` Richard Henderson
2025-05-07 13:17 ` [PULL v2 00/59] tcg patch queue Stefan Hajnoczi
1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2025-05-05 19:50 UTC (permalink / raw)
To: qemu-devel; +Cc: Pierrick Bouvier
Use vaddr instead of abi_ptr or target_ulong for a guest address.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/user/cpu_loop.h | 12 +++++-------
accel/tcg/user-exec.c | 2 +-
bsd-user/signal.c | 4 ++--
linux-user/signal.c | 4 ++--
4 files changed, 10 insertions(+), 12 deletions(-)
diff --git a/include/user/cpu_loop.h b/include/user/cpu_loop.h
index 589c66543f..ad8a1d711f 100644
--- a/include/user/cpu_loop.h
+++ b/include/user/cpu_loop.h
@@ -20,11 +20,9 @@
#ifndef USER_CPU_LOOP_H
#define USER_CPU_LOOP_H
-#include "exec/abi_ptr.h"
+#include "exec/vaddr.h"
#include "exec/mmu-access-type.h"
-#include "exec/log.h"
-#include "exec/target_long.h"
-#include "special-errno.h"
+
/**
* adjust_signal_pc:
@@ -46,7 +44,7 @@ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write);
* Return true if the write fault has been handled, and should be re-tried.
*/
bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set,
- uintptr_t host_pc, abi_ptr guest_addr);
+ uintptr_t host_pc, vaddr guest_addr);
/**
* cpu_loop_exit_sigsegv:
@@ -59,7 +57,7 @@ bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set,
* Use the TCGCPUOps hook to record cpu state, do guest operating system
* specific things to raise SIGSEGV, and jump to the main cpu loop.
*/
-G_NORETURN void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
+G_NORETURN void cpu_loop_exit_sigsegv(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
bool maperr, uintptr_t ra);
@@ -73,7 +71,7 @@ G_NORETURN void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
* Use the TCGCPUOps hook to record cpu state, do guest operating system
* specific things to raise SIGBUS, and jump to the main cpu loop.
*/
-G_NORETURN void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr,
+G_NORETURN void cpu_loop_exit_sigbus(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
uintptr_t ra);
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 68e01fc584..e1f4c4eacf 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -126,7 +126,7 @@ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write)
* guest, we'd end up in an infinite loop of retrying the faulting access.
*/
bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set,
- uintptr_t host_pc, abi_ptr guest_addr)
+ uintptr_t host_pc, vaddr guest_addr)
{
switch (page_unprotect(cpu, guest_addr, host_pc)) {
case 0:
diff --git a/bsd-user/signal.c b/bsd-user/signal.c
index 1aa0fd79d6..dadcc037dc 100644
--- a/bsd-user/signal.c
+++ b/bsd-user/signal.c
@@ -1030,7 +1030,7 @@ void process_pending_signals(CPUArchState *env)
ts->in_sigsuspend = false;
}
-void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
+void cpu_loop_exit_sigsegv(CPUState *cpu, vaddr addr,
MMUAccessType access_type, bool maperr, uintptr_t ra)
{
const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops;
@@ -1046,7 +1046,7 @@ void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
cpu_loop_exit_restore(cpu, ra);
}
-void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr,
+void cpu_loop_exit_sigbus(CPUState *cpu, vaddr addr,
MMUAccessType access_type, uintptr_t ra)
{
const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops;
diff --git a/linux-user/signal.c b/linux-user/signal.c
index 4dafc2c3a2..cd0e7398aa 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -750,7 +750,7 @@ void force_sigsegv(int oldsig)
}
#endif
-void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
+void cpu_loop_exit_sigsegv(CPUState *cpu, vaddr addr,
MMUAccessType access_type, bool maperr, uintptr_t ra)
{
const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops;
@@ -766,7 +766,7 @@ void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
cpu_loop_exit_restore(cpu, ra);
}
-void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr,
+void cpu_loop_exit_sigbus(CPUState *cpu, vaddr addr,
MMUAccessType access_type, uintptr_t ra)
{
const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops;
--
2.43.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PULL v2 00/59] tcg patch queue
2025-05-05 19:50 [PULL v2 00/59] tcg patch queue Richard Henderson
2025-05-05 19:50 ` [PULL v2 48/59] accel/tcg: Use vaddr in cpu_loop.h Richard Henderson
@ 2025-05-07 13:17 ` Stefan Hajnoczi
1 sibling, 0 replies; 3+ messages in thread
From: Stefan Hajnoczi @ 2025-05-07 13:17 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
[-- Attachment #1: Type: text/plain, Size: 116 bytes --]
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.1 for any user-visible changes.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2025-05-07 13:18 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2025-05-05 19:50 [PULL v2 00/59] tcg patch queue Richard Henderson
2025-05-05 19:50 ` [PULL v2 48/59] accel/tcg: Use vaddr in cpu_loop.h Richard Henderson
2025-05-07 13:17 ` [PULL v2 00/59] tcg patch queue Stefan Hajnoczi
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