* [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support
@ 2025-04-27 7:01 Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 1/9] media: qcom: camss: add generic csid handling in csid gen3 Vikram Sharma
` (8 more replies)
0 siblings, 9 replies; 17+ messages in thread
From: Vikram Sharma @ 2025-04-27 7:01 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel
From: Vikram Sharma <vikramsa@qti.qualcomm.com>
Posting these changes as RFC/WIP because there is some renaming done for
existing files so that same files can be used for multiple vfe/csid
version.
SA8775P is a Qualcomm SoC. This series adds bindings and devicetree to bring
up CSIPHY, TPG, CSID, VFE/RDI interfaces in SA8775P.
SA8775P provides
- 2 x VFE, 3 RDI per VFE
- 5 x VFE Lite, 6 RDI per VFE
- 2 x CSID
- 5 x CSID Lite
- 3 x TPG
- 4 x CSIPHY
Changes compared to v1:
- Renaming camss-vfe-780.c to camss-vfe-gen2.c and camss-csid-780 to
camss-csid-gen3 to avoid code duplication for SA8775P.SA877P have csid
690 and vfe 690 which is almost same as csid/vfe 780 with very minor
change in register bitfield.
- Restructure vfe and csid addition to reuse existing files.
- Updated cisd-lite and vfe-lite interuppt names.
- add enumeration changes as seprate patch.
- Update required fileds in bindings.
- Link to v1:
DT: https://lore.kernel.org/linux-arm-msm/20250210155605.575367-1-quic_vikramsa@quicinc.com/
Driver: https://lore.kernel.org/linux-media/20250210162843.609337-1-quic_vikramsa@quicinc.com/
Sanity check for these patches:
- make CHECK_DTBS=y W=1 DT_SCHEMA_FILES=media/qcom,sa8775p-camss.yaml
- make DT_CHECKER_FLAGS=-m W=1
DT_SCHEMA_FILES=media/qcom,sa8775p-camss.yaml dt_binding_check
- checkpatch.pl
- Smatch: make CHECK="smatch --full-path" M=drivers/media/platform/qcom/camss/
- Sparse: make C=2 M=drivers/media/platform/qcom/camss/
- make -j32 W=1
We have tested this on qcs9100-ride board with 'Test Pattern Generator'
TPG driver support will be posted in a follow up series.
Tested with following commands:
- media-ctl -d /dev/media0 --reset
- yavta --no-query -w '0x009f0903 0' /dev/v4l-subdev0
- media-ctl -d /dev/media0 -V '"msm_tpg0":0[fmt:SRGGB10/1920x1080
field:none]'
- media-ctl -d /dev/media0 -V '"msm_csid0":0[fmt:SRGGB10/1920x1080
field:none]'
- media-ctl -d /dev/media0 -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/1920x1080
field:none]'
- media-ctl -d /dev/media0 -l '"msm_tpg0":1->"msm_csid0":0[1]'
- media-ctl -d /dev/media0 -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
- yavta --no-query -w '0x009f0903 9' /dev/v4l-subdev0
- yavta -B capture-mplane -n 5 -f SRGGB10P -s 1920x1080 /dev/video0
--capture=7
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
Vikram Sharma (9):
media: qcom: camss: add generic csid handling in csid gen3
media: qcom: camss: add generic vfe handling in vfe gen3
media: dt-bindings: Add qcom,sa8775p-camss
arm64: dts: qcom: sa8775p: Add support for camss
media: qcom: camss: Add sa8775p compatible
media: qcom: camss: Add support for CSIPHY 690
media: qcom: camss: Add support for CSID for sa8775p
media: qcom: camss: Add support for VFE 690
media: qcom: camss: Enumerate resources for SA8775P
.../bindings/media/qcom,sa8775p-camss.yaml | 352 +++++++++++++
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 187 +++++++
drivers/media/platform/qcom/camss/Makefile | 4 +-
.../{camss-csid-780.c => camss-csid-gen3.c} | 42 +-
.../{camss-csid-780.h => camss-csid-gen3.h} | 9 +-
.../media/platform/qcom/camss/camss-csid.h | 2 +-
.../qcom/camss/camss-csiphy-3ph-1-0.c | 84 ++++
.../media/platform/qcom/camss/camss-csiphy.c | 5 +
.../media/platform/qcom/camss/camss-csiphy.h | 1 +
.../{camss-vfe-780.c => camss-vfe-gen3.c} | 9 +-
drivers/media/platform/qcom/camss/camss-vfe.c | 5 +-
drivers/media/platform/qcom/camss/camss-vfe.h | 2 +-
drivers/media/platform/qcom/camss/camss.c | 461 +++++++++++++++++-
drivers/media/platform/qcom/camss/camss.h | 1 +
14 files changed, 1130 insertions(+), 34 deletions(-)
create mode 100644 Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml
rename drivers/media/platform/qcom/camss/{camss-csid-780.c => camss-csid-gen3.c} (87%)
rename drivers/media/platform/qcom/camss/{camss-csid-780.h => camss-csid-gen3.h} (84%)
rename drivers/media/platform/qcom/camss/{camss-vfe-780.c => camss-vfe-gen3.c} (95%)
--
2.25.1
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH RFC/WIP v2 1/9] media: qcom: camss: add generic csid handling in csid gen3
2025-04-27 7:01 [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support Vikram Sharma
@ 2025-04-27 7:01 ` Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 2/9] media: qcom: camss: add generic vfe handling in vfe gen3 Vikram Sharma
` (7 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Vikram Sharma @ 2025-04-27 7:01 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel
Rename camss-csid-780.c to camss-csid-gen3.c to avoid code duplication
for later SOCs i.e SA8775P. SA8775P have csid 690 which is almost same
as csid 780 with very minor changes in register bitfield.
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
drivers/media/platform/qcom/camss/Makefile | 2 +-
.../camss/{camss-csid-780.c => camss-csid-gen3.c} | 11 +++++++----
.../camss/{camss-csid-780.h => camss-csid-gen3.h} | 9 +++++----
drivers/media/platform/qcom/camss/camss-csid.h | 2 +-
drivers/media/platform/qcom/camss/camss.c | 10 +++++-----
5 files changed, 19 insertions(+), 15 deletions(-)
rename drivers/media/platform/qcom/camss/{camss-csid-780.c => camss-csid-gen3.c} (97%)
rename drivers/media/platform/qcom/camss/{camss-csid-780.h => camss-csid-gen3.h} (84%)
diff --git a/drivers/media/platform/qcom/camss/Makefile b/drivers/media/platform/qcom/camss/Makefile
index d26a9c24a430..ee869e69521a 100644
--- a/drivers/media/platform/qcom/camss/Makefile
+++ b/drivers/media/platform/qcom/camss/Makefile
@@ -8,7 +8,7 @@ qcom-camss-objs += \
camss-csid-4-7.o \
camss-csid-680.o \
camss-csid-gen2.o \
- camss-csid-780.o \
+ camss-csid-gen3.o \
camss-csiphy-2ph-1-0.o \
camss-csiphy-3ph-1-0.o \
camss-csiphy.o \
diff --git a/drivers/media/platform/qcom/camss/camss-csid-780.c b/drivers/media/platform/qcom/camss/camss-csid-gen3.c
similarity index 97%
rename from drivers/media/platform/qcom/camss/camss-csid-780.c
rename to drivers/media/platform/qcom/camss/camss-csid-gen3.c
index 4c720d177731..b66105f7b901 100644
--- a/drivers/media/platform/qcom/camss/camss-csid-780.c
+++ b/drivers/media/platform/qcom/camss/camss-csid-gen3.c
@@ -1,9 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Qualcomm MSM Camera Subsystem - CSID (CSI Decoder) Module
+ * Qualcomm MSM Camera Subsystem - CSID (CSI Decoder) Module gen3
+ * Gen3 Supports Qualcomm csid version 780 and 690
*
* Copyright (c) 2024 Qualcomm Technologies, Inc.
*/
+
+
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
@@ -13,7 +16,7 @@
#include "camss.h"
#include "camss-csid.h"
-#include "camss-csid-780.h"
+#include "camss-csid-gen3.h"
#define CSID_IO_PATH_CFG0(csid) (0x4 * (csid))
#define OUTPUT_IFE_EN 0x100
@@ -259,7 +262,7 @@ static irqreturn_t csid_isr(int irq, void *dev)
if (buf_done_val & BIT(BUF_DONE_IRQ_STATUS_RDI_OFFSET + i)) {
/*
- * For Titan 780, bus done and RUP IRQ have been moved to
+ * For Titan Gen3, bus done and RUP IRQ have been moved to
* CSID from VFE. Once CSID received bus done, need notify
* VFE of this event. Trigger VFE to handle bus done process.
*/
@@ -325,7 +328,7 @@ static void csid_subdev_init(struct csid_device *csid)
csid->testgen.nmodes = CSID_PAYLOAD_MODE_DISABLED;
}
-const struct csid_hw_ops csid_ops_780 = {
+const struct csid_hw_ops csid_ops_gen3 = {
.configure_stream = csid_configure_stream,
.configure_testgen_pattern = csid_configure_testgen_pattern,
.hw_version = csid_hw_version,
diff --git a/drivers/media/platform/qcom/camss/camss-csid-780.h b/drivers/media/platform/qcom/camss/camss-csid-gen3.h
similarity index 84%
rename from drivers/media/platform/qcom/camss/camss-csid-780.h
rename to drivers/media/platform/qcom/camss/camss-csid-gen3.h
index a990c66a60ff..e6298042ae74 100644
--- a/drivers/media/platform/qcom/camss/camss-csid-780.h
+++ b/drivers/media/platform/qcom/camss/camss-csid-gen3.h
@@ -1,13 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
- * camss-csid-780.h
+ * camss-csid-gen3.h
*
* Qualcomm MSM Camera Subsystem - CSID (CSI Decoder) Module Generation 3
*
* Copyright (c) 2024 Qualcomm Technologies, Inc.
*/
-#ifndef __QC_MSM_CAMSS_CSID_780_H__
-#define __QC_MSM_CAMSS_CSID_780_H__
+#ifndef __QC_MSM_CAMSS_CSID_GEN3_H__
+#define __QC_MSM_CAMSS_CSID_GEN3_H__
#define DECODE_FORMAT_UNCOMPRESSED_8_BIT 0x1
#define DECODE_FORMAT_UNCOMPRESSED_10_BIT 0x2
@@ -18,8 +18,9 @@
#define DECODE_FORMAT_UNCOMPRESSED_24_BIT 0x7
#define DECODE_FORMAT_PAYLOAD_ONLY 0xf
+
#define PLAIN_FORMAT_PLAIN8 0x0 /* supports DPCM, UNCOMPRESSED_6/8_BIT */
#define PLAIN_FORMAT_PLAIN16 0x1 /* supports DPCM, UNCOMPRESSED_10/16_BIT */
#define PLAIN_FORMAT_PLAIN32 0x2 /* supports UNCOMPRESSED_20_BIT */
-#endif /* __QC_MSM_CAMSS_CSID_780_H__ */
+#endif /* __QC_MSM_CAMSS_CSID_GEN3_H__ */
diff --git a/drivers/media/platform/qcom/camss/camss-csid.h b/drivers/media/platform/qcom/camss/camss-csid.h
index 9dc826d8c8f6..62273ca9f199 100644
--- a/drivers/media/platform/qcom/camss/camss-csid.h
+++ b/drivers/media/platform/qcom/camss/camss-csid.h
@@ -215,7 +215,7 @@ extern const struct csid_hw_ops csid_ops_4_1;
extern const struct csid_hw_ops csid_ops_4_7;
extern const struct csid_hw_ops csid_ops_680;
extern const struct csid_hw_ops csid_ops_gen2;
-extern const struct csid_hw_ops csid_ops_780;
+extern const struct csid_hw_ops csid_ops_gen3;
/*
* csid_is_lite - Check if CSID is CSID lite.
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 06f42875702f..1431e08dc04a 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -2285,7 +2285,7 @@ static const struct camss_subdev_resources csid_res_8550[] = {
.csid = {
.is_lite = false,
.parent_dev_ops = &vfe_parent_dev_ops,
- .hw_ops = &csid_ops_780,
+ .hw_ops = &csid_ops_gen3,
.formats = &csid_formats_gen2
}
},
@@ -2300,7 +2300,7 @@ static const struct camss_subdev_resources csid_res_8550[] = {
.csid = {
.is_lite = false,
.parent_dev_ops = &vfe_parent_dev_ops,
- .hw_ops = &csid_ops_780,
+ .hw_ops = &csid_ops_gen3,
.formats = &csid_formats_gen2
}
},
@@ -2315,7 +2315,7 @@ static const struct camss_subdev_resources csid_res_8550[] = {
.csid = {
.is_lite = false,
.parent_dev_ops = &vfe_parent_dev_ops,
- .hw_ops = &csid_ops_780,
+ .hw_ops = &csid_ops_gen3,
.formats = &csid_formats_gen2
}
},
@@ -2330,7 +2330,7 @@ static const struct camss_subdev_resources csid_res_8550[] = {
.csid = {
.is_lite = true,
.parent_dev_ops = &vfe_parent_dev_ops,
- .hw_ops = &csid_ops_780,
+ .hw_ops = &csid_ops_gen3,
.formats = &csid_formats_gen2
}
},
@@ -2345,7 +2345,7 @@ static const struct camss_subdev_resources csid_res_8550[] = {
.csid = {
.is_lite = true,
.parent_dev_ops = &vfe_parent_dev_ops,
- .hw_ops = &csid_ops_780,
+ .hw_ops = &csid_ops_gen3,
.formats = &csid_formats_gen2
}
}
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH RFC/WIP v2 2/9] media: qcom: camss: add generic vfe handling in vfe gen3
2025-04-27 7:01 [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 1/9] media: qcom: camss: add generic csid handling in csid gen3 Vikram Sharma
@ 2025-04-27 7:01 ` Vikram Sharma
2025-05-07 8:49 ` kernel test robot
2025-04-27 7:01 ` [PATCH RFC/WIP v2 3/9] media: dt-bindings: Add qcom,sa8775p-camss Vikram Sharma
` (6 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Vikram Sharma @ 2025-04-27 7:01 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel
Rename camss-vfe-780.c to camss-vfe-gen3.c to avoid code duplication
for later SOCs i.e SA8775P. SA877P have vfe 690 which is almost same
as vfe 780 with very minor changes in register bitfield.
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
drivers/media/platform/qcom/camss/Makefile | 2 +-
.../qcom/camss/{camss-vfe-780.c => camss-vfe-gen3.c} | 9 +++++----
drivers/media/platform/qcom/camss/camss-vfe.h | 2 +-
drivers/media/platform/qcom/camss/camss.c | 10 +++++-----
4 files changed, 12 insertions(+), 11 deletions(-)
rename drivers/media/platform/qcom/camss/{camss-vfe-780.c => camss-vfe-gen3.c} (95%)
diff --git a/drivers/media/platform/qcom/camss/Makefile b/drivers/media/platform/qcom/camss/Makefile
index ee869e69521a..9fc4591c0edb 100644
--- a/drivers/media/platform/qcom/camss/Makefile
+++ b/drivers/media/platform/qcom/camss/Makefile
@@ -19,7 +19,7 @@ qcom-camss-objs += \
camss-vfe-17x.o \
camss-vfe-480.o \
camss-vfe-680.o \
- camss-vfe-780.o \
+ camss-vfe-gen2.o \
camss-vfe-gen1.o \
camss-vfe.o \
camss-video.o \
diff --git a/drivers/media/platform/qcom/camss/camss-vfe-780.c b/drivers/media/platform/qcom/camss/camss-vfe-gen3.c
similarity index 95%
rename from drivers/media/platform/qcom/camss/camss-vfe-780.c
rename to drivers/media/platform/qcom/camss/camss-vfe-gen3.c
index b9812d70f91b..ed1681148143 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe-780.c
+++ b/drivers/media/platform/qcom/camss/camss-vfe-gen3.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module v780 (SM8550)
+ * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module gen3
+ * Gen3 Supports Qualcomm vfe version 780 and 690
*
* Copyright (c) 2024 Qualcomm Technologies, Inc.
*/
@@ -113,14 +114,14 @@ static inline void vfe_reg_update_clear(struct vfe_device *vfe,
camss_reg_update(vfe->camss, vfe->id, port_id, true);
}
-static const struct camss_video_ops vfe_video_ops_780 = {
+static const struct camss_video_ops vfe_video_ops_gen2 = {
.queue_buffer = vfe_queue_buffer_v2,
.flush_buffers = vfe_flush_buffers,
};
static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe)
{
- vfe->video_ops = vfe_video_ops_780;
+ vfe->video_ops = vfe_video_ops_gen2;
}
static void vfe_global_reset(struct vfe_device *vfe)
@@ -140,7 +141,7 @@ static int vfe_halt(struct vfe_device *vfe)
return 0;
}
-const struct vfe_hw_ops vfe_ops_780 = {
+const struct vfe_hw_ops vfe_ops_gen2 = {
.global_reset = vfe_global_reset,
.hw_version = vfe_hw_version,
.isr = vfe_isr,
diff --git a/drivers/media/platform/qcom/camss/camss-vfe.h b/drivers/media/platform/qcom/camss/camss-vfe.h
index a23f666be753..bded88aa85c0 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe.h
+++ b/drivers/media/platform/qcom/camss/camss-vfe.h
@@ -244,7 +244,7 @@ extern const struct vfe_hw_ops vfe_ops_4_8;
extern const struct vfe_hw_ops vfe_ops_170;
extern const struct vfe_hw_ops vfe_ops_480;
extern const struct vfe_hw_ops vfe_ops_680;
-extern const struct vfe_hw_ops vfe_ops_780;
+extern const struct vfe_hw_ops vfe_ops_gen2;
int vfe_get(struct vfe_device *vfe);
void vfe_put(struct vfe_device *vfe);
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 1431e08dc04a..467f7ff4b042 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -2371,7 +2371,7 @@ static const struct camss_subdev_resources vfe_res_8550[] = {
.is_lite = false,
.has_pd = true,
.pd_name = "ife0",
- .hw_ops = &vfe_ops_780,
+ .hw_ops = &vfe_ops_gen2,
.formats_rdi = &vfe_formats_rdi_845,
.formats_pix = &vfe_formats_pix_845
}
@@ -2395,7 +2395,7 @@ static const struct camss_subdev_resources vfe_res_8550[] = {
.is_lite = false,
.has_pd = true,
.pd_name = "ife1",
- .hw_ops = &vfe_ops_780,
+ .hw_ops = &vfe_ops_gen2,
.formats_rdi = &vfe_formats_rdi_845,
.formats_pix = &vfe_formats_pix_845
}
@@ -2419,7 +2419,7 @@ static const struct camss_subdev_resources vfe_res_8550[] = {
.is_lite = false,
.has_pd = true,
.pd_name = "ife2",
- .hw_ops = &vfe_ops_780,
+ .hw_ops = &vfe_ops_gen2,
.formats_rdi = &vfe_formats_rdi_845,
.formats_pix = &vfe_formats_pix_845
}
@@ -2441,7 +2441,7 @@ static const struct camss_subdev_resources vfe_res_8550[] = {
.vfe = {
.line_num = 4,
.is_lite = true,
- .hw_ops = &vfe_ops_780,
+ .hw_ops = &vfe_ops_gen2,
.formats_rdi = &vfe_formats_rdi_845,
.formats_pix = &vfe_formats_pix_845
}
@@ -2463,7 +2463,7 @@ static const struct camss_subdev_resources vfe_res_8550[] = {
.vfe = {
.line_num = 4,
.is_lite = true,
- .hw_ops = &vfe_ops_780,
+ .hw_ops = &vfe_ops_gen2,
.formats_rdi = &vfe_formats_rdi_845,
.formats_pix = &vfe_formats_pix_845
}
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH RFC/WIP v2 3/9] media: dt-bindings: Add qcom,sa8775p-camss
2025-04-27 7:01 [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 1/9] media: qcom: camss: add generic csid handling in csid gen3 Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 2/9] media: qcom: camss: add generic vfe handling in vfe gen3 Vikram Sharma
@ 2025-04-27 7:01 ` Vikram Sharma
2025-04-28 7:38 ` Krzysztof Kozlowski
2025-04-27 7:01 ` [PATCH RFC/WIP v2 4/9] arm64: dts: qcom: sa8775p: Add support for camss Vikram Sharma
` (5 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Vikram Sharma @ 2025-04-27 7:01 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel
Add bindings for qcom,sa8775p-camss to support the camera subsystem
on SA8775P platform.
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
.../bindings/media/qcom,sa8775p-camss.yaml | 352 ++++++++++++++++++
1 file changed, 352 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml
diff --git a/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml
new file mode 100644
index 000000000000..a58953a6e9c2
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml
@@ -0,0 +1,352 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/qcom,sa8775p-camss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SA8775P CAMSS ISP
+
+maintainers:
+ - Vikram Sharma <quic_vikramsa@quicinc.com>
+
+description:
+ The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
+
+properties:
+ compatible:
+ const: qcom,sa8775p-camss
+
+ reg:
+ maxItems: 22
+
+ reg-names:
+ items:
+ - const: csid0
+ - const: csid1
+ - const: csid_lite0
+ - const: csid_lite1
+ - const: csid_lite2
+ - const: csid_lite3
+ - const: csid_lite4
+ - const: csid_wrapper
+ - const: csiphy0
+ - const: csiphy1
+ - const: csiphy2
+ - const: csiphy3
+ - const: tpg0
+ - const: tpg1
+ - const: tpg2
+ - const: vfe0
+ - const: vfe1
+ - const: vfe_lite0
+ - const: vfe_lite1
+ - const: vfe_lite2
+ - const: vfe_lite3
+ - const: vfe_lite4
+
+ clocks:
+ maxItems: 28
+
+ clock-names:
+ items:
+ - const: camnoc_axi
+ - const: core_ahb
+ - const: cpas_ahb
+ - const: cpas_fast_ahb_clk
+ - const: cpas_ife_lite
+ - const: cpas_vfe0
+ - const: cpas_vfe1
+ - const: csid
+ - const: csiphy0
+ - const: csiphy0_timer
+ - const: csiphy1
+ - const: csiphy1_timer
+ - const: csiphy2
+ - const: csiphy2_timer
+ - const: csiphy3
+ - const: csiphy3_timer
+ - const: csiphy_rx
+ - const: gcc_axi_hf
+ - const: gcc_axi_sf
+ - const: icp_ahb
+ - const: vfe0
+ - const: vfe0_fast_ahb
+ - const: vfe1
+ - const: vfe1_fast_ahb
+ - const: vfe_lite
+ - const: vfe_lite_ahb
+ - const: vfe_lite_cphy_rx
+ - const: vfe_lite_csid
+
+ interrupts:
+ maxItems: 21
+
+ interrupt-names:
+ items:
+ - const: csid0
+ - const: csid1
+ - const: csid_lite0
+ - const: csid_lite1
+ - const: csid_lite2
+ - const: csid_lite3
+ - const: csid_lite4
+ - const: csiphy0
+ - const: csiphy1
+ - const: csiphy2
+ - const: csiphy3
+ - const: tpg0
+ - const: tpg1
+ - const: tpg2
+ - const: vfe0
+ - const: vfe1
+ - const: vfe_lite0
+ - const: vfe_lite1
+ - const: vfe_lite2
+ - const: vfe_lite3
+ - const: vfe_lite4
+
+ interconnects:
+ maxItems: 3
+
+ interconnect-names:
+ items:
+ - const: ahb
+ - const: hf_0
+ - const: sf_0
+
+ iommus:
+ maxItems: 1
+
+ power-domains:
+ items:
+ - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
+
+ power-domain-names:
+ items:
+ - const: top
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ description:
+ CSI input ports.
+
+ patternProperties:
+ "^port@[0-3]+$":
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port for receiving CSI data on CSIPHY 0-3.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - data-lanes
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - interconnects
+ - interconnect-names
+ - iommus
+ - power-domains
+ - power-domain-names
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,sa8775p-camcc.h>
+ #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
+ #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
+ #include <dt-bindings/interconnect/qcom,icc.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ isp@ac7a000 {
+ compatible = "qcom,sa8775p-camss";
+
+ reg = <0x0 0xac7a000 0x0 0x0f00>,
+ <0x0 0xac7c000 0x0 0x0f00>,
+ <0x0 0xac84000 0x0 0x0f00>,
+ <0x0 0xac88000 0x0 0x0f00>,
+ <0x0 0xac8c000 0x0 0x0f00>,
+ <0x0 0xac90000 0x0 0x0f00>,
+ <0x0 0xac94000 0x0 0x0f00>,
+ <0x0 0xac78000 0x0 0x1000>,
+ <0x0 0xac9c000 0x0 0x2000>,
+ <0x0 0xac9e000 0x0 0x2000>,
+ <0x0 0xaca0000 0x0 0x2000>,
+ <0x0 0xaca2000 0x0 0x2000>,
+ <0x0 0xacac000 0x0 0x0400>,
+ <0x0 0xacad000 0x0 0x0400>,
+ <0x0 0xacae000 0x0 0x0400>,
+ <0x0 0xac4d000 0x0 0xd000>,
+ <0x0 0xac5a000 0x0 0xd000>,
+ <0x0 0xac85000 0x0 0x0d00>,
+ <0x0 0xac89000 0x0 0x0d00>,
+ <0x0 0xac8d000 0x0 0x0d00>,
+ <0x0 0xac91000 0x0 0x0d00>,
+ <0x0 0xac95000 0x0 0x0d00>;
+ reg-names = "csid0",
+ "csid1",
+ "csid_lite0",
+ "csid_lite1",
+ "csid_lite2",
+ "csid_lite3",
+ "csid_lite4",
+ "csid_wrapper",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "tpg0",
+ "tpg1",
+ "tpg2",
+ "vfe0",
+ "vfe1",
+ "vfe_lite0",
+ "vfe_lite1",
+ "vfe_lite2",
+ "vfe_lite3",
+ "vfe_lite4";
+
+ clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_0_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_1_CLK>,
+ <&camcc CAM_CC_CSID_CLK>,
+ <&camcc CAM_CC_CSIPHY0_CLK>,
+ <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY1_CLK>,
+ <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY2_CLK>,
+ <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY3_CLK>,
+ <&camcc CAM_CC_CSI3PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
+ <&gcc GCC_CAMERA_HF_AXI_CLK>,
+ <&gcc GCC_CAMERA_SF_AXI_CLK>,
+ <&camcc CAM_CC_ICP_AHB_CLK>,
+ <&camcc CAM_CC_IFE_0_CLK>,
+ <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_1_CLK>,
+ <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CLK>,
+ <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
+ clock-names = "camnoc_axi",
+ "core_ahb",
+ "cpas_ahb",
+ "cpas_fast_ahb_clk",
+ "cpas_ife_lite",
+ "cpas_vfe0",
+ "cpas_vfe1",
+ "csid",
+ "csiphy0",
+ "csiphy0_timer",
+ "csiphy1",
+ "csiphy1_timer",
+ "csiphy2",
+ "csiphy2_timer",
+ "csiphy3",
+ "csiphy3_timer",
+ "csiphy_rx",
+ "gcc_axi_hf",
+ "gcc_axi_sf",
+ "icp_ahb",
+ "vfe0",
+ "vfe0_fast_ahb",
+ "vfe1",
+ "vfe1_fast_ahb",
+ "vfe_lite",
+ "vfe_lite_ahb",
+ "vfe_lite_cphy_rx",
+ "vfe_lite_csid";
+
+ interrupts = <GIC_SPI 565 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 564 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 759 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 758 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 604 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 545 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 546 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 547 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 761 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 760 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 605 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "csid0",
+ "csid1",
+ "csid_lite0",
+ "csid_lite1",
+ "csid_lite2",
+ "csid_lite3",
+ "csid_lite4",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "tpg0",
+ "tpg1",
+ "tpg2",
+ "vfe0",
+ "vfe1",
+ "vfe_lite0",
+ "vfe_lite1",
+ "vfe_lite2",
+ "vfe_lite3",
+ "vfe_lite4";
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+ <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "ahb",
+ "hf_0",
+ "sf_0";
+
+ iommus = <&apps_smmu 0x3400 0x20>;
+
+ power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
+ power-domain-names = "top";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH RFC/WIP v2 4/9] arm64: dts: qcom: sa8775p: Add support for camss
2025-04-27 7:01 [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support Vikram Sharma
` (2 preceding siblings ...)
2025-04-27 7:01 ` [PATCH RFC/WIP v2 3/9] media: dt-bindings: Add qcom,sa8775p-camss Vikram Sharma
@ 2025-04-27 7:01 ` Vikram Sharma
2025-04-30 10:30 ` Konrad Dybcio
2025-05-10 7:14 ` Suresh Vankadara
2025-04-27 7:01 ` [PATCH RFC/WIP v2 5/9] media: qcom: camss: Add sa8775p compatible Vikram Sharma
` (4 subsequent siblings)
8 siblings, 2 replies; 17+ messages in thread
From: Vikram Sharma @ 2025-04-27 7:01 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel, Suresh Vankadara
Add changes to support the camera subsystem on the SA8775P.
Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 187 ++++++++++++++++++++++++++
1 file changed, 187 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 5bd0c03476b1..81eadb2bb663 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/clock/qcom,sa8775p-camcc.h>
#include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
#include <dt-bindings/clock/qcom,sa8775p-gcc.h>
#include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
@@ -3940,6 +3941,192 @@ videocc: clock-controller@abf0000 {
#power-domain-cells = <1>;
};
+ camss: isp@ac7a000 {
+ compatible = "qcom,sa8775p-camss";
+
+ reg = <0x0 0xac7a000 0x0 0x0f00>,
+ <0x0 0xac7c000 0x0 0x0f00>,
+ <0x0 0xac84000 0x0 0x0f00>,
+ <0x0 0xac88000 0x0 0x0f00>,
+ <0x0 0xac8c000 0x0 0x0f00>,
+ <0x0 0xac90000 0x0 0x0f00>,
+ <0x0 0xac94000 0x0 0x0f00>,
+ <0x0 0xac78000 0x0 0x1000>,
+ <0x0 0xac9c000 0x0 0x2000>,
+ <0x0 0xac9e000 0x0 0x2000>,
+ <0x0 0xaca0000 0x0 0x2000>,
+ <0x0 0xaca2000 0x0 0x2000>,
+ <0x0 0xacac000 0x0 0x0400>,
+ <0x0 0xacad000 0x0 0x0400>,
+ <0x0 0xacae000 0x0 0x0400>,
+ <0x0 0xac4d000 0x0 0xd000>,
+ <0x0 0xac5a000 0x0 0xd000>,
+ <0x0 0xac85000 0x0 0x0d00>,
+ <0x0 0xac89000 0x0 0x0d00>,
+ <0x0 0xac8d000 0x0 0x0d00>,
+ <0x0 0xac91000 0x0 0x0d00>,
+ <0x0 0xac95000 0x0 0x0d00>;
+ reg-names = "csid0",
+ "csid1",
+ "csid_lite0",
+ "csid_lite1",
+ "csid_lite2",
+ "csid_lite3",
+ "csid_lite4",
+ "csid_wrapper",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "tpg0",
+ "tpg1",
+ "tpg2",
+ "vfe0",
+ "vfe1",
+ "vfe_lite0",
+ "vfe_lite1",
+ "vfe_lite2",
+ "vfe_lite3",
+ "vfe_lite4";
+
+ clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_0_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_1_CLK>,
+ <&camcc CAM_CC_CSID_CLK>,
+ <&camcc CAM_CC_CSIPHY0_CLK>,
+ <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY1_CLK>,
+ <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY2_CLK>,
+ <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY3_CLK>,
+ <&camcc CAM_CC_CSI3PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
+ <&gcc GCC_CAMERA_HF_AXI_CLK>,
+ <&gcc GCC_CAMERA_SF_AXI_CLK>,
+ <&camcc CAM_CC_ICP_AHB_CLK>,
+ <&camcc CAM_CC_IFE_0_CLK>,
+ <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_1_CLK>,
+ <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CLK>,
+ <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
+ clock-names = "camnoc_axi",
+ "core_ahb",
+ "cpas_ahb",
+ "cpas_fast_ahb_clk",
+ "cpas_ife_lite",
+ "cpas_vfe0",
+ "cpas_vfe1",
+ "csid",
+ "csiphy0",
+ "csiphy0_timer",
+ "csiphy1",
+ "csiphy1_timer",
+ "csiphy2",
+ "csiphy2_timer",
+ "csiphy3",
+ "csiphy3_timer",
+ "csiphy_rx",
+ "gcc_axi_hf",
+ "gcc_axi_sf",
+ "icp_ahb",
+ "vfe0",
+ "vfe0_fast_ahb",
+ "vfe1",
+ "vfe1_fast_ahb",
+ "vfe_lite",
+ "vfe_lite_ahb",
+ "vfe_lite_cphy_rx",
+ "vfe_lite_csid";
+
+ interrupts = <GIC_SPI 565 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 564 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 759 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 758 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 604 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 545 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 546 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 547 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 761 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 760 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 605 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "csid0",
+ "csid1",
+ "csid_lite0",
+ "csid_lite1",
+ "csid_lite2",
+ "csid_lite3",
+ "csid_lite4",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "tpg0",
+ "tpg1",
+ "tpg2",
+ "vfe0",
+ "vfe1",
+ "vfe_lite0",
+ "vfe_lite1",
+ "vfe_lite2",
+ "vfe_lite3",
+ "vfe_lite4";
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+ <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "ahb",
+ "hf_0",
+ "sf_0";
+
+ iommus = <&apps_smmu 0x3400 0x20>;
+
+ power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
+ power-domain-names = "top";
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ };
+ };
+ };
+
camcc: clock-controller@ade0000 {
compatible = "qcom,sa8775p-camcc";
reg = <0x0 0x0ade0000 0x0 0x20000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH RFC/WIP v2 5/9] media: qcom: camss: Add sa8775p compatible
2025-04-27 7:01 [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support Vikram Sharma
` (3 preceding siblings ...)
2025-04-27 7:01 ` [PATCH RFC/WIP v2 4/9] arm64: dts: qcom: sa8775p: Add support for camss Vikram Sharma
@ 2025-04-27 7:01 ` Vikram Sharma
2025-05-10 7:25 ` Suresh Vankadara
2025-04-27 7:01 ` [PATCH RFC/WIP v2 6/9] media: qcom: camss: Add support for CSIPHY 690 Vikram Sharma
` (3 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Vikram Sharma @ 2025-04-27 7:01 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel, Suresh Vankadara
Add CAMSS_8775P enum, SA8775P compatible and sa8775p camss driver
private data, the private data just include some basic information
now, later changes will enumerate with csiphy, tpg, csid and vfe
resources.
Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
drivers/media/platform/qcom/camss/camss.c | 23 +++++++++++++++++++++++
drivers/media/platform/qcom/camss/camss.h | 1 +
2 files changed, 24 insertions(+)
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 467f7ff4b042..9e0e1bf855bd 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -2483,6 +2483,19 @@ static const struct resources_icc icc_res_sm8550[] = {
},
};
+static const struct resources_icc icc_res_sa8775p[] = {
+ {
+ .name = "ahb",
+ .icc_bw_tbl.avg = 38400,
+ .icc_bw_tbl.peak = 76800,
+ },
+ {
+ .name = "hf_0",
+ .icc_bw_tbl.avg = 2097152,
+ .icc_bw_tbl.peak = 2097152,
+ },
+};
+
static const struct camss_subdev_resources csiphy_res_x1e80100[] = {
/* CSIPHY0 */
{
@@ -3753,6 +3766,15 @@ static const struct camss_resources msm8996_resources = {
.link_entities = camss_link_entities
};
+
+static const struct camss_resources sa8775p_resources = {
+ .version = CAMSS_8775P,
+ .pd_name = "top",
+ .icc_res = icc_res_sa8775p,
+ .icc_path_num = ARRAY_SIZE(icc_res_sa8775p),
+ .link_entities = camss_link_entities
+};
+
static const struct camss_resources sdm660_resources = {
.version = CAMSS_660,
.csiphy_res = csiphy_res_660,
@@ -3865,6 +3887,7 @@ static const struct of_device_id camss_dt_match[] = {
{ .compatible = "qcom,msm8916-camss", .data = &msm8916_resources },
{ .compatible = "qcom,msm8953-camss", .data = &msm8953_resources },
{ .compatible = "qcom,msm8996-camss", .data = &msm8996_resources },
+ { .compatible = "qcom,sa8775p-camss", .data = &sa8775p_resources },
{ .compatible = "qcom,sc7280-camss", .data = &sc7280_resources },
{ .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources },
{ .compatible = "qcom,sdm660-camss", .data = &sdm660_resources },
diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h
index 63c0afee154a..345479f6feba 100644
--- a/drivers/media/platform/qcom/camss/camss.h
+++ b/drivers/media/platform/qcom/camss/camss.h
@@ -86,6 +86,7 @@ enum camss_version {
CAMSS_8280XP,
CAMSS_845,
CAMSS_8550,
+ CAMSS_8775P,
CAMSS_X1E80100,
};
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH RFC/WIP v2 6/9] media: qcom: camss: Add support for CSIPHY 690
2025-04-27 7:01 [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support Vikram Sharma
` (4 preceding siblings ...)
2025-04-27 7:01 ` [PATCH RFC/WIP v2 5/9] media: qcom: camss: Add sa8775p compatible Vikram Sharma
@ 2025-04-27 7:01 ` Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 7/9] media: qcom: camss: Add support for CSID for sa8775p Vikram Sharma
` (2 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Vikram Sharma @ 2025-04-27 7:01 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel, Wenmeng Liu
Add support for CSIPHY found on SA8775P (Titan 690).
This implementation is based on the titan 690 implementation.
Co-developed-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
.../qcom/camss/camss-csiphy-3ph-1-0.c | 84 +++++++++++++++++++
.../media/platform/qcom/camss/camss-csiphy.c | 5 ++
.../media/platform/qcom/camss/camss-csiphy.h | 1 +
drivers/media/platform/qcom/camss/camss.c | 71 ++++++++++++++++
4 files changed, 161 insertions(+)
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
index f732a76de93e..bb5ebaa13ec8 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
@@ -64,6 +64,85 @@ struct csiphy_lane_regs {
u32 csiphy_param_type;
};
+/* GEN2 1.3.0 2PH */
+static const struct
+csiphy_lane_regs lane_regs_sa8775p[] = {
+ {0x0724, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0728, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0700, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x070C, 0xFF, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x072C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0734, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x071C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0714, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x073C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0704, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0720, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0708, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+ {0x0024, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0000, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0020, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+ {0x0224, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0200, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x022C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0234, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x021C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0214, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x023C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0204, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0220, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0208, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+ {0x0424, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0400, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0434, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x041C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0420, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0408, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+ {0x0624, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0600, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x062C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0634, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x061C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0614, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x063C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0604, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0620, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0608, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+ {0x005C, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0060, 0xFD, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0064, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x025C, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0260, 0xFD, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0264, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x045C, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0460, 0xFD, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0464, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x065C, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0660, 0xFD, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
+};
+
/* GEN2 1.0 2PH */
static const struct
csiphy_lane_regs lane_regs_sdm845[] = {
@@ -749,6 +828,7 @@ static bool csiphy_is_gen2(u32 version)
case CAMSS_8280XP:
case CAMSS_845:
case CAMSS_8550:
+ case CAMSS_8775P:
case CAMSS_X1E80100:
ret = true;
break;
@@ -848,6 +928,10 @@ static int csiphy_init(struct csiphy_device *csiphy)
regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8550);
regs->offset = 0x1000;
break;
+ case CAMSS_8775P:
+ regs->lane_regs = &lane_regs_sa8775p[0];
+ regs->lane_array_size = ARRAY_SIZE(lane_regs_sa8775p);
+ break;
default:
WARN(1, "unknown csiphy version\n");
return -ENODEV;
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c
index c622efcc92ff..f6a2ac385953 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy.c
@@ -103,6 +103,11 @@ const struct csiphy_formats csiphy_formats_8x96 = {
.formats = formats_8x96
};
+const struct csiphy_formats csiphy_formats_sa8775p = {
+ .nformats = ARRAY_SIZE(formats_sdm845),
+ .formats = formats_sdm845
+};
+
const struct csiphy_formats csiphy_formats_sc7280 = {
.nformats = ARRAY_SIZE(formats_sdm845),
.formats = formats_sdm845
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h b/drivers/media/platform/qcom/camss/camss-csiphy.h
index ab91273303b9..842e72b74ce4 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy.h
+++ b/drivers/media/platform/qcom/camss/camss-csiphy.h
@@ -126,6 +126,7 @@ void msm_csiphy_unregister_entity(struct csiphy_device *csiphy);
extern const struct csiphy_formats csiphy_formats_8x16;
extern const struct csiphy_formats csiphy_formats_8x96;
+extern const struct csiphy_formats csiphy_formats_sa8775p;
extern const struct csiphy_formats csiphy_formats_sc7280;
extern const struct csiphy_formats csiphy_formats_sdm845;
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 9e0e1bf855bd..60279f3a47bf 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -2483,6 +2483,77 @@ static const struct resources_icc icc_res_sm8550[] = {
},
};
+static const struct camss_subdev_resources csiphy_res_8775p[] = {
+ /* CSIPHY0 */
+ {
+ .regulators = { "vdda-phy", "vdda-pll" },
+
+ .clock = { "csiphy_rx", "csiphy0", "csiphy0_timer"},
+ .clock_rate = {
+ { 400000000 },
+ { 0 },
+ { 400000000 },
+ },
+ .reg = { "csiphy0" },
+ .interrupt = { "csiphy0" },
+ .csiphy = {
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sa8775p
+ }
+ },
+ /* CSIPHY1 */
+ {
+ .regulators = { "vdda-phy", "vdda-pll" },
+
+ .clock = { "csiphy_rx", "csiphy1", "csiphy1_timer"},
+ .clock_rate = {
+ { 400000000 },
+ { 0 },
+ { 400000000 },
+ },
+ .reg = { "csiphy1" },
+ .interrupt = { "csiphy1" },
+ .csiphy = {
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sa8775p
+ }
+ },
+ /* CSIPHY2 */
+ {
+ .regulators = { "vdda-phy", "vdda-pll" },
+
+ .clock = { "csiphy_rx", "csiphy2", "csiphy2_timer"},
+ .clock_rate = {
+ { 400000000 },
+ { 0 },
+ { 400000000 },
+ },
+ .reg = { "csiphy2" },
+ .interrupt = { "csiphy2" },
+ .csiphy = {
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sa8775p
+ }
+ },
+ /* CSIPHY3 */
+ {
+ .regulators = { "vdda-phy", "vdda-pll" },
+
+ .clock = { "csiphy_rx", "csiphy3", "csiphy3_timer"},
+ .clock_rate = {
+ { 400000000 },
+ { 0 },
+ { 400000000 },
+ },
+ .reg = { "csiphy3" },
+ .interrupt = { "csiphy3" },
+ .csiphy = {
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sa8775p
+ }
+ },
+};
+
static const struct resources_icc icc_res_sa8775p[] = {
{
.name = "ahb",
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH RFC/WIP v2 7/9] media: qcom: camss: Add support for CSID for sa8775p
2025-04-27 7:01 [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support Vikram Sharma
` (5 preceding siblings ...)
2025-04-27 7:01 ` [PATCH RFC/WIP v2 6/9] media: qcom: camss: Add support for CSIPHY 690 Vikram Sharma
@ 2025-04-27 7:01 ` Vikram Sharma
2025-05-10 7:58 ` Suresh Vankadara
2025-04-27 7:01 ` [PATCH RFC/WIP v2 8/9] media: qcom: camss: Add support for VFE 690 Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 9/9] media: qcom: camss: Enumerate resources for SA8775P Vikram Sharma
8 siblings, 1 reply; 17+ messages in thread
From: Vikram Sharma @ 2025-04-27 7:01 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel, Suresh Vankadara
The CSID in sa8775p is version 690, This csid is different from
csid 780 w.r.t few bit-fields.
Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
.../platform/qcom/camss/camss-csid-gen3.c | 31 +++-
drivers/media/platform/qcom/camss/camss.c | 151 ++++++++++++++++++
2 files changed, 175 insertions(+), 7 deletions(-)
diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen3.c b/drivers/media/platform/qcom/camss/camss-csid-gen3.c
index b66105f7b901..4f9471523a08 100644
--- a/drivers/media/platform/qcom/camss/camss-csid-gen3.c
+++ b/drivers/media/platform/qcom/camss/camss-csid-gen3.c
@@ -48,8 +48,12 @@
#define CSID_CSI2_RX_IRQ_CLEAR 0xA4
#define CSID_CSI2_RX_IRQ_SET 0xA8
+#define IS_CSID_690(csid) (csid->camss->res->version ==\
+ CAMSS_8775P ? true : false)
#define CSID_BUF_DONE_IRQ_STATUS 0x8C
-#define BUF_DONE_IRQ_STATUS_RDI_OFFSET (csid_is_lite(csid) ? 1 : 14)
+#define BUF_DONE_IRQ_STATUS_RDI_OFFSET (csid_is_lite(csid) ?\
+ 1 : (IS_CSID_690(csid) ?\
+ 13 : 14))
#define CSID_BUF_DONE_IRQ_MASK 0x90
#define CSID_BUF_DONE_IRQ_CLEAR 0x94
#define CSID_BUF_DONE_IRQ_SET 0x98
@@ -62,6 +66,7 @@
#define CSID_CSI2_RX_CFG0 0x200
#define CSI2_RX_CFG0_NUM_ACTIVE_LANES 0
+#define CSI2_RX_CFG0_VC_MODE 3
#define CSI2_RX_CFG0_DL0_INPUT_SEL 4
#define CSI2_RX_CFG0_PHY_NUM_SEL 20
@@ -69,7 +74,9 @@
#define CSI2_RX_CFG1_ECC_CORRECTION_EN BIT(0)
#define CSI2_RX_CFG1_VC_MODE BIT(2)
-#define CSID_RDI_CFG0(rdi) (0x500 + 0x100 * (rdi))
+#define CSID_RDI_CFG0(rdi) (csid_is_lite(csid) && IS_CSID_690(csid) ?\
+ (0x300 + 0x100 * (rdi)) :\
+ (0x500 + 0x100 * (rdi)))
#define RDI_CFG0_TIMESTAMP_EN BIT(6)
#define RDI_CFG0_TIMESTAMP_STB_SEL BIT(8)
#define RDI_CFG0_DECODE_FORMAT 12
@@ -78,10 +85,14 @@
#define RDI_CFG0_DT_ID 27
#define RDI_CFG0_EN BIT(31)
-#define CSID_RDI_CTRL(rdi) (0x504 + 0x100 * (rdi))
+#define CSID_RDI_CTRL(rdi) (csid_is_lite(csid) && IS_CSID_690(csid) ?\
+ (0x304 + 0x100 * (rdi)) :\
+ (0x504 + 0x100 * (rdi)))
#define RDI_CTRL_START_CMD BIT(0)
-#define CSID_RDI_CFG1(rdi) (0x510 + 0x100 * (rdi))
+#define CSID_RDI_CFG1(rdi) (csid_is_lite(csid) && IS_CSID_690(csid) ?\
+ (0x310 + 0x100 * (rdi)) :\
+ (0x510 + 0x100 * (rdi)))
#define RDI_CFG1_DROP_H_EN BIT(5)
#define RDI_CFG1_DROP_V_EN BIT(6)
#define RDI_CFG1_CROP_H_EN BIT(7)
@@ -89,9 +100,12 @@
#define RDI_CFG1_PIX_STORE BIT(10)
#define RDI_CFG1_PACKING_FORMAT_MIPI BIT(15)
-#define CSID_RDI_IRQ_SUBSAMPLE_PATTERN(rdi) (0x548 + 0x100 * (rdi))
-#define CSID_RDI_IRQ_SUBSAMPLE_PERIOD(rdi) (0x54C + 0x100 * (rdi))
-
+#define CSID_RDI_IRQ_SUBSAMPLE_PATTERN(rdi) (csid_is_lite(csid) && IS_CSID_690(csid) ?\
+ (0x348 + 0x100 * (rdi)) :\
+ (0x548 + 0x100 * (rdi)))
+#define CSID_RDI_IRQ_SUBSAMPLE_PERIOD(rdi) (csid_is_lite(csid) && IS_CSID_690(csid) ?\
+ (0x34C + 0x100 * (rdi)) :\
+ (0x54C + 0x100 * (rdi)))
#define CSI2_RX_CFG0_PHY_SEL_BASE_IDX 1
static void __csid_configure_rx(struct csid_device *csid,
@@ -103,6 +117,9 @@ static void __csid_configure_rx(struct csid_device *csid,
val |= phy->lane_assign << CSI2_RX_CFG0_DL0_INPUT_SEL;
val |= (phy->csiphy_id + CSI2_RX_CFG0_PHY_SEL_BASE_IDX) << CSI2_RX_CFG0_PHY_NUM_SEL;
+ if (IS_CSID_690(csid) && (vc > 3))
+ val |= 1 << CSI2_RX_CFG0_VC_MODE;
+
writel(val, csid->base + CSID_CSI2_RX_CFG0);
val = CSI2_RX_CFG1_ECC_CORRECTION_EN;
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 60279f3a47bf..ef7b06c9f258 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -2269,6 +2269,10 @@ static const struct camss_subdev_resources csiphy_res_8550[] = {
}
};
+static const struct resources_wrapper csid_wrapper_res_sa8775p = {
+ .reg = "csid_wrapper",
+};
+
static const struct resources_wrapper csid_wrapper_res_sm8550 = {
.reg = "csid_wrapper",
};
@@ -2554,6 +2558,153 @@ static const struct camss_subdev_resources csiphy_res_8775p[] = {
},
};
+static const struct camss_subdev_resources csid_res_8775p[] = {
+ /* CSID0 */
+ {
+ .regulators = {},
+
+ .clock = { "csid", "csiphy_rx"},
+ .clock_rate = {
+ { 400000000, 400000000},
+ { 400000000, 400000000}
+ },
+
+ .reg = { "csid0", "csid_top" },
+ .interrupt = { "csid0" },
+ .csid = {
+ .is_lite = false,
+ .hw_ops = &csid_ops_gen3,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID1 */
+ {
+ .regulators = {},
+
+ .clock = { "csid", "csiphy_rx"},
+ .clock_rate = {
+ { 400000000, 400000000},
+ { 400000000, 400000000}
+ },
+
+ .reg = { "csid1", "csid_top" },
+ .interrupt = { "csid1" },
+ .csid = {
+ .is_lite = false,
+ .hw_ops = &csid_ops_gen3,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+
+ /* CSID2 (lite) */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},
+ .clock_rate = {
+ { 0, 0, 400000000, 400000000, 0},
+ { 0, 0, 400000000, 480000000, 0}
+ },
+
+ .reg = { "csid_lite0" },
+ .interrupt = { "csid_lite0" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_gen3,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID3 (lite) */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},
+ .clock_rate = {
+ { 0, 0, 400000000, 400000000, 0},
+ { 0, 0, 400000000, 480000000, 0}
+ },
+
+ .reg = { "csid_lite1" },
+ .interrupt = { "csid_lite1" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_gen3,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID4 (lite) */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},
+ .clock_rate = {
+ { 0, 0, 400000000, 400000000, 0},
+ { 0, 0, 400000000, 480000000, 0}
+ },
+
+ .reg = { "csid_lite2" },
+ .interrupt = { "csid_lite2" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_gen3,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID5 (lite) */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},
+ .clock_rate = {
+ { 0, 0, 400000000, 400000000, 0},
+ { 0, 0, 400000000, 480000000, 0}
+ },
+
+ .reg = { "csid_lite3" },
+ .interrupt = { "csid_lite3" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_gen3,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID6 (lite) */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},
+ .clock_rate = {
+ { 0, 0, 400000000, 400000000, 0},
+ { 0, 0, 400000000, 480000000, 0}
+ },
+
+ .reg = { "csid_lite4" },
+ .interrupt = { "csid_lite4" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_gen3,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+};
+
static const struct resources_icc icc_res_sa8775p[] = {
{
.name = "ahb",
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH RFC/WIP v2 8/9] media: qcom: camss: Add support for VFE 690
2025-04-27 7:01 [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support Vikram Sharma
` (6 preceding siblings ...)
2025-04-27 7:01 ` [PATCH RFC/WIP v2 7/9] media: qcom: camss: Add support for CSID for sa8775p Vikram Sharma
@ 2025-04-27 7:01 ` Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 9/9] media: qcom: camss: Enumerate resources for SA8775P Vikram Sharma
8 siblings, 0 replies; 17+ messages in thread
From: Vikram Sharma @ 2025-04-27 7:01 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel, Suresh Vankadara
Add support for VFE found on SA8775P (Titan 690). This VFE is
different from vfe 780 w.r.t few register offsets.
It supports two full and five lite VFE.
Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
drivers/media/platform/qcom/camss/camss-vfe.c | 5 +-
drivers/media/platform/qcom/camss/camss.c | 189 ++++++++++++++++++
2 files changed, 193 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c
index 4bca6c3abaff..99cbe09343f2 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe.c
+++ b/drivers/media/platform/qcom/camss/camss-vfe.c
@@ -346,6 +346,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code,
case CAMSS_8280XP:
case CAMSS_845:
case CAMSS_8550:
+ case CAMSS_8775P:
case CAMSS_X1E80100:
switch (sink_code) {
case MEDIA_BUS_FMT_YUYV8_1X16:
@@ -910,7 +911,8 @@ static int vfe_match_clock_names(struct vfe_device *vfe,
return (!strcmp(clock->name, vfe_name) ||
!strcmp(clock->name, vfe_lite_name) ||
- !strcmp(clock->name, "vfe_lite"));
+ !strcmp(clock->name, "vfe_lite") ||
+ !strcmp(clock->name, "camnoc_axi"));
}
/*
@@ -1974,6 +1976,7 @@ static int vfe_bpl_align(struct vfe_device *vfe)
case CAMSS_8280XP:
case CAMSS_845:
case CAMSS_8550:
+ case CAMSS_8775P:
case CAMSS_X1E80100:
ret = 16;
break;
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index ef7b06c9f258..763159ac39b6 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -2705,6 +2705,195 @@ static const struct camss_subdev_resources csid_res_8775p[] = {
},
};
+static const struct camss_subdev_resources vfe_res_8775p[] = {
+ /* VFE0 */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_vfe0", "vfe0", "vfe0_fast_ahb",
+ "cpas_ahb", "gcc_axi_hf", "gcc_axi_sf",
+ "core_ahb", "cpas_fast_ahb_clk", "camnoc_axi",
+ "icp_ahb"},
+ .clock_rate = {
+ { 0 },
+ { 480000000 },
+ { 300000000, 400000000 },
+ { 300000000, 400000000 },
+ { 0 },
+ { 0 },
+ { 0, 80000000 },
+ { 300000000, 400000000 },
+ { 400000000 },
+ { 0 },
+ },
+
+ .reg = { "vfe0" },
+ .interrupt = { "vfe0" },
+ .vfe = {
+ .line_num = 3,
+ .is_lite = false,
+ .has_pd = false,
+ .pd_name = NULL,
+ .hw_ops = &vfe_ops_gen2,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE1 */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_vfe1", "vfe1", "vfe1_fast_ahb",
+ "cpas_ahb", "gcc_axi_hf", "gcc_axi_sf",
+ "core_ahb", "cpas_fast_ahb_clk", "camnoc_axi",
+ "icp_ahb"},
+ .clock_rate = {
+ { 0 },
+ { 480000000 },
+ { 300000000, 400000000 },
+ { 300000000, 400000000 },
+ { 0 },
+ { 0 },
+ { 0, 80000000 },
+ { 300000000, 400000000 },
+ { 400000000 },
+ { 0 },
+ },
+
+ .reg = { "vfe1" },
+ .interrupt = { "vfe1" },
+ .vfe = {
+ .line_num = 3,
+ .is_lite = false,
+ .has_pd = false,
+ .pd_name = NULL,
+ .hw_ops = &vfe_ops_gen2,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE2 (lite) */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},
+ .clock_rate = {
+ { 0, 0, 0, 0 },
+ { 300000000, 400000000, 400000000, 400000000 },
+ { 400000000, 400000000, 400000000, 400000000 },
+ { 400000000, 400000000, 400000000, 400000000 },
+ { 480000000, 600000000, 600000000, 600000000 },
+ },
+ .reg = { "vfe_lite0" },
+ .interrupt = { "vfe_lite0" },
+ .vfe = {
+ .line_num = 4,
+ .is_lite = true,
+ .hw_ops = &vfe_ops_gen2,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE3 (lite) */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},
+ .clock_rate = {
+ { 0, 0, 0, 0 },
+ { 300000000, 400000000, 400000000, 400000000 },
+ { 400000000, 400000000, 400000000, 400000000 },
+ { 400000000, 400000000, 400000000, 400000000 },
+ { 480000000, 600000000, 600000000, 600000000 },
+ },
+ .reg = { "vfe_lite1" },
+ .interrupt = { "vfe_lite1" },
+ .vfe = {
+ .line_num = 4,
+ .is_lite = true,
+ .hw_ops = &vfe_ops_gen2,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE4 (lite) */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},
+ .clock_rate = {
+ { 0, 0, 0, 0 },
+ { 300000000, 400000000, 400000000, 400000000 },
+ { 400000000, 400000000, 400000000, 400000000 },
+ { 400000000, 400000000, 400000000, 400000000 },
+ { 480000000, 600000000, 600000000, 600000000 },
+ },
+ .reg = { "vfe_lite2" },
+ .interrupt = { "vfe_lite2" },
+ .vfe = {
+ .line_num = 4,
+ .is_lite = true,
+ .hw_ops = &vfe_ops_gen2,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE5 (lite) */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},
+ .clock_rate = {
+ { 0, 0, 0, 0 },
+ { 300000000, 400000000, 400000000, 400000000 },
+ { 400000000, 400000000, 400000000, 400000000 },
+ { 400000000, 400000000, 400000000, 400000000 },
+ { 480000000, 600000000, 600000000, 600000000 },
+ },
+ .reg = { "vfe_lite3" },
+ .interrupt = { "vfe_lite3" },
+ .vfe = {
+ .line_num = 4,
+ .is_lite = true,
+ .hw_ops = &vfe_ops_gen2,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE6 (lite) */
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},
+ .clock_rate = {
+ { 0, 0, 0, 0 },
+ { 300000000, 400000000, 400000000, 400000000 },
+ { 400000000, 400000000, 400000000, 400000000 },
+ { 400000000, 400000000, 400000000, 400000000 },
+ { 480000000, 600000000, 600000000, 600000000 },
+ },
+ .reg = { "vfe_lite4" },
+ .interrupt = { "vfe_lite4" },
+ .vfe = {
+ .line_num = 4,
+ .is_lite = true,
+ .hw_ops = &vfe_ops_gen2,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+};
+
static const struct resources_icc icc_res_sa8775p[] = {
{
.name = "ahb",
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH RFC/WIP v2 9/9] media: qcom: camss: Enumerate resources for SA8775P
2025-04-27 7:01 [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support Vikram Sharma
` (7 preceding siblings ...)
2025-04-27 7:01 ` [PATCH RFC/WIP v2 8/9] media: qcom: camss: Add support for VFE 690 Vikram Sharma
@ 2025-04-27 7:01 ` Vikram Sharma
8 siblings, 0 replies; 17+ messages in thread
From: Vikram Sharma @ 2025-04-27 7:01 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel
Enumerate csiphy, csid and vfe resources for SA8775P.
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
drivers/media/platform/qcom/camss/camss.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 763159ac39b6..edfb9952ed53 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -4181,7 +4181,14 @@ static const struct camss_resources msm8996_resources = {
static const struct camss_resources sa8775p_resources = {
.version = CAMSS_8775P,
.pd_name = "top",
+ .csiphy_res = csiphy_res_8775p,
+ .csid_res = csid_res_8775p,
+ .csid_wrapper_res = &csid_wrapper_res_sa8775p,
+ .vfe_res = vfe_res_8775p,
.icc_res = icc_res_sa8775p,
+ .csiphy_num = ARRAY_SIZE(csiphy_res_8775p),
+ .csid_num = ARRAY_SIZE(csid_res_8775p),
+ .vfe_num = ARRAY_SIZE(vfe_res_8775p),
.icc_path_num = ARRAY_SIZE(icc_res_sa8775p),
.link_entities = camss_link_entities
};
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH RFC/WIP v2 3/9] media: dt-bindings: Add qcom,sa8775p-camss
2025-04-27 7:01 ` [PATCH RFC/WIP v2 3/9] media: dt-bindings: Add qcom,sa8775p-camss Vikram Sharma
@ 2025-04-28 7:38 ` Krzysztof Kozlowski
0 siblings, 0 replies; 17+ messages in thread
From: Krzysztof Kozlowski @ 2025-04-28 7:38 UTC (permalink / raw)
To: Vikram Sharma
Cc: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will, linux-arm-kernel,
linux-media, linux-arm-msm, devicetree, linux-kernel
On Sun, Apr 27, 2025 at 12:31:29PM GMT, Vikram Sharma wrote:
> Add bindings for qcom,sa8775p-camss to support the camera subsystem
> on SA8775P platform.
Describe the hardware, e.g. why this does not have supplies, why and how
this is different than all other camss.
>
> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
> ---
> .../bindings/media/qcom,sa8775p-camss.yaml | 352 ++++++++++++++++++
> 1 file changed, 352 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml
>
With fixes in commit msg:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
<form letter>
This is an automated instruction, just in case, because many review tags
are being ignored. If you know the process, you can skip it (please do
not feel offended by me posting it here - no bad intentions intended).
If you do not know the process, here is a short explanation:
Please add Acked-by/Reviewed-by/Tested-by tags when posting new
versions of patchset, under or above your Signed-off-by tag, unless
patch changed significantly (e.g. new properties added to the DT
bindings). Tag is "received", when provided in a message replied to you
on the mailing list. Tools like b4 can help here. However, there's no
need to repost patches *only* to add the tags. The upstream maintainer
will do that for tags received on the version they apply.
https://elixir.bootlin.com/linux/v6.12-rc3/source/Documentation/process/submitting-patches.rst#L577
</form letter>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH RFC/WIP v2 4/9] arm64: dts: qcom: sa8775p: Add support for camss
2025-04-27 7:01 ` [PATCH RFC/WIP v2 4/9] arm64: dts: qcom: sa8775p: Add support for camss Vikram Sharma
@ 2025-04-30 10:30 ` Konrad Dybcio
2025-05-10 7:14 ` Suresh Vankadara
1 sibling, 0 replies; 17+ messages in thread
From: Konrad Dybcio @ 2025-04-30 10:30 UTC (permalink / raw)
To: Vikram Sharma, rfoss, todor.too, bryan.odonoghue, mchehab, robh,
krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel, Suresh Vankadara
On 4/27/25 9:01 AM, Vikram Sharma wrote:
> Add changes to support the camera subsystem on the SA8775P.
>
> Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
> ---
[...]
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
a newline between properties and subnodes would be good to have
otherwise, modulo the ongoing discussions that the folks closer to
camss are having in parallel:
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH RFC/WIP v2 2/9] media: qcom: camss: add generic vfe handling in vfe gen3
2025-04-27 7:01 ` [PATCH RFC/WIP v2 2/9] media: qcom: camss: add generic vfe handling in vfe gen3 Vikram Sharma
@ 2025-05-07 8:49 ` kernel test robot
0 siblings, 0 replies; 17+ messages in thread
From: kernel test robot @ 2025-05-07 8:49 UTC (permalink / raw)
To: Vikram Sharma; +Cc: oe-kbuild-all
Hi Vikram,
[This is a private test report for your RFC patch.]
kernel test robot noticed the following build errors:
[auto build test ERROR on next-20250424]
[cannot apply to robh/for-next linus/master v6.15-rc3 v6.15-rc2 v6.15-rc1 v6.15-rc5]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Vikram-Sharma/media-qcom-camss-add-generic-csid-handling-in-csid-gen3/20250427-150648
base: next-20250424
patch link: https://lore.kernel.org/r/20250427070135.884623-3-quic_vikramsa%40quicinc.com
patch subject: [PATCH RFC/WIP v2 2/9] media: qcom: camss: add generic vfe handling in vfe gen3
config: loongarch-randconfig-002-20250427 (https://download.01.org/0day-ci/archive/20250507/202505071629.t2ZIiCIF-lkp@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 13.3.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250507/202505071629.t2ZIiCIF-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505071629.t2ZIiCIF-lkp@intel.com/
All errors (new ones prefixed by >>):
>> make[8]: *** No rule to make target 'drivers/media/platform/qcom/camss/camss-vfe-gen2.o', needed by 'drivers/media/platform/qcom/camss/built-in.a'.
make[8]: Target 'drivers/media/platform/qcom/camss/' not remade because of errors.
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH RFC/WIP v2 4/9] arm64: dts: qcom: sa8775p: Add support for camss
2025-04-27 7:01 ` [PATCH RFC/WIP v2 4/9] arm64: dts: qcom: sa8775p: Add support for camss Vikram Sharma
2025-04-30 10:30 ` Konrad Dybcio
@ 2025-05-10 7:14 ` Suresh Vankadara
2025-05-11 9:53 ` Bryan O'Donoghue
1 sibling, 1 reply; 17+ messages in thread
From: Suresh Vankadara @ 2025-05-10 7:14 UTC (permalink / raw)
To: Vikram Sharma, rfoss, todor.too, bryan.odonoghue, mchehab, robh,
krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel
On 4/27/2025 12:31 PM, Vikram Sharma wrote:
> Add changes to support the camera subsystem on the SA8775P.
>
> Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 187 ++++++++++++++++++++++++++
> 1 file changed, 187 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 5bd0c03476b1..81eadb2bb663 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -7,6 +7,7 @@
> #include <dt-bindings/interconnect/qcom,icc.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> +#include <dt-bindings/clock/qcom,sa8775p-camcc.h>
> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
> #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
> @@ -3940,6 +3941,192 @@ videocc: clock-controller@abf0000 {
> #power-domain-cells = <1>;
> };
>
> + camss: isp@ac7a000 {
> + compatible = "qcom,sa8775p-camss";
If more number of nodes are added for CAMSS, adding isp in compatible
string helps to differentiate.
> + reg-names = "csid0",
> + "csid1",
> + "csid_lite0",
> + "csid_lite1",
> + "csid_lite2",
> + "csid_lite3",
> + "csid_lite4",
> + "csid_wrapper",
csid wrapper is top register set, which is applicable for both csid 0
and csid 1. It is logical to keep along with csid0 and csid1, instead of
alpha numerical order.
> +
> + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> + <&camcc CAM_CC_CORE_AHB_CLK>,
> + <&camcc CAM_CC_CPAS_AHB_CLK>,
> + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
> + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
> + <&camcc CAM_CC_CPAS_IFE_0_CLK>,
> + <&camcc CAM_CC_CPAS_IFE_1_CLK>,
> + <&camcc CAM_CC_CSID_CLK>,
> + <&camcc CAM_CC_CSIPHY0_CLK>,
> + <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
> + <&camcc CAM_CC_CSIPHY1_CLK>,
> + <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
> + <&camcc CAM_CC_CSIPHY2_CLK>,
> + <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
> + <&camcc CAM_CC_CSIPHY3_CLK>,
> + <&camcc CAM_CC_CSI3PHYTIMER_CLK>,
> + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
> + <&gcc GCC_CAMERA_HF_AXI_CLK>,
> + <&gcc GCC_CAMERA_SF_AXI_CLK>,
> + <&camcc CAM_CC_ICP_AHB_CLK>,
> + <&camcc CAM_CC_IFE_0_CLK>,
> + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
> + <&camcc CAM_CC_IFE_1_CLK>,
> + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CLK>,
> + <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
> + clock-names = "camnoc_axi",
> + "core_ahb",
> + "cpas_ahb",
> + "cpas_fast_ahb_clk",
> + "cpas_ife_lite",
> + "cpas_vfe0",
> + "cpas_vfe1",
Maintain consistency on vfe/ife in complete camss node. In reg section,
vfe is used for full and lite version. in clock-names section ife lite
and vfe are used. As clock IDs upstream and ife is used for full and
lite, this convention will be followed in camss node as well.
> + "csid",
> + "csiphy0",
> + "csiphy0_timer",
> + "csiphy1",
> + "csiphy1_timer",
> + "csiphy2",
> + "csiphy2_timer",
> + "csiphy3",
> + "csiphy3_timer",
> + "csiphy_rx",
> + "gcc_axi_hf",
> + "gcc_axi_sf",
> + "icp_ahb",
sf and icp_ahb clocks needed?
> +
> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
> + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
> + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ACTIVE_ONLY
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> + interconnect-names = "ahb",
> + "hf_0",
> + "sf_0";
sf_0 needed?
> +
> + iommus = <&apps_smmu 0x3400 0x20>;
Regards,
Suresh Vankadara.
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH RFC/WIP v2 5/9] media: qcom: camss: Add sa8775p compatible
2025-04-27 7:01 ` [PATCH RFC/WIP v2 5/9] media: qcom: camss: Add sa8775p compatible Vikram Sharma
@ 2025-05-10 7:25 ` Suresh Vankadara
0 siblings, 0 replies; 17+ messages in thread
From: Suresh Vankadara @ 2025-05-10 7:25 UTC (permalink / raw)
To: Vikram Sharma, rfoss, todor.too, bryan.odonoghue, mchehab, robh,
krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel
On 4/27/2025 12:31 PM, Vikram Sharma wrote:
> Add CAMSS_8775P enum, SA8775P compatible and sa8775p camss driver
> private data, the private data just include some basic information
> now, later changes will enumerate with csiphy, tpg, csid and vfe
> resources.
>
> Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
> ---
> drivers/media/platform/qcom/camss/camss.c | 23 +++++++++++++++++++++++
> drivers/media/platform/qcom/camss/camss.h | 1 +
> 2 files changed, 24 insertions(+)
>
> diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
> index 467f7ff4b042..9e0e1bf855bd 100644
> --- a/drivers/media/platform/qcom/camss/camss.c
> +++ b/drivers/media/platform/qcom/camss/camss.c
> @@ -2483,6 +2483,19 @@ static const struct resources_icc icc_res_sm8550[] = {
> },
> };
>
> +static const struct resources_icc icc_res_sa8775p[] = {
> + {
> + .name = "ahb",
> + .icc_bw_tbl.avg = 38400,
> + .icc_bw_tbl.peak = 76800,
> + },
> + {
> + .name = "hf_0",
> + .icc_bw_tbl.avg = 2097152,
> + .icc_bw_tbl.peak = 2097152,
Recheck these values
> @@ -3865,6 +3887,7 @@ static const struct of_device_id camss_dt_match[] = {
> { .compatible = "qcom,msm8916-camss", .data = &msm8916_resources },
> { .compatible = "qcom,msm8953-camss", .data = &msm8953_resources },
> { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources },
> + { .compatible = "qcom,sa8775p-camss", .data = &sa8775p_resources },
Address compatible string based on DTS comment
Regards,
Suresh Vankadara.
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH RFC/WIP v2 7/9] media: qcom: camss: Add support for CSID for sa8775p
2025-04-27 7:01 ` [PATCH RFC/WIP v2 7/9] media: qcom: camss: Add support for CSID for sa8775p Vikram Sharma
@ 2025-05-10 7:58 ` Suresh Vankadara
0 siblings, 0 replies; 17+ messages in thread
From: Suresh Vankadara @ 2025-05-10 7:58 UTC (permalink / raw)
To: Vikram Sharma, rfoss, todor.too, bryan.odonoghue, mchehab, robh,
krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel
On 4/27/2025 12:31 PM, Vikram Sharma wrote:
> The CSID in sa8775p is version 690, This csid is different from
> csid 780 w.r.t few bit-fields.
>
> Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
> ---
> .../platform/qcom/camss/camss-csid-gen3.c | 31 +++-
> drivers/media/platform/qcom/camss/camss.c | 151 ++++++++++++++++++
> 2 files changed, 175 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen3.c b/drivers/media/platform/qcom/camss/camss-csid-gen3.c
> index b66105f7b901..4f9471523a08 100644
> --- a/drivers/media/platform/qcom/camss/camss-csid-gen3.c
> +++ b/drivers/media/platform/qcom/camss/camss-csid-gen3.c
> @@ -48,8 +48,12 @@
> #define CSID_CSI2_RX_IRQ_CLEAR 0xA4
> #define CSID_CSI2_RX_IRQ_SET 0xA8
>
> +#define IS_CSID_690(csid) (csid->camss->res->version ==\
> + CAMSS_8775P ? true : false)
> #define CSID_BUF_DONE_IRQ_STATUS 0x8C
> -#define BUF_DONE_IRQ_STATUS_RDI_OFFSET (csid_is_lite(csid) ? 1 : 14)
> +#define BUF_DONE_IRQ_STATUS_RDI_OFFSET (csid_is_lite(csid) ?\
> + 1 : (IS_CSID_690(csid) ?\
> + 13 : 14))
This becomes more complex if more number of chipsets under csid gen3 are
added.inline function helps for readability. It should return with 1, 13
or 14. This comment is applicable at all places in csid.
>
> -#define CSID_RDI_IRQ_SUBSAMPLE_PATTERN(rdi) (0x548 + 0x100 * (rdi))
> -#define CSID_RDI_IRQ_SUBSAMPLE_PERIOD(rdi) (0x54C + 0x100 * (rdi))
> -
> +#define CSID_RDI_IRQ_SUBSAMPLE_PATTERN(rdi) (csid_is_lite(csid) && IS_CSID_690(csid) ?\
> + (0x348 + 0x100 * (rdi)) :\
> + (0x548 + 0x100 * (rdi)))
> +#define CSID_RDI_IRQ_SUBSAMPLE_PERIOD(rdi) (csid_is_lite(csid) && IS_CSID_690(csid) ?\
> + (0x34C + 0x100 * (rdi)) :\
> + (0x54C + 0x100 * (rdi)))
Subsample pattern is not used in driver. Remove?
> #define CSI2_RX_CFG0_PHY_SEL_BASE_IDX 1
>
> static void __csid_configure_rx(struct csid_device *csid,
> @@ -103,6 +117,9 @@ static void __csid_configure_rx(struct csid_device *csid,
> val |= phy->lane_assign << CSI2_RX_CFG0_DL0_INPUT_SEL;
> val |= (phy->csiphy_id + CSI2_RX_CFG0_PHY_SEL_BASE_IDX) << CSI2_RX_CFG0_PHY_NUM_SEL;
>
> + if (IS_CSID_690(csid) && (vc > 3))
> + val |= 1 << CSI2_RX_CFG0_VC_MODE;
Is VC greater than 3? in which case?
> +static const struct camss_subdev_resources csid_res_8775p[] = {
> + /* CSID0 */
> + {
> + .regulators = {},
> +
> + .clock = { "csid", "csiphy_rx"},
> + .clock_rate = {
> + { 400000000, 400000000},
> + { 400000000, 400000000}
> + },
> +
> + .reg = { "csid0", "csid_top" },
Align name with DTS for csid_top. Comment is applicable for all
instances for this target.
> + /* CSID2 (lite) */
> + {
> + .regulators = {},
> +
> + .clock = { "cpas_ife_lite", "vfe_lite_ahb",
> + "vfe_lite_csid", "vfe_lite_cphy_rx",
> + "vfe_lite"},
Align with DTS comment in clock name. Applicable for all CSID lites for
this target.
Regards,
Suresh Vankadara.
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH RFC/WIP v2 4/9] arm64: dts: qcom: sa8775p: Add support for camss
2025-05-10 7:14 ` Suresh Vankadara
@ 2025-05-11 9:53 ` Bryan O'Donoghue
0 siblings, 0 replies; 17+ messages in thread
From: Bryan O'Donoghue @ 2025-05-11 9:53 UTC (permalink / raw)
To: Suresh Vankadara, Vikram Sharma, rfoss, todor.too, mchehab, robh,
krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel
On 10/05/2025 08:14, Suresh Vankadara wrote:
>
>
> On 4/27/2025 12:31 PM, Vikram Sharma wrote:
>> Add changes to support the camera subsystem on the SA8775P.
>>
>> Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
>> Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
>> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 187 ++++++++++++++++++++++++++
>> 1 file changed, 187 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/
>> dts/qcom/sa8775p.dtsi
>> index 5bd0c03476b1..81eadb2bb663 100644
>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> @@ -7,6 +7,7 @@
>> #include <dt-bindings/interconnect/qcom,icc.h>
>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>> #include <dt-bindings/clock/qcom,rpmh.h>
>> +#include <dt-bindings/clock/qcom,sa8775p-camcc.h>
>> #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
>> #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
>> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
>> @@ -3940,6 +3941,192 @@ videocc: clock-controller@abf0000 {
>> #power-domain-cells = <1>;
>> };
>> + camss: isp@ac7a000 {
>> + compatible = "qcom,sa8775p-camss";
> If more number of nodes are added for CAMSS, adding isp in compatible
> string helps to differentiate.
We need to keep a consistent upstream schema.
If we were adding other hardware blocks - say the BPS it would just be
appended to the end here, declared as another v4l2 device and then
wired-together from user-space via likely a qcom specific libcamera
pipeline.
>
>> + reg-names = "csid0",
>> + "csid1",
>> + "csid_lite0",
>> + "csid_lite1",
>> + "csid_lite2",
>> + "csid_lite3",
>> + "csid_lite4",
>> + "csid_wrapper",
> csid wrapper is top register set, which is applicable for both csid 0
> and csid 1. It is logical to keep along with csid0 and csid1, instead of
> alpha numerical order.
We've had it feels like an eternity of debates about this and
compromised on alphanum sort of of node-names as the most consistent
with prior art.
>
>> +
>> + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
>> + <&camcc CAM_CC_CORE_AHB_CLK>,
>> + <&camcc CAM_CC_CPAS_AHB_CLK>,
>> + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_0_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_1_CLK>,
>> + <&camcc CAM_CC_CSID_CLK>,
>> + <&camcc CAM_CC_CSIPHY0_CLK>,
>> + <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
>> + <&camcc CAM_CC_CSIPHY1_CLK>,
>> + <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
>> + <&camcc CAM_CC_CSIPHY2_CLK>,
>> + <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
>> + <&camcc CAM_CC_CSIPHY3_CLK>,
>> + <&camcc CAM_CC_CSI3PHYTIMER_CLK>,
>> + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
>> + <&gcc GCC_CAMERA_HF_AXI_CLK>,
>> + <&gcc GCC_CAMERA_SF_AXI_CLK>,
>> + <&camcc CAM_CC_ICP_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_0_CLK>,
>> + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_1_CLK>,
>> + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
>> + clock-names = "camnoc_axi",
>> + "core_ahb",
>> + "cpas_ahb",
>> + "cpas_fast_ahb_clk",
>> + "cpas_ife_lite",
>> + "cpas_vfe0",
>> + "cpas_vfe1",
> Maintain consistency on vfe/ife in complete camss node. In reg section,
> vfe is used for full and lite version. in clock-names section ife lite
> and vfe are used. As clock IDs upstream and ife is used for full and
> lite, this convention will be followed in camss node as well.
>
>> + "csid",
>> + "csiphy0",
>> + "csiphy0_timer",
>> + "csiphy1",
>> + "csiphy1_timer",
>> + "csiphy2",
>> + "csiphy2_timer",
>> + "csiphy3",
>> + "csiphy3_timer",
>> + "csiphy_rx",
>> + "gcc_axi_hf",
>> + "gcc_axi_sf",
>> + "icp_ahb",
> sf and icp_ahb clocks needed?
>
>> +
>> + interconnects = <&gem_noc MASTER_APPSS_PROC
>> QCOM_ICC_TAG_ACTIVE_ONLY
>> + &config_noc SLAVE_CAMERA_CFG
>> QCOM_ICC_TAG_ACTIVE_ONLY>,
>> + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
>> + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ACTIVE_ONLY
>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
>> + interconnect-names = "ahb",
>> + "hf_0",
>> + "sf_0";
> sf_0 needed?
>
>> +
>> + iommus = <&apps_smmu 0x3400 0x20>;
>
>
> Regards,
> Suresh Vankadara.
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2025-05-11 10:02 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-04-27 7:01 [PATCH v2 RFC/WIP 0/9] Add sa8775p camss support Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 1/9] media: qcom: camss: add generic csid handling in csid gen3 Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 2/9] media: qcom: camss: add generic vfe handling in vfe gen3 Vikram Sharma
2025-05-07 8:49 ` kernel test robot
2025-04-27 7:01 ` [PATCH RFC/WIP v2 3/9] media: dt-bindings: Add qcom,sa8775p-camss Vikram Sharma
2025-04-28 7:38 ` Krzysztof Kozlowski
2025-04-27 7:01 ` [PATCH RFC/WIP v2 4/9] arm64: dts: qcom: sa8775p: Add support for camss Vikram Sharma
2025-04-30 10:30 ` Konrad Dybcio
2025-05-10 7:14 ` Suresh Vankadara
2025-05-11 9:53 ` Bryan O'Donoghue
2025-04-27 7:01 ` [PATCH RFC/WIP v2 5/9] media: qcom: camss: Add sa8775p compatible Vikram Sharma
2025-05-10 7:25 ` Suresh Vankadara
2025-04-27 7:01 ` [PATCH RFC/WIP v2 6/9] media: qcom: camss: Add support for CSIPHY 690 Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 7/9] media: qcom: camss: Add support for CSID for sa8775p Vikram Sharma
2025-05-10 7:58 ` Suresh Vankadara
2025-04-27 7:01 ` [PATCH RFC/WIP v2 8/9] media: qcom: camss: Add support for VFE 690 Vikram Sharma
2025-04-27 7:01 ` [PATCH RFC/WIP v2 9/9] media: qcom: camss: Enumerate resources for SA8775P Vikram Sharma
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