[chrome-os:chromeos-6.6 77/77] drivers/gpu/drm/mediatek/mtk_dpi_v2.c:182: warning: Function parameter or member 'hfp_adjustment_for_bs' not described in 'mtk_dpi_conf'

[chrome-os:chromeos-6.6 77/77] drivers/gpu/drm/mediatek/mtk_dpi_v2.c:182: warning: Function parameter or member 'hfp_adjustment_for_bs' not described in 'mtk_dpi_conf'

[kernel test robot]

tree:   https://chromium.googlesource.com/chromiumos/third_party/kernel chromeos-6.6
head:   2aacb303738beffe5a274491ed38aaa5648f1dfe
commit: 2aacb303738beffe5a274491ed38aaa5648f1dfe [77/77] CHROMIUM: drm/mediatek: Correct Hsync and polarity settings to fix timing unstable issue
config: arm64-randconfig-001-20250514 (https://download.01.org/0day-ci/archive/20250514/202505141254.wOnB5ACv-lkp@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250514/202505141254.wOnB5ACv-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505141254.wOnB5ACv-lkp@intel.com/

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/mediatek/mtk_dpi_v2.c:182: warning: Function parameter or member 'dsc_support' not described in 'mtk_dpi_conf'
   drivers/gpu/drm/mediatek/mtk_dpi_v2.c:182: warning: Function parameter or member 'use_version_2' not described in 'mtk_dpi_conf'
   drivers/gpu/drm/mediatek/mtk_dpi_v2.c:182: warning: Function parameter or member 'pol_positive_default' not described in 'mtk_dpi_conf'
>> drivers/gpu/drm/mediatek/mtk_dpi_v2.c:182: warning: Function parameter or member 'hfp_adjustment_for_bs' not described in 'mtk_dpi_conf'


vim +182 drivers/gpu/drm/mediatek/mtk_dpi_v2.c

8fd26707ff2ec9 mac.shen    2025-01-27  137  
8fd26707ff2ec9 mac.shen    2025-01-27  138  /**
8fd26707ff2ec9 mac.shen    2025-01-27  139   * struct mtk_dpi_conf - Configuration of mediatek dpi.
8fd26707ff2ec9 mac.shen    2025-01-27  140   * @cal_factor: Callback function to calculate factor value.
8fd26707ff2ec9 mac.shen    2025-01-27  141   * @reg_h_fre_con: Register address of frequency control.
8fd26707ff2ec9 mac.shen    2025-01-27  142   * @max_clock_khz: Max clock frequency supported for this SoCs in khz units.
8fd26707ff2ec9 mac.shen    2025-01-27  143   * @edge_sel_en: Enable of edge selection.
8fd26707ff2ec9 mac.shen    2025-01-27  144   * @output_fmts: Array of supported output formats.
8fd26707ff2ec9 mac.shen    2025-01-27  145   * @num_output_fmts: Quantity of supported output formats.
8fd26707ff2ec9 mac.shen    2025-01-27  146   * @is_ck_de_pol: Support CK/DE polarity.
8fd26707ff2ec9 mac.shen    2025-01-27  147   * @swap_input_support: Support input swap function.
8fd26707ff2ec9 mac.shen    2025-01-27  148   * @support_direct_pin: IP supports direct connection to dpi panels.
8fd26707ff2ec9 mac.shen    2025-01-27  149   * @input_2pixel: Input pixel of dp_intf is 2 pixel per round, so enable this
8fd26707ff2ec9 mac.shen    2025-01-27  150   *		  config to enable this feature.
8fd26707ff2ec9 mac.shen    2025-01-27  151   * @dimension_mask: Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH
8fd26707ff2ec9 mac.shen    2025-01-27  152   *		    (no shift).
8fd26707ff2ec9 mac.shen    2025-01-27  153   * @hvsize_mask: Mask of HSIZE and VSIZE mask (no shift).
8fd26707ff2ec9 mac.shen    2025-01-27  154   * @channel_swap_shift: Shift value of channel swap.
8fd26707ff2ec9 mac.shen    2025-01-27  155   * @yuv422_en_bit: Enable bit of yuv422.
8fd26707ff2ec9 mac.shen    2025-01-27  156   * @csc_enable_bit: Enable bit of CSC.
8fd26707ff2ec9 mac.shen    2025-01-27  157   * @pixels_per_iter: Quantity of transferred pixels per iteration.
8fd26707ff2ec9 mac.shen    2025-01-27  158   * @edge_cfg_in_mmsys: If the edge configuration for DPI's output needs to be set in MMSYS.
8fd26707ff2ec9 mac.shen    2025-01-27  159   */
8fd26707ff2ec9 mac.shen    2025-01-27  160  struct mtk_dpi_conf {
8fd26707ff2ec9 mac.shen    2025-01-27  161  	unsigned int (*cal_factor)(int clock);
8fd26707ff2ec9 mac.shen    2025-01-27  162  	u32 reg_h_fre_con;
8fd26707ff2ec9 mac.shen    2025-01-27  163  	u32 max_clock_khz;
8fd26707ff2ec9 mac.shen    2025-01-27  164  	bool edge_sel_en;
8fd26707ff2ec9 mac.shen    2025-01-27  165  	const u32 *output_fmts;
8fd26707ff2ec9 mac.shen    2025-01-27  166  	u32 num_output_fmts;
8fd26707ff2ec9 mac.shen    2025-01-27  167  	bool is_ck_de_pol;
8fd26707ff2ec9 mac.shen    2025-01-27  168  	bool swap_input_support;
8fd26707ff2ec9 mac.shen    2025-01-27  169  	bool support_direct_pin;
8fd26707ff2ec9 mac.shen    2025-01-27  170  	bool input_2pixel;
8fd26707ff2ec9 mac.shen    2025-01-27  171  	u32 dimension_mask;
8fd26707ff2ec9 mac.shen    2025-01-27  172  	u32 hvsize_mask;
8fd26707ff2ec9 mac.shen    2025-01-27  173  	u32 channel_swap_shift;
8fd26707ff2ec9 mac.shen    2025-01-27  174  	u32 yuv422_en_bit;
8fd26707ff2ec9 mac.shen    2025-01-27  175  	u32 csc_enable_bit;
8fd26707ff2ec9 mac.shen    2025-01-27  176  	u32 pixels_per_iter;
8fd26707ff2ec9 mac.shen    2025-01-27  177  	bool edge_cfg_in_mmsys;
85764b2d198329 mac.shen    2025-01-27  178  	bool dsc_support;
8fd26707ff2ec9 mac.shen    2025-01-27  179  	bool use_version_2;
e55920c8505b78 macshen27   2025-03-11  180  	bool pol_positive_default;
2aacb303738bef Ives Chenjh 2025-04-09  181  	bool hfp_adjustment_for_bs;
8fd26707ff2ec9 mac.shen    2025-01-27 @182  };
8fd26707ff2ec9 mac.shen    2025-01-27  183  

:::::: The code at line 182 was first introduced by commit
:::::: 8fd26707ff2ec98f3a31cafc54c74a1399171b24 CHROMIUM: drm/mediatek: Add dp and dp_intf base

:::::: TO: mac.shen <mac.shen@mediatek.com>
:::::: CC: Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>

-- 
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https://github.com/intel/lkp-tests/wiki