* [PATCH v3 07/19] drm/xe/vm: Add a helper xe_vm_range_tilemask_tlb_invalidation()
2025-05-27 16:39 [PATCH v3 00/19] MADVISE FOR XE Himal Prasad Ghimiray
@ 2025-05-27 16:39 ` Himal Prasad Ghimiray
2025-05-28 23:12 ` Matthew Brost
0 siblings, 1 reply; 4+ messages in thread
From: Himal Prasad Ghimiray @ 2025-05-27 16:39 UTC (permalink / raw)
To: intel-xe; +Cc: Himal Prasad Ghimiray, Matthew Brost
Introduce xe_vm_range_tilemask_tlb_invalidation(), which issues a TLB
invalidation for a specified address range across GTs indicated by a
tilemask.
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
---
drivers/gpu/drm/xe/xe_svm.c | 43 +--------------
drivers/gpu/drm/xe/xe_vm.c | 103 ++++++++++++++++++++++++------------
drivers/gpu/drm/xe/xe_vm.h | 3 ++
3 files changed, 75 insertions(+), 74 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
index 871ac81bb04a..59e73187114d 100644
--- a/drivers/gpu/drm/xe/xe_svm.c
+++ b/drivers/gpu/drm/xe/xe_svm.c
@@ -167,14 +167,9 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
{
struct xe_vm *vm = gpusvm_to_vm(gpusvm);
struct xe_device *xe = vm->xe;
- struct xe_tile *tile;
struct drm_gpusvm_range *r, *first;
- struct xe_gt_tlb_invalidation_fence
- fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
u64 adj_start = mmu_range->start, adj_end = mmu_range->end;
u8 tile_mask = 0;
- u8 id;
- u32 fence_id = 0;
long err;
xe_svm_assert_in_notifier(vm);
@@ -220,42 +215,8 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
xe_device_wmb(xe);
- for_each_tile(tile, xe, id) {
- if (tile_mask & BIT(id)) {
- int err;
-
- xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
- &fence[fence_id], true);
-
- err = xe_gt_tlb_invalidation_range(tile->primary_gt,
- &fence[fence_id],
- adj_start,
- adj_end,
- vm->usm.asid);
- if (WARN_ON_ONCE(err < 0))
- goto wait;
- ++fence_id;
-
- if (!tile->media_gt)
- continue;
-
- xe_gt_tlb_invalidation_fence_init(tile->media_gt,
- &fence[fence_id], true);
-
- err = xe_gt_tlb_invalidation_range(tile->media_gt,
- &fence[fence_id],
- adj_start,
- adj_end,
- vm->usm.asid);
- if (WARN_ON_ONCE(err < 0))
- goto wait;
- ++fence_id;
- }
- }
-
-wait:
- for (id = 0; id < fence_id; ++id)
- xe_gt_tlb_invalidation_fence_wait(&fence[id]);
+ err = xe_vm_range_tilemask_tlb_invalidation(vm, adj_start, adj_end, tile_mask);
+ XE_WARN_ON(err);
range_notifier_event_end:
r = first;
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index de6ecff237a6..d60b711e97e9 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -3851,6 +3851,68 @@ void xe_vm_unlock(struct xe_vm *vm)
dma_resv_unlock(xe_vm_resv(vm));
}
+/**
+ * xe_vm_range_tilemask_tlb_invalidation - Issue a TLB invalidation on this tilemask for an
+ * address range
+ * @vm: The VM
+ * @start: start address
+ * @end: end address
+ * @tile_mask: mask for which gt's issue tlb invalidation
+ *
+ * Issue a range based TLB invalidation for gt's in tilemask
+ *
+ * Returns 0 for success, negative error code otherwise.
+ */
+int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
+ u64 end, u8 tile_mask)
+{
+ struct xe_gt_tlb_invalidation_fence fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
+ struct xe_tile *tile;
+ u32 fence_id = 0;
+ u8 id;
+ int err;
+
+ if (!tile_mask)
+ return 0;
+
+ for_each_tile(tile, vm->xe, id) {
+ if (tile_mask & BIT(id)) {
+ xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
+ &fence[fence_id], true);
+
+ err = xe_gt_tlb_invalidation_range(tile->primary_gt,
+ &fence[fence_id],
+ start,
+ end,
+ vm->usm.asid);
+ if (WARN_ON_ONCE(err < 0))
+ goto wait;
+ ++fence_id;
+
+ if (!tile->media_gt)
+ continue;
+
+ xe_gt_tlb_invalidation_fence_init(tile->media_gt,
+ &fence[fence_id], true);
+
+ err = xe_gt_tlb_invalidation_range(tile->media_gt,
+ &fence[fence_id],
+ start,
+ end,
+ vm->usm.asid);
+ if (WARN_ON_ONCE(err < 0))
+ goto wait;
+ ++fence_id;
+ }
+ }
+
+wait:
+ for (id = 0; id < fence_id; ++id)
+ xe_gt_tlb_invalidation_fence_wait(&fence[id]);
+
+ return err;
+}
+
/**
* xe_vm_invalidate_vma - invalidate GPU mappings for VMA without a lock
* @vma: VMA to invalidate
@@ -3865,11 +3927,9 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
{
struct xe_device *xe = xe_vma_vm(vma)->xe;
struct xe_tile *tile;
- struct xe_gt_tlb_invalidation_fence
- fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
- u8 id;
- u32 fence_id = 0;
+ u8 tile_mask = 0;
int ret = 0;
+ u8 id;
xe_assert(xe, !xe_vma_is_null(vma));
xe_assert(xe, !xe_vma_is_cpu_addr_mirror(vma));
@@ -3893,37 +3953,14 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
}
}
- for_each_tile(tile, xe, id) {
- if (xe_pt_zap_ptes(tile, vma)) {
- xe_device_wmb(xe);
- xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
- &fence[fence_id],
- true);
-
- ret = xe_gt_tlb_invalidation_vma(tile->primary_gt,
- &fence[fence_id], vma);
- if (ret)
- goto wait;
- ++fence_id;
+ for_each_tile(tile, xe, id)
+ if (xe_pt_zap_ptes(tile, vma))
+ tile_mask |= BIT(id);
- if (!tile->media_gt)
- continue;
+ xe_device_wmb(xe);
- xe_gt_tlb_invalidation_fence_init(tile->media_gt,
- &fence[fence_id],
- true);
-
- ret = xe_gt_tlb_invalidation_vma(tile->media_gt,
- &fence[fence_id], vma);
- if (ret)
- goto wait;
- ++fence_id;
- }
- }
-
-wait:
- for (id = 0; id < fence_id; ++id)
- xe_gt_tlb_invalidation_fence_wait(&fence[id]);
+ ret = xe_vm_range_tilemask_tlb_invalidation(xe_vma_vm(vma), xe_vma_start(vma),
+ xe_vma_end(vma), tile_mask);
vma->tile_invalidated = vma->tile_mask;
diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
index 99e164852f63..1ef98113fa5b 100644
--- a/drivers/gpu/drm/xe/xe_vm.h
+++ b/drivers/gpu/drm/xe/xe_vm.h
@@ -228,6 +228,9 @@ struct dma_fence *xe_vm_range_rebind(struct xe_vm *vm,
struct dma_fence *xe_vm_range_unbind(struct xe_vm *vm,
struct xe_svm_range *range);
+int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
+ u64 end, u8 tile_mask);
+
int xe_vm_invalidate_vma(struct xe_vma *vma);
int xe_vm_validate_protected(struct xe_vm *vm);
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v3 07/19] drm/xe/vm: Add a helper xe_vm_range_tilemask_tlb_invalidation()
2025-05-27 16:39 ` [PATCH v3 07/19] drm/xe/vm: Add a helper xe_vm_range_tilemask_tlb_invalidation() Himal Prasad Ghimiray
@ 2025-05-28 23:12 ` Matthew Brost
2025-05-29 3:21 ` Ghimiray, Himal Prasad
0 siblings, 1 reply; 4+ messages in thread
From: Matthew Brost @ 2025-05-28 23:12 UTC (permalink / raw)
To: Himal Prasad Ghimiray; +Cc: intel-xe
On Tue, May 27, 2025 at 10:09:51PM +0530, Himal Prasad Ghimiray wrote:
> Introduce xe_vm_range_tilemask_tlb_invalidation(), which issues a TLB
> invalidation for a specified address range across GTs indicated by a
> tilemask.
>
> Suggested-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
A couple nits, but feel free to post a follow up as independent patch to
merge ahead of madvise.
> ---
> drivers/gpu/drm/xe/xe_svm.c | 43 +--------------
> drivers/gpu/drm/xe/xe_vm.c | 103 ++++++++++++++++++++++++------------
> drivers/gpu/drm/xe/xe_vm.h | 3 ++
> 3 files changed, 75 insertions(+), 74 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
> index 871ac81bb04a..59e73187114d 100644
> --- a/drivers/gpu/drm/xe/xe_svm.c
> +++ b/drivers/gpu/drm/xe/xe_svm.c
> @@ -167,14 +167,9 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
> {
> struct xe_vm *vm = gpusvm_to_vm(gpusvm);
> struct xe_device *xe = vm->xe;
> - struct xe_tile *tile;
> struct drm_gpusvm_range *r, *first;
> - struct xe_gt_tlb_invalidation_fence
> - fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
> u64 adj_start = mmu_range->start, adj_end = mmu_range->end;
> u8 tile_mask = 0;
> - u8 id;
> - u32 fence_id = 0;
> long err;
>
> xe_svm_assert_in_notifier(vm);
> @@ -220,42 +215,8 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
>
> xe_device_wmb(xe);
>
> - for_each_tile(tile, xe, id) {
> - if (tile_mask & BIT(id)) {
> - int err;
> -
> - xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
> - &fence[fence_id], true);
> -
> - err = xe_gt_tlb_invalidation_range(tile->primary_gt,
> - &fence[fence_id],
> - adj_start,
> - adj_end,
> - vm->usm.asid);
> - if (WARN_ON_ONCE(err < 0))
> - goto wait;
> - ++fence_id;
> -
> - if (!tile->media_gt)
> - continue;
> -
> - xe_gt_tlb_invalidation_fence_init(tile->media_gt,
> - &fence[fence_id], true);
> -
> - err = xe_gt_tlb_invalidation_range(tile->media_gt,
> - &fence[fence_id],
> - adj_start,
> - adj_end,
> - vm->usm.asid);
> - if (WARN_ON_ONCE(err < 0))
> - goto wait;
> - ++fence_id;
> - }
> - }
> -
> -wait:
> - for (id = 0; id < fence_id; ++id)
> - xe_gt_tlb_invalidation_fence_wait(&fence[id]);
> + err = xe_vm_range_tilemask_tlb_invalidation(vm, adj_start, adj_end, tile_mask);
> + XE_WARN_ON(err);
WARN_ON_ONCE
>
> range_notifier_event_end:
> r = first;
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index de6ecff237a6..d60b711e97e9 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -3851,6 +3851,68 @@ void xe_vm_unlock(struct xe_vm *vm)
> dma_resv_unlock(xe_vm_resv(vm));
> }
>
> +/**
> + * xe_vm_range_tilemask_tlb_invalidation - Issue a TLB invalidation on this tilemask for an
> + * address range
> + * @vm: The VM
> + * @start: start address
> + * @end: end address
> + * @tile_mask: mask for which gt's issue tlb invalidation
> + *
> + * Issue a range based TLB invalidation for gt's in tilemask
> + *
> + * Returns 0 for success, negative error code otherwise.
> + */
> +int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
> + u64 end, u8 tile_mask)
> +{
> + struct xe_gt_tlb_invalidation_fence fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
> + struct xe_tile *tile;
> + u32 fence_id = 0;
> + u8 id;
> + int err;
> +
> + if (!tile_mask)
> + return 0;
> +
> + for_each_tile(tile, vm->xe, id) {
> + if (tile_mask & BIT(id)) {
> + xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
> + &fence[fence_id], true);
> +
> + err = xe_gt_tlb_invalidation_range(tile->primary_gt,
> + &fence[fence_id],
> + start,
> + end,
> + vm->usm.asid);
> + if (WARN_ON_ONCE(err < 0))
> + goto wait;
Let's just have the WARN_ON_ONCE in the SVM code at the caller - that is
the place where we can't really fail and warrents the warn.
> + ++fence_id;
> +
> + if (!tile->media_gt)
> + continue;
> +
> + xe_gt_tlb_invalidation_fence_init(tile->media_gt,
> + &fence[fence_id], true);
> +
> + err = xe_gt_tlb_invalidation_range(tile->media_gt,
> + &fence[fence_id],
> + start,
> + end,
> + vm->usm.asid);
> + if (WARN_ON_ONCE(err < 0))
> + goto wait;
> + ++fence_id;
> + }
> + }
> +
> +wait:
> + for (id = 0; id < fence_id; ++id)
> + xe_gt_tlb_invalidation_fence_wait(&fence[id]);
> +
> + return err;
> +}
> +
> /**
> * xe_vm_invalidate_vma - invalidate GPU mappings for VMA without a lock
> * @vma: VMA to invalidate
> @@ -3865,11 +3927,9 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
> {
> struct xe_device *xe = xe_vma_vm(vma)->xe;
> struct xe_tile *tile;
> - struct xe_gt_tlb_invalidation_fence
> - fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
> - u8 id;
> - u32 fence_id = 0;
> + u8 tile_mask = 0;
> int ret = 0;
> + u8 id;
>
> xe_assert(xe, !xe_vma_is_null(vma));
> xe_assert(xe, !xe_vma_is_cpu_addr_mirror(vma));
> @@ -3893,37 +3953,14 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
> }
> }
>
> - for_each_tile(tile, xe, id) {
> - if (xe_pt_zap_ptes(tile, vma)) {
> - xe_device_wmb(xe);
> - xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
> - &fence[fence_id],
> - true);
> -
> - ret = xe_gt_tlb_invalidation_vma(tile->primary_gt,
> - &fence[fence_id], vma);
You can delete xe_gt_tlb_invalidation_vma now as this was the only
caller.
Matt
> - if (ret)
> - goto wait;
> - ++fence_id;
> + for_each_tile(tile, xe, id)
> + if (xe_pt_zap_ptes(tile, vma))
> + tile_mask |= BIT(id);
>
> - if (!tile->media_gt)
> - continue;
> + xe_device_wmb(xe);
>
> - xe_gt_tlb_invalidation_fence_init(tile->media_gt,
> - &fence[fence_id],
> - true);
> -
> - ret = xe_gt_tlb_invalidation_vma(tile->media_gt,
> - &fence[fence_id], vma);
> - if (ret)
> - goto wait;
> - ++fence_id;
> - }
> - }
> -
> -wait:
> - for (id = 0; id < fence_id; ++id)
> - xe_gt_tlb_invalidation_fence_wait(&fence[id]);
> + ret = xe_vm_range_tilemask_tlb_invalidation(xe_vma_vm(vma), xe_vma_start(vma),
> + xe_vma_end(vma), tile_mask);
>
> vma->tile_invalidated = vma->tile_mask;
>
> diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
> index 99e164852f63..1ef98113fa5b 100644
> --- a/drivers/gpu/drm/xe/xe_vm.h
> +++ b/drivers/gpu/drm/xe/xe_vm.h
> @@ -228,6 +228,9 @@ struct dma_fence *xe_vm_range_rebind(struct xe_vm *vm,
> struct dma_fence *xe_vm_range_unbind(struct xe_vm *vm,
> struct xe_svm_range *range);
>
> +int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
> + u64 end, u8 tile_mask);
> +
> int xe_vm_invalidate_vma(struct xe_vma *vma);
>
> int xe_vm_validate_protected(struct xe_vm *vm);
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v3 07/19] drm/xe/vm: Add a helper xe_vm_range_tilemask_tlb_invalidation()
2025-05-28 23:12 ` Matthew Brost
@ 2025-05-29 3:21 ` Ghimiray, Himal Prasad
0 siblings, 0 replies; 4+ messages in thread
From: Ghimiray, Himal Prasad @ 2025-05-29 3:21 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
On 29-05-2025 04:42, Matthew Brost wrote:
> On Tue, May 27, 2025 at 10:09:51PM +0530, Himal Prasad Ghimiray wrote:
>> Introduce xe_vm_range_tilemask_tlb_invalidation(), which issues a TLB
>> invalidation for a specified address range across GTs indicated by a
>> tilemask.
>>
>> Suggested-by: Matthew Brost <matthew.brost@intel.com>
>> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>
> A couple nits, but feel free to post a follow up as independent patch to
> merge ahead of madvise.
Sure
>
>> ---
>> drivers/gpu/drm/xe/xe_svm.c | 43 +--------------
>> drivers/gpu/drm/xe/xe_vm.c | 103 ++++++++++++++++++++++++------------
>> drivers/gpu/drm/xe/xe_vm.h | 3 ++
>> 3 files changed, 75 insertions(+), 74 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
>> index 871ac81bb04a..59e73187114d 100644
>> --- a/drivers/gpu/drm/xe/xe_svm.c
>> +++ b/drivers/gpu/drm/xe/xe_svm.c
>> @@ -167,14 +167,9 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
>> {
>> struct xe_vm *vm = gpusvm_to_vm(gpusvm);
>> struct xe_device *xe = vm->xe;
>> - struct xe_tile *tile;
>> struct drm_gpusvm_range *r, *first;
>> - struct xe_gt_tlb_invalidation_fence
>> - fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
>> u64 adj_start = mmu_range->start, adj_end = mmu_range->end;
>> u8 tile_mask = 0;
>> - u8 id;
>> - u32 fence_id = 0;
>> long err;
>>
>> xe_svm_assert_in_notifier(vm);
>> @@ -220,42 +215,8 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
>>
>> xe_device_wmb(xe);
>>
>> - for_each_tile(tile, xe, id) {
>> - if (tile_mask & BIT(id)) {
>> - int err;
>> -
>> - xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
>> - &fence[fence_id], true);
>> -
>> - err = xe_gt_tlb_invalidation_range(tile->primary_gt,
>> - &fence[fence_id],
>> - adj_start,
>> - adj_end,
>> - vm->usm.asid);
>> - if (WARN_ON_ONCE(err < 0))
>> - goto wait;
>> - ++fence_id;
>> -
>> - if (!tile->media_gt)
>> - continue;
>> -
>> - xe_gt_tlb_invalidation_fence_init(tile->media_gt,
>> - &fence[fence_id], true);
>> -
>> - err = xe_gt_tlb_invalidation_range(tile->media_gt,
>> - &fence[fence_id],
>> - adj_start,
>> - adj_end,
>> - vm->usm.asid);
>> - if (WARN_ON_ONCE(err < 0))
>> - goto wait;
>> - ++fence_id;
>> - }
>> - }
>> -
>> -wait:
>> - for (id = 0; id < fence_id; ++id)
>> - xe_gt_tlb_invalidation_fence_wait(&fence[id]);
>> + err = xe_vm_range_tilemask_tlb_invalidation(vm, adj_start, adj_end, tile_mask);
>> + XE_WARN_ON(err);
>
> WARN_ON_ONCE
ok.
>
>>
>> range_notifier_event_end:
>> r = first;
>> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
>> index de6ecff237a6..d60b711e97e9 100644
>> --- a/drivers/gpu/drm/xe/xe_vm.c
>> +++ b/drivers/gpu/drm/xe/xe_vm.c
>> @@ -3851,6 +3851,68 @@ void xe_vm_unlock(struct xe_vm *vm)
>> dma_resv_unlock(xe_vm_resv(vm));
>> }
>>
>> +/**
>> + * xe_vm_range_tilemask_tlb_invalidation - Issue a TLB invalidation on this tilemask for an
>> + * address range
>> + * @vm: The VM
>> + * @start: start address
>> + * @end: end address
>> + * @tile_mask: mask for which gt's issue tlb invalidation
>> + *
>> + * Issue a range based TLB invalidation for gt's in tilemask
>> + *
>> + * Returns 0 for success, negative error code otherwise.
>> + */
>> +int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
>> + u64 end, u8 tile_mask)
>> +{
>> + struct xe_gt_tlb_invalidation_fence fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
>> + struct xe_tile *tile;
>> + u32 fence_id = 0;
>> + u8 id;
>> + int err;
>> +
>> + if (!tile_mask)
>> + return 0;
>> +
>> + for_each_tile(tile, vm->xe, id) {
>> + if (tile_mask & BIT(id)) {
>> + xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
>> + &fence[fence_id], true);
>> +
>> + err = xe_gt_tlb_invalidation_range(tile->primary_gt,
>> + &fence[fence_id],
>> + start,
>> + end,
>> + vm->usm.asid);
>> + if (WARN_ON_ONCE(err < 0))
>> + goto wait;
>
> Let's just have the WARN_ON_ONCE in the SVM code at the caller - that is
> the place where we can't really fail and warrents the warn.
ok
>
>> + ++fence_id;
>> +
>> + if (!tile->media_gt)
>> + continue;
>> +
>> + xe_gt_tlb_invalidation_fence_init(tile->media_gt,
>> + &fence[fence_id], true);
>> +
>> + err = xe_gt_tlb_invalidation_range(tile->media_gt,
>> + &fence[fence_id],
>> + start,
>> + end,
>> + vm->usm.asid);
>> + if (WARN_ON_ONCE(err < 0))
>> + goto wait;
>> + ++fence_id;
>> + }
>> + }
>> +
>> +wait:
>> + for (id = 0; id < fence_id; ++id)
>> + xe_gt_tlb_invalidation_fence_wait(&fence[id]);
>> +
>> + return err;
>> +}
>> +
>> /**
>> * xe_vm_invalidate_vma - invalidate GPU mappings for VMA without a lock
>> * @vma: VMA to invalidate
>> @@ -3865,11 +3927,9 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
>> {
>> struct xe_device *xe = xe_vma_vm(vma)->xe;
>> struct xe_tile *tile;
>> - struct xe_gt_tlb_invalidation_fence
>> - fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
>> - u8 id;
>> - u32 fence_id = 0;
>> + u8 tile_mask = 0;
>> int ret = 0;
>> + u8 id;
>>
>> xe_assert(xe, !xe_vma_is_null(vma));
>> xe_assert(xe, !xe_vma_is_cpu_addr_mirror(vma));
>> @@ -3893,37 +3953,14 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
>> }
>> }
>>
>> - for_each_tile(tile, xe, id) {
>> - if (xe_pt_zap_ptes(tile, vma)) {
>> - xe_device_wmb(xe);
>> - xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
>> - &fence[fence_id],
>> - true);
>> -
>> - ret = xe_gt_tlb_invalidation_vma(tile->primary_gt,
>> - &fence[fence_id], vma);
>
> You can delete xe_gt_tlb_invalidation_vma now as this was the only
> caller.
Makes sense.
>
> Matt
>
>> - if (ret)
>> - goto wait;
>> - ++fence_id;
>> + for_each_tile(tile, xe, id)
>> + if (xe_pt_zap_ptes(tile, vma))
>> + tile_mask |= BIT(id);
>>
>> - if (!tile->media_gt)
>> - continue;
>> + xe_device_wmb(xe);
>>
>> - xe_gt_tlb_invalidation_fence_init(tile->media_gt,
>> - &fence[fence_id],
>> - true);
>> -
>> - ret = xe_gt_tlb_invalidation_vma(tile->media_gt,
>> - &fence[fence_id], vma);
>> - if (ret)
>> - goto wait;
>> - ++fence_id;
>> - }
>> - }
>> -
>> -wait:
>> - for (id = 0; id < fence_id; ++id)
>> - xe_gt_tlb_invalidation_fence_wait(&fence[id]);
>> + ret = xe_vm_range_tilemask_tlb_invalidation(xe_vma_vm(vma), xe_vma_start(vma),
>> + xe_vma_end(vma), tile_mask);
>>
>> vma->tile_invalidated = vma->tile_mask;
>>
>> diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
>> index 99e164852f63..1ef98113fa5b 100644
>> --- a/drivers/gpu/drm/xe/xe_vm.h
>> +++ b/drivers/gpu/drm/xe/xe_vm.h
>> @@ -228,6 +228,9 @@ struct dma_fence *xe_vm_range_rebind(struct xe_vm *vm,
>> struct dma_fence *xe_vm_range_unbind(struct xe_vm *vm,
>> struct xe_svm_range *range);
>>
>> +int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
>> + u64 end, u8 tile_mask);
>> +
>> int xe_vm_invalidate_vma(struct xe_vma *vma);
>>
>> int xe_vm_validate_protected(struct xe_vm *vm);
>> --
>> 2.34.1
>>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v3 07/19] drm/xe/vm: Add a helper xe_vm_range_tilemask_tlb_invalidation()
@ 2025-05-29 21:22 kernel test robot
0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2025-05-29 21:22 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp, Dan Carpenter
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250527164003.1068118-8-himal.prasad.ghimiray@intel.com>
References: <20250527164003.1068118-8-himal.prasad.ghimiray@intel.com>
TO: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
TO: intel-xe@lists.freedesktop.org
CC: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
CC: Matthew Brost <matthew.brost@intel.com>
Hi Himal,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-xe/drm-xe-next]
[also build test WARNING on linus/master v6.15 next-20250529]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Himal-Prasad-Ghimiray/Introduce-drm_gpuvm_sm_map_ops_flags-enums-for-sm_map_ops/20250528-041919
base: https://gitlab.freedesktop.org/drm/xe/kernel.git drm-xe-next
patch link: https://lore.kernel.org/r/20250527164003.1068118-8-himal.prasad.ghimiray%40intel.com
patch subject: [PATCH v3 07/19] drm/xe/vm: Add a helper xe_vm_range_tilemask_tlb_invalidation()
:::::: branch date: 2 days ago
:::::: commit date: 2 days ago
config: loongarch-randconfig-r073-20250529 (https://download.01.org/0day-ci/archive/20250530/202505300542.iz30Sd3K-lkp@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 15.1.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>
| Closes: https://lore.kernel.org/r/202505300542.iz30Sd3K-lkp@intel.com/
New smatch warnings:
drivers/gpu/drm/xe/xe_vm.c:3913 xe_vm_range_tilemask_tlb_invalidation() error: uninitialized symbol 'err'.
Old smatch warnings:
drivers/gpu/drm/xe/xe_vm.c:2480 new_vma() error: we previously assumed 'bo' could be null (see line 2454)
drivers/gpu/drm/xe/xe_vm.c:2492 new_vma() error: 'vma' dereferencing possible ERR_PTR()
drivers/gpu/drm/xe/xe_vm.c:2919 prefetch_ranges() warn: iterator 'i' not incremented
arch/loongarch/include/asm/atomic.h:135 arch_atomic_fetch_add_unless() warn: inconsistent indenting
drivers/gpu/drm/xe/xe_vm.c:4119 xe_vm_snapshot_print() warn: passing zero to 'PTR_ERR'
vim +/err +3913 drivers/gpu/drm/xe/xe_vm.c
dd08ebf6c3525a Matthew Brost 2023-03-30 3853
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3854 /**
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3855 * xe_vm_range_tilemask_tlb_invalidation - Issue a TLB invalidation on this tilemask for an
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3856 * address range
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3857 * @vm: The VM
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3858 * @start: start address
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3859 * @end: end address
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3860 * @tile_mask: mask for which gt's issue tlb invalidation
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3861 *
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3862 * Issue a range based TLB invalidation for gt's in tilemask
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3863 *
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3864 * Returns 0 for success, negative error code otherwise.
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3865 */
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3866 int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3867 u64 end, u8 tile_mask)
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3868 {
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3869 struct xe_gt_tlb_invalidation_fence fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3870 struct xe_tile *tile;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3871 u32 fence_id = 0;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3872 u8 id;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3873 int err;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3874
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3875 if (!tile_mask)
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3876 return 0;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3877
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3878 for_each_tile(tile, vm->xe, id) {
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3879 if (tile_mask & BIT(id)) {
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3880 xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3881 &fence[fence_id], true);
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3882
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3883 err = xe_gt_tlb_invalidation_range(tile->primary_gt,
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3884 &fence[fence_id],
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3885 start,
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3886 end,
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3887 vm->usm.asid);
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3888 if (WARN_ON_ONCE(err < 0))
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3889 goto wait;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3890 ++fence_id;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3891
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3892 if (!tile->media_gt)
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3893 continue;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3894
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3895 xe_gt_tlb_invalidation_fence_init(tile->media_gt,
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3896 &fence[fence_id], true);
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3897
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3898 err = xe_gt_tlb_invalidation_range(tile->media_gt,
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3899 &fence[fence_id],
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3900 start,
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3901 end,
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3902 vm->usm.asid);
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3903 if (WARN_ON_ONCE(err < 0))
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3904 goto wait;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3905 ++fence_id;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3906 }
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3907 }
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3908
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3909 wait:
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3910 for (id = 0; id < fence_id; ++id)
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3911 xe_gt_tlb_invalidation_fence_wait(&fence[id]);
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3912
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 @3913 return err;
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3914 }
511b2f09f331fc Himal Prasad Ghimiray 2025-05-27 3915
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2025-05-29 21:22 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2025-05-29 21:22 [PATCH v3 07/19] drm/xe/vm: Add a helper xe_vm_range_tilemask_tlb_invalidation() kernel test robot
-- strict thread matches above, loose matches on Subject: below --
2025-05-27 16:39 [PATCH v3 00/19] MADVISE FOR XE Himal Prasad Ghimiray
2025-05-27 16:39 ` [PATCH v3 07/19] drm/xe/vm: Add a helper xe_vm_range_tilemask_tlb_invalidation() Himal Prasad Ghimiray
2025-05-28 23:12 ` Matthew Brost
2025-05-29 3:21 ` Ghimiray, Himal Prasad
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