* [PATCH v2 01/25] hw/i386/acpi-build: Make aml_pci_device_dsm() static
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 12:23 ` Igor Mammedov
2025-05-30 8:40 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props Eric Auger
` (23 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
No need to export aml_pci_device_dsm() as it is only used
in hw/i386/acpi-build.c.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/acpi/pci.h | 1 -
hw/i386/acpi-build.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
index 6359d574fd..ab0187a894 100644
--- a/include/hw/acpi/pci.h
+++ b/include/hw/acpi/pci.h
@@ -36,7 +36,6 @@ typedef struct AcpiMcfgInfo {
void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
const char *oem_id, const char *oem_table_id);
-Aml *aml_pci_device_dsm(void);
void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 61851cc840..f59026524f 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -338,7 +338,7 @@ build_facs(GArray *table_data)
g_array_append_vals(table_data, reserved, 40); /* Reserved */
}
-Aml *aml_pci_device_dsm(void)
+static Aml *aml_pci_device_dsm(void)
{
Aml *method;
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 01/25] hw/i386/acpi-build: Make aml_pci_device_dsm() static
2025-05-27 7:40 ` [PATCH v2 01/25] hw/i386/acpi-build: Make aml_pci_device_dsm() static Eric Auger
@ 2025-05-27 12:23 ` Igor Mammedov
2025-05-30 8:40 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 12:23 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:03 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> No need to export aml_pci_device_dsm() as it is only used
> in hw/i386/acpi-build.c.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> include/hw/acpi/pci.h | 1 -
> hw/i386/acpi-build.c | 2 +-
> 2 files changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> index 6359d574fd..ab0187a894 100644
> --- a/include/hw/acpi/pci.h
> +++ b/include/hw/acpi/pci.h
> @@ -36,7 +36,6 @@ typedef struct AcpiMcfgInfo {
>
> void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
> const char *oem_id, const char *oem_table_id);
> -Aml *aml_pci_device_dsm(void);
>
> void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
> void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 61851cc840..f59026524f 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -338,7 +338,7 @@ build_facs(GArray *table_data)
> g_array_append_vals(table_data, reserved, 40); /* Reserved */
> }
>
> -Aml *aml_pci_device_dsm(void)
> +static Aml *aml_pci_device_dsm(void)
> {
> Aml *method;
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 01/25] hw/i386/acpi-build: Make aml_pci_device_dsm() static
2025-05-27 7:40 ` [PATCH v2 01/25] hw/i386/acpi-build: Make aml_pci_device_dsm() static Eric Auger
@ 2025-05-30 8:40 ` Jonathan Cameron via
2025-05-30 8:40 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 8:40 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:03 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> No need to export aml_pci_device_dsm() as it is only used
> in hw/i386/acpi-build.c.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> include/hw/acpi/pci.h | 1 -
> hw/i386/acpi-build.c | 2 +-
> 2 files changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> index 6359d574fd..ab0187a894 100644
> --- a/include/hw/acpi/pci.h
> +++ b/include/hw/acpi/pci.h
> @@ -36,7 +36,6 @@ typedef struct AcpiMcfgInfo {
>
> void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
> const char *oem_id, const char *oem_table_id);
> -Aml *aml_pci_device_dsm(void);
>
> void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
> void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 61851cc840..f59026524f 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -338,7 +338,7 @@ build_facs(GArray *table_data)
> g_array_append_vals(table_data, reserved, 40); /* Reserved */
> }
>
> -Aml *aml_pci_device_dsm(void)
> +static Aml *aml_pci_device_dsm(void)
> {
> Aml *method;
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 01/25] hw/i386/acpi-build: Make aml_pci_device_dsm() static
@ 2025-05-30 8:40 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 8:40 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:03 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> No need to export aml_pci_device_dsm() as it is only used
> in hw/i386/acpi-build.c.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> include/hw/acpi/pci.h | 1 -
> hw/i386/acpi-build.c | 2 +-
> 2 files changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> index 6359d574fd..ab0187a894 100644
> --- a/include/hw/acpi/pci.h
> +++ b/include/hw/acpi/pci.h
> @@ -36,7 +36,6 @@ typedef struct AcpiMcfgInfo {
>
> void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
> const char *oem_id, const char *oem_table_id);
> -Aml *aml_pci_device_dsm(void);
>
> void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
> void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 61851cc840..f59026524f 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -338,7 +338,7 @@ build_facs(GArray *table_data)
> g_array_append_vals(table_data, reserved, 40); /* Reserved */
> }
>
> -Aml *aml_pci_device_dsm(void)
> +static Aml *aml_pci_device_dsm(void)
> {
> Aml *method;
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
2025-05-27 7:40 ` [PATCH v2 01/25] hw/i386/acpi-build: Make aml_pci_device_dsm() static Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 11:58 ` Igor Mammedov
2025-05-30 8:58 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 03/25] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp Eric Auger
` (22 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
acpi_pcihp VirtMachineClass state flag will allow
to opt in for acpi pci hotplug. This is guarded by a
class no_acpi_pcihp flag to manage compats (<= 10.0
machine types will not support ACPI PCI hotplug).
Machine state acpi_pcihp flag must be set before the creation
of the GED device which will use it.
Currently the ACPI PCI HP is turned off by default. This will
change later on for 10.1 machine type.
We also introduce properties to allow disabling it.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
include/hw/arm/virt.h | 2 ++
hw/arm/virt.c | 27 +++++++++++++++++++++++++++
2 files changed, 29 insertions(+)
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 9a1b0f53d2..10ea581f06 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -129,6 +129,7 @@ struct VirtMachineClass {
bool no_tcg_lpa2;
bool no_ns_el2_virt_timer_irq;
bool no_nested_smmu;
+ bool no_acpi_pcihp;
};
struct VirtMachineState {
@@ -150,6 +151,7 @@ struct VirtMachineState {
bool mte;
bool dtb_randomness;
bool second_ns_uart_present;
+ bool acpi_pcihp;
OnOffAuto acpi;
VirtGICType gic_version;
VirtIOMMUType iommu;
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9a6cd085a3..a0deeaf2b3 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
create_pcie(vms);
if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
+ vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
vms->acpi_dev = create_acpi_ged(vms);
} else {
+ vms->acpi_pcihp = false;
create_gpio_devices(vms, VIRT_GPIO, sysmem);
}
@@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
vms->its = value;
}
+static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
+{
+ VirtMachineState *vms = VIRT_MACHINE(obj);
+
+ return vms->acpi_pcihp;
+}
+
+static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
+{
+ VirtMachineState *vms = VIRT_MACHINE(obj);
+
+ vms->acpi_pcihp = value;
+}
+
static bool virt_get_dtb_randomness(Object *obj, Error **errp)
{
VirtMachineState *vms = VIRT_MACHINE(obj);
@@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
"in ACPI table header."
"The string may be up to 8 bytes in size");
+ object_class_property_add_bool(oc, "acpi-pcihp",
+ virt_get_acpi_pcihp, virt_set_acpi_pcihp);
+ object_class_property_set_description(oc, "acpi-pcihp",
+ "Force ACPI PCI hotplug");
}
static void virt_instance_init(Object *obj)
@@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
vms->tcg_its = true;
}
+ /* default disallows ACPI PCI hotplug */
+ vms->acpi_pcihp = false;
+
/* Default disallows iommu instantiation */
vms->iommu = VIRT_IOMMU_NONE;
@@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
static void virt_machine_10_0_options(MachineClass *mc)
{
+ VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
+
virt_machine_10_1_options(mc);
compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
+ /* 10.0 and earlier do not support ACPI PCI hotplug */
+ vmc->no_acpi_pcihp = true;
}
DEFINE_VIRT_MACHINE(10, 0)
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-05-27 7:40 ` [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props Eric Auger
@ 2025-05-27 11:58 ` Igor Mammedov
2025-05-27 13:54 ` Eric Auger
2025-06-11 6:47 ` Eric Auger
2025-05-30 8:58 ` Jonathan Cameron via
1 sibling, 2 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 11:58 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:04 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> acpi_pcihp VirtMachineClass state flag will allow
> to opt in for acpi pci hotplug. This is guarded by a
> class no_acpi_pcihp flag to manage compats (<= 10.0
> machine types will not support ACPI PCI hotplug).
there is no reason to put an effort in force disabling it
on old machines, as long as code works when explicitly
enabled property on CLI.
See comment below on how to deal with it
>
> Machine state acpi_pcihp flag must be set before the creation
> of the GED device which will use it.
>
> Currently the ACPI PCI HP is turned off by default. This will
> change later on for 10.1 machine type.
one thing to note, is that turning it on by default might
cause change of NIC naming in guest as this brings in
new "_Sxx" slot naming. /so configs tied to nic go down the drain/
Naming, we have, also happens to be broken wrt spec
(it should be unique system wide, there was a gitlab issue for that,
there is no easy fix that though)
So I'd leave it disabled by default and let users to turn
it on explicitly when needed.
>
> We also introduce properties to allow disabling it.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> ---
> include/hw/arm/virt.h | 2 ++
> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
> 2 files changed, 29 insertions(+)
>
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 9a1b0f53d2..10ea581f06 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -129,6 +129,7 @@ struct VirtMachineClass {
> bool no_tcg_lpa2;
> bool no_ns_el2_virt_timer_irq;
> bool no_nested_smmu;
> + bool no_acpi_pcihp;
> };
>
> struct VirtMachineState {
> @@ -150,6 +151,7 @@ struct VirtMachineState {
> bool mte;
> bool dtb_randomness;
> bool second_ns_uart_present;
> + bool acpi_pcihp;
> OnOffAuto acpi;
> VirtGICType gic_version;
> VirtIOMMUType iommu;
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 9a6cd085a3..a0deeaf2b3 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
> create_pcie(vms);
>
> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
I don't particularly like no_foo naming as it makes code harder to read
and combined with 'duplicated' field in machine state it make even things worse.
(if I recall right Philippe was cleaning mess similar flags usage
have introduced with ITS)
instead of adding machine property (both class and state),
I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
And then one can meddle with defaults using hw_compat_xxx
> vms->acpi_dev = create_acpi_ged(vms);
> } else {
> + vms->acpi_pcihp = false;
> create_gpio_devices(vms, VIRT_GPIO, sysmem);
> }
>
> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
> vms->its = value;
> }
>
> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
> +{
> + VirtMachineState *vms = VIRT_MACHINE(obj);
> +
> + return vms->acpi_pcihp;
> +}
> +
> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
> +{
> + VirtMachineState *vms = VIRT_MACHINE(obj);
> +
> + vms->acpi_pcihp = value;
> +}
> +
> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
> {
> VirtMachineState *vms = VIRT_MACHINE(obj);
> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
> "in ACPI table header."
> "The string may be up to 8 bytes in size");
>
> + object_class_property_add_bool(oc, "acpi-pcihp",
> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
> + object_class_property_set_description(oc, "acpi-pcihp",
> + "Force ACPI PCI hotplug");
> }
>
> static void virt_instance_init(Object *obj)
> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
> vms->tcg_its = true;
> }
>
> + /* default disallows ACPI PCI hotplug */
> + vms->acpi_pcihp = false;
> +
> /* Default disallows iommu instantiation */
> vms->iommu = VIRT_IOMMU_NONE;
>
> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>
> static void virt_machine_10_0_options(MachineClass *mc)
> {
> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
> +
> virt_machine_10_1_options(mc);
> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
> + /* 10.0 and earlier do not support ACPI PCI hotplug */
> + vmc->no_acpi_pcihp = true;
> }
> DEFINE_VIRT_MACHINE(10, 0)
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-05-27 11:58 ` Igor Mammedov
@ 2025-05-27 13:54 ` Eric Auger
2025-05-28 10:33 ` Igor Mammedov
2025-06-11 6:47 ` Eric Auger
1 sibling, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-05-27 13:54 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
Hi Igor,
On 5/27/25 1:58 PM, Igor Mammedov wrote:
> On Tue, 27 May 2025 09:40:04 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> acpi_pcihp VirtMachineClass state flag will allow
>> to opt in for acpi pci hotplug. This is guarded by a
>> class no_acpi_pcihp flag to manage compats (<= 10.0
>> machine types will not support ACPI PCI hotplug).
> there is no reason to put an effort in force disabling it
> on old machines, as long as code works when explicitly
> enabled property on CLI.
>
> See comment below on how to deal with it
>
>> Machine state acpi_pcihp flag must be set before the creation
>> of the GED device which will use it.
>>
>> Currently the ACPI PCI HP is turned off by default. This will
>> change later on for 10.1 machine type.
> one thing to note, is that turning it on by default might
> cause change of NIC naming in guest as this brings in
> new "_Sxx" slot naming. /so configs tied to nic go down the drain/
>
> Naming, we have, also happens to be broken wrt spec
> (it should be unique system wide, there was a gitlab issue for that,
> there is no easy fix that though)
>
> So I'd leave it disabled by default and let users to turn
> it on explicitly when needed.
what is the status on q35, isn't it enabled by default? If so why
wouldn't we want the same setting on ARM? Is that because of the known
issue you report above?
The no_foo compat stuff was especially introduced to avoid breaking the
guest ABI for old machine types (like the NIC naming alternation you evoke).
>
>> We also introduce properties to allow disabling it.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>> ---
>> include/hw/arm/virt.h | 2 ++
>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
>> 2 files changed, 29 insertions(+)
>>
>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>> index 9a1b0f53d2..10ea581f06 100644
>> --- a/include/hw/arm/virt.h
>> +++ b/include/hw/arm/virt.h
>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
>> bool no_tcg_lpa2;
>> bool no_ns_el2_virt_timer_irq;
>> bool no_nested_smmu;
>> + bool no_acpi_pcihp;
>> };
>>
>> struct VirtMachineState {
>> @@ -150,6 +151,7 @@ struct VirtMachineState {
>> bool mte;
>> bool dtb_randomness;
>> bool second_ns_uart_present;
>> + bool acpi_pcihp;
>> OnOffAuto acpi;
>> VirtGICType gic_version;
>> VirtIOMMUType iommu;
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 9a6cd085a3..a0deeaf2b3 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
>> create_pcie(vms);
>>
>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
> I don't particularly like no_foo naming as it makes code harder to read
> and combined with 'duplicated' field in machine state it make even things worse.
> (if I recall right Philippe was cleaning mess similar flags usage
> have introduced with ITS)
>
> instead of adding machine property (both class and state),
> I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
> And then one can meddle with defaults using hw_compat_xxx
no_foo still is a largely used pattern in arm virt: no_ged,
kvm_no_adjvtime, no_kvm_steal_time, no_tcg_lpa2, ../.. There are plenty
of them and I am not under the impression this is going to be changed.
If you refer to 8d23b1df7212 ("hw/arm/virt: Remove
VirtMachineClass::no_its field") I think the no_its was removed because
the machine it applied was removed.
If I understand correctly you would like the prop to be attached to the
GED device. However the GED device is internally created by the virt
machine code and not passed through a "-device" CLI option. So how would
you pass the option on the cmd line if you don't want it to be set by
default per machine type?
Thanks
Eric
>
>
>> vms->acpi_dev = create_acpi_ged(vms);
>> } else {
>> + vms->acpi_pcihp = false;
>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>> }
>>
>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
>> vms->its = value;
>> }
>>
>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
>> +{
>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>> +
>> + return vms->acpi_pcihp;
>> +}
>> +
>> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
>> +{
>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>> +
>> + vms->acpi_pcihp = value;
>> +}
>> +
>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
>> {
>> VirtMachineState *vms = VIRT_MACHINE(obj);
>> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
>> "in ACPI table header."
>> "The string may be up to 8 bytes in size");
>>
>> + object_class_property_add_bool(oc, "acpi-pcihp",
>> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
>> + object_class_property_set_description(oc, "acpi-pcihp",
>> + "Force ACPI PCI hotplug");
>> }
>>
>> static void virt_instance_init(Object *obj)
>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
>> vms->tcg_its = true;
>> }
>>
>> + /* default disallows ACPI PCI hotplug */
>> + vms->acpi_pcihp = false;
>> +
>> /* Default disallows iommu instantiation */
>> vms->iommu = VIRT_IOMMU_NONE;
>>
>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>>
>> static void virt_machine_10_0_options(MachineClass *mc)
>> {
>> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
>> +
>> virt_machine_10_1_options(mc);
>> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
>> + vmc->no_acpi_pcihp = true;
>> }
>> DEFINE_VIRT_MACHINE(10, 0)
>>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-05-27 13:54 ` Eric Auger
@ 2025-05-28 10:33 ` Igor Mammedov
2025-06-11 6:53 ` Eric Auger
0 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-05-28 10:33 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 15:54:15 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Hi Igor,
>
> On 5/27/25 1:58 PM, Igor Mammedov wrote:
> > On Tue, 27 May 2025 09:40:04 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> >> acpi_pcihp VirtMachineClass state flag will allow
> >> to opt in for acpi pci hotplug. This is guarded by a
> >> class no_acpi_pcihp flag to manage compats (<= 10.0
> >> machine types will not support ACPI PCI hotplug).
> > there is no reason to put an effort in force disabling it
> > on old machines, as long as code works when explicitly
> > enabled property on CLI.
> >
> > See comment below on how to deal with it
> >
> >> Machine state acpi_pcihp flag must be set before the creation
> >> of the GED device which will use it.
> >>
> >> Currently the ACPI PCI HP is turned off by default. This will
> >> change later on for 10.1 machine type.
> > one thing to note, is that turning it on by default might
> > cause change of NIC naming in guest as this brings in
> > new "_Sxx" slot naming. /so configs tied to nic go down the drain/
> >
> > Naming, we have, also happens to be broken wrt spec
> > (it should be unique system wide, there was a gitlab issue for that,
> > there is no easy fix that though)
> >
> > So I'd leave it disabled by default and let users to turn
> > it on explicitly when needed.
>
> what is the status on q35, isn't it enabled by default? If so why
> wouldn't we want the same setting on ARM? Is that because of the known
> issue you report above?
Above issue is not a blocker (for thae lack of a good way to fix it)
on q35 we have had a few complains and fixes, after pcihp was promoted
to default (so hopefully that won't happen on with ARM). Also given
that ARM VM is less popular like hood breaking someone setup is even less.
That said I'd be cautions keep native hotplug as default,
and only ones who need ACPI one, could turn it on explicitly.
But well it's policies, so it's up to you ARM folks to decide what
virt board should look like.
> The no_foo compat stuff was especially introduced to avoid breaking the
> guest ABI for old machine types (like the NIC naming alternation you evoke).
no_foo is just another way to handle compat stuff,
and when it's more than one knob per feature it gets ugly really fast.
Hence, I'd prefer pcihp done in x86 way aka:
hw_compat_OLD(ged.use_acpi_hotplug_bridge, false|true)
to manage presence of ACPI hotplug on desired machine version.
Side benefit it's consistent with how pcihp works on x86
> >
> >> We also introduce properties to allow disabling it.
> >>
> >> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> >> ---
> >> include/hw/arm/virt.h | 2 ++
> >> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
> >> 2 files changed, 29 insertions(+)
> >>
> >> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> >> index 9a1b0f53d2..10ea581f06 100644
> >> --- a/include/hw/arm/virt.h
> >> +++ b/include/hw/arm/virt.h
> >> @@ -129,6 +129,7 @@ struct VirtMachineClass {
> >> bool no_tcg_lpa2;
> >> bool no_ns_el2_virt_timer_irq;
> >> bool no_nested_smmu;
> >> + bool no_acpi_pcihp;
> >> };
> >>
> >> struct VirtMachineState {
> >> @@ -150,6 +151,7 @@ struct VirtMachineState {
> >> bool mte;
> >> bool dtb_randomness;
> >> bool second_ns_uart_present;
> >> + bool acpi_pcihp;
> >> OnOffAuto acpi;
> >> VirtGICType gic_version;
> >> VirtIOMMUType iommu;
> >> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> >> index 9a6cd085a3..a0deeaf2b3 100644
> >> --- a/hw/arm/virt.c
> >> +++ b/hw/arm/virt.c
> >> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
> >> create_pcie(vms);
> >>
> >> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
> >> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
> > I don't particularly like no_foo naming as it makes code harder to read
> > and combined with 'duplicated' field in machine state it make even things worse.
> > (if I recall right Philippe was cleaning mess similar flags usage
> > have introduced with ITS)
> >
> > instead of adding machine property (both class and state),
> > I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
> > And then one can meddle with defaults using hw_compat_xxx
> no_foo still is a largely used pattern in arm virt: no_ged,
> kvm_no_adjvtime, no_kvm_steal_time, no_tcg_lpa2, ../.. There are plenty
> of them and I am not under the impression this is going to be changed.
>
> If you refer to 8d23b1df7212 ("hw/arm/virt: Remove
> VirtMachineClass::no_its field") I think the no_its was removed because
> the machine it applied was removed.
>
> If I understand correctly you would like the prop to be attached to the
> GED device. However the GED device is internally created by the virt
> machine code and not passed through a "-device" CLI option. So how would
> you pass the option on the cmd line if you don't want it to be set by
> default per machine type?
>
> Thanks
>
> Eric
> >
> >
> >> vms->acpi_dev = create_acpi_ged(vms);
> >> } else {
> >> + vms->acpi_pcihp = false;
> >> create_gpio_devices(vms, VIRT_GPIO, sysmem);
> >> }
> >>
> >> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
> >> vms->its = value;
> >> }
> >>
> >> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
> >> +{
> >> + VirtMachineState *vms = VIRT_MACHINE(obj);
> >> +
> >> + return vms->acpi_pcihp;
> >> +}
> >> +
> >> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
> >> +{
> >> + VirtMachineState *vms = VIRT_MACHINE(obj);
> >> +
> >> + vms->acpi_pcihp = value;
> >> +}
> >> +
> >> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
> >> {
> >> VirtMachineState *vms = VIRT_MACHINE(obj);
> >> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
> >> "in ACPI table header."
> >> "The string may be up to 8 bytes in size");
> >>
> >> + object_class_property_add_bool(oc, "acpi-pcihp",
> >> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
> >> + object_class_property_set_description(oc, "acpi-pcihp",
> >> + "Force ACPI PCI hotplug");
> >> }
> >>
> >> static void virt_instance_init(Object *obj)
> >> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
> >> vms->tcg_its = true;
> >> }
> >>
> >> + /* default disallows ACPI PCI hotplug */
> >> + vms->acpi_pcihp = false;
> >> +
> >> /* Default disallows iommu instantiation */
> >> vms->iommu = VIRT_IOMMU_NONE;
> >>
> >> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
> >>
> >> static void virt_machine_10_0_options(MachineClass *mc)
> >> {
> >> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
> >> +
> >> virt_machine_10_1_options(mc);
> >> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
> >> + /* 10.0 and earlier do not support ACPI PCI hotplug */
> >> + vmc->no_acpi_pcihp = true;
> >> }
> >> DEFINE_VIRT_MACHINE(10, 0)
> >>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-05-28 10:33 ` Igor Mammedov
@ 2025-06-11 6:53 ` Eric Auger
2025-06-11 8:45 ` Igor Mammedov
0 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-06-11 6:53 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
Hi Gustavo, Alex,
On 5/28/25 12:33 PM, Igor Mammedov wrote:
> On Tue, 27 May 2025 15:54:15 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Hi Igor,
>>
>> On 5/27/25 1:58 PM, Igor Mammedov wrote:
>>> On Tue, 27 May 2025 09:40:04 +0200
>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>>> acpi_pcihp VirtMachineClass state flag will allow
>>>> to opt in for acpi pci hotplug. This is guarded by a
>>>> class no_acpi_pcihp flag to manage compats (<= 10.0
>>>> machine types will not support ACPI PCI hotplug).
>>> there is no reason to put an effort in force disabling it
>>> on old machines, as long as code works when explicitly
>>> enabled property on CLI.
>>>
>>> See comment below on how to deal with it
>>>
>>>> Machine state acpi_pcihp flag must be set before the creation
>>>> of the GED device which will use it.
>>>>
>>>> Currently the ACPI PCI HP is turned off by default. This will
>>>> change later on for 10.1 machine type.
>>> one thing to note, is that turning it on by default might
>>> cause change of NIC naming in guest as this brings in
>>> new "_Sxx" slot naming. /so configs tied to nic go down the drain/
>>>
>>> Naming, we have, also happens to be broken wrt spec
>>> (it should be unique system wide, there was a gitlab issue for that,
>>> there is no easy fix that though)
>>>
>>> So I'd leave it disabled by default and let users to turn
>>> it on explicitly when needed.
>> what is the status on q35, isn't it enabled by default? If so why
>> wouldn't we want the same setting on ARM? Is that because of the known
>> issue you report above?
> Above issue is not a blocker (for thae lack of a good way to fix it)
>
> on q35 we have had a few complains and fixes, after pcihp was promoted
> to default (so hopefully that won't happen on with ARM). Also given
> that ARM VM is less popular like hood breaking someone setup is even less.
>
> That said I'd be cautions keep native hotplug as default,
> and only ones who need ACPI one, could turn it on explicitly.
>
> But well it's policies, so it's up to you ARM folks to decide what
> virt board should look like.
What is your preference? Do you prefer enabling ACPI PCI HP by default
or the opposite.
Anybody else?
On my end I think I would prefer to have the same default setting than
on x86 (ie. ACPI PCI hotplug set by default) but I have no strong
opinion either.
Thanks
Eric
>
>
>> The no_foo compat stuff was especially introduced to avoid breaking the
>> guest ABI for old machine types (like the NIC naming alternation you evoke).
> no_foo is just another way to handle compat stuff,
> and when it's more than one knob per feature it gets ugly really fast.
> Hence, I'd prefer pcihp done in x86 way aka:
> hw_compat_OLD(ged.use_acpi_hotplug_bridge, false|true)
> to manage presence of ACPI hotplug on desired machine version.
> Side benefit it's consistent with how pcihp works on x86
>
>>>
>>>> We also introduce properties to allow disabling it.
>>>>
>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>> ---
>>>> include/hw/arm/virt.h | 2 ++
>>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
>>>> 2 files changed, 29 insertions(+)
>>>>
>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>>> index 9a1b0f53d2..10ea581f06 100644
>>>> --- a/include/hw/arm/virt.h
>>>> +++ b/include/hw/arm/virt.h
>>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
>>>> bool no_tcg_lpa2;
>>>> bool no_ns_el2_virt_timer_irq;
>>>> bool no_nested_smmu;
>>>> + bool no_acpi_pcihp;
>>>> };
>>>>
>>>> struct VirtMachineState {
>>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
>>>> bool mte;
>>>> bool dtb_randomness;
>>>> bool second_ns_uart_present;
>>>> + bool acpi_pcihp;
>>>> OnOffAuto acpi;
>>>> VirtGICType gic_version;
>>>> VirtIOMMUType iommu;
>>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>>>> index 9a6cd085a3..a0deeaf2b3 100644
>>>> --- a/hw/arm/virt.c
>>>> +++ b/hw/arm/virt.c
>>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
>>>> create_pcie(vms);
>>>>
>>>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
>>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
>>> I don't particularly like no_foo naming as it makes code harder to read
>>> and combined with 'duplicated' field in machine state it make even things worse.
>>> (if I recall right Philippe was cleaning mess similar flags usage
>>> have introduced with ITS)
>>>
>>> instead of adding machine property (both class and state),
>>> I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
>>> And then one can meddle with defaults using hw_compat_xxx
>> no_foo still is a largely used pattern in arm virt: no_ged,
>> kvm_no_adjvtime, no_kvm_steal_time, no_tcg_lpa2, ../.. There are plenty
>> of them and I am not under the impression this is going to be changed.
>>
>> If you refer to 8d23b1df7212 ("hw/arm/virt: Remove
>> VirtMachineClass::no_its field") I think the no_its was removed because
>> the machine it applied was removed.
>>
>> If I understand correctly you would like the prop to be attached to the
>> GED device. However the GED device is internally created by the virt
>> machine code and not passed through a "-device" CLI option. So how would
>> you pass the option on the cmd line if you don't want it to be set by
>> default per machine type?
>>
>> Thanks
>>
>> Eric
>>>
>>>> vms->acpi_dev = create_acpi_ged(vms);
>>>> } else {
>>>> + vms->acpi_pcihp = false;
>>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>>>> }
>>>>
>>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
>>>> vms->its = value;
>>>> }
>>>>
>>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
>>>> +{
>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>> +
>>>> + return vms->acpi_pcihp;
>>>> +}
>>>> +
>>>> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
>>>> +{
>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>> +
>>>> + vms->acpi_pcihp = value;
>>>> +}
>>>> +
>>>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
>>>> {
>>>> VirtMachineState *vms = VIRT_MACHINE(obj);
>>>> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
>>>> "in ACPI table header."
>>>> "The string may be up to 8 bytes in size");
>>>>
>>>> + object_class_property_add_bool(oc, "acpi-pcihp",
>>>> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
>>>> + object_class_property_set_description(oc, "acpi-pcihp",
>>>> + "Force ACPI PCI hotplug");
>>>> }
>>>>
>>>> static void virt_instance_init(Object *obj)
>>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
>>>> vms->tcg_its = true;
>>>> }
>>>>
>>>> + /* default disallows ACPI PCI hotplug */
>>>> + vms->acpi_pcihp = false;
>>>> +
>>>> /* Default disallows iommu instantiation */
>>>> vms->iommu = VIRT_IOMMU_NONE;
>>>>
>>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>>>>
>>>> static void virt_machine_10_0_options(MachineClass *mc)
>>>> {
>>>> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
>>>> +
>>>> virt_machine_10_1_options(mc);
>>>> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
>>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
>>>> + vmc->no_acpi_pcihp = true;
>>>> }
>>>> DEFINE_VIRT_MACHINE(10, 0)
>>>>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-11 6:53 ` Eric Auger
@ 2025-06-11 8:45 ` Igor Mammedov
2025-06-11 8:50 ` Eric Auger
0 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-06-11 8:45 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Wed, 11 Jun 2025 08:53:28 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Hi Gustavo, Alex,
>
> On 5/28/25 12:33 PM, Igor Mammedov wrote:
> > On Tue, 27 May 2025 15:54:15 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> >> Hi Igor,
> >>
> >> On 5/27/25 1:58 PM, Igor Mammedov wrote:
> >>> On Tue, 27 May 2025 09:40:04 +0200
> >>> Eric Auger <eric.auger@redhat.com> wrote:
> >>>
> >>>> acpi_pcihp VirtMachineClass state flag will allow
> >>>> to opt in for acpi pci hotplug. This is guarded by a
> >>>> class no_acpi_pcihp flag to manage compats (<= 10.0
> >>>> machine types will not support ACPI PCI hotplug).
> >>> there is no reason to put an effort in force disabling it
> >>> on old machines, as long as code works when explicitly
> >>> enabled property on CLI.
> >>>
> >>> See comment below on how to deal with it
> >>>
> >>>> Machine state acpi_pcihp flag must be set before the creation
> >>>> of the GED device which will use it.
> >>>>
> >>>> Currently the ACPI PCI HP is turned off by default. This will
> >>>> change later on for 10.1 machine type.
> >>> one thing to note, is that turning it on by default might
> >>> cause change of NIC naming in guest as this brings in
> >>> new "_Sxx" slot naming. /so configs tied to nic go down the drain/
> >>>
> >>> Naming, we have, also happens to be broken wrt spec
> >>> (it should be unique system wide, there was a gitlab issue for that,
> >>> there is no easy fix that though)
> >>>
> >>> So I'd leave it disabled by default and let users to turn
> >>> it on explicitly when needed.
> >> what is the status on q35, isn't it enabled by default? If so why
> >> wouldn't we want the same setting on ARM? Is that because of the known
> >> issue you report above?
> > Above issue is not a blocker (for thae lack of a good way to fix it)
> >
> > on q35 we have had a few complains and fixes, after pcihp was promoted
> > to default (so hopefully that won't happen on with ARM). Also given
> > that ARM VM is less popular like hood breaking someone setup is even less.
> >
> > That said I'd be cautions keep native hotplug as default,
> > and only ones who need ACPI one, could turn it on explicitly.
> >
> > But well it's policies, so it's up to you ARM folks to decide what
> > virt board should look like.
> What is your preference? Do you prefer enabling ACPI PCI HP by default
> or the opposite.
I'd prefer native PCIe hotplug being default,
that way we have less chance of causing regressions not to mention
less complexity (as acpi pcihp adds up quite a bit of it).
And ones who want/need acpi-pcihp/acpi-index can enable it explicitly,
to play with.
> Anybody else?
>
> On my end I think I would prefer to have the same default setting than
> on x86 (ie. ACPI PCI hotplug set by default) but I have no strong
> opinion either.
>
> Thanks
>
> Eric
> >
> >
> >> The no_foo compat stuff was especially introduced to avoid breaking the
> >> guest ABI for old machine types (like the NIC naming alternation you evoke).
> > no_foo is just another way to handle compat stuff,
> > and when it's more than one knob per feature it gets ugly really fast.
> > Hence, I'd prefer pcihp done in x86 way aka:
> > hw_compat_OLD(ged.use_acpi_hotplug_bridge, false|true)
> > to manage presence of ACPI hotplug on desired machine version.
> > Side benefit it's consistent with how pcihp works on x86
> >
> >>>
> >>>> We also introduce properties to allow disabling it.
> >>>>
> >>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> >>>> ---
> >>>> include/hw/arm/virt.h | 2 ++
> >>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
> >>>> 2 files changed, 29 insertions(+)
> >>>>
> >>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> >>>> index 9a1b0f53d2..10ea581f06 100644
> >>>> --- a/include/hw/arm/virt.h
> >>>> +++ b/include/hw/arm/virt.h
> >>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
> >>>> bool no_tcg_lpa2;
> >>>> bool no_ns_el2_virt_timer_irq;
> >>>> bool no_nested_smmu;
> >>>> + bool no_acpi_pcihp;
> >>>> };
> >>>>
> >>>> struct VirtMachineState {
> >>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
> >>>> bool mte;
> >>>> bool dtb_randomness;
> >>>> bool second_ns_uart_present;
> >>>> + bool acpi_pcihp;
> >>>> OnOffAuto acpi;
> >>>> VirtGICType gic_version;
> >>>> VirtIOMMUType iommu;
> >>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> >>>> index 9a6cd085a3..a0deeaf2b3 100644
> >>>> --- a/hw/arm/virt.c
> >>>> +++ b/hw/arm/virt.c
> >>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
> >>>> create_pcie(vms);
> >>>>
> >>>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
> >>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
> >>> I don't particularly like no_foo naming as it makes code harder to read
> >>> and combined with 'duplicated' field in machine state it make even things worse.
> >>> (if I recall right Philippe was cleaning mess similar flags usage
> >>> have introduced with ITS)
> >>>
> >>> instead of adding machine property (both class and state),
> >>> I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
> >>> And then one can meddle with defaults using hw_compat_xxx
> >> no_foo still is a largely used pattern in arm virt: no_ged,
> >> kvm_no_adjvtime, no_kvm_steal_time, no_tcg_lpa2, ../.. There are plenty
> >> of them and I am not under the impression this is going to be changed.
> >>
> >> If you refer to 8d23b1df7212 ("hw/arm/virt: Remove
> >> VirtMachineClass::no_its field") I think the no_its was removed because
> >> the machine it applied was removed.
> >>
> >> If I understand correctly you would like the prop to be attached to the
> >> GED device. However the GED device is internally created by the virt
> >> machine code and not passed through a "-device" CLI option. So how would
> >> you pass the option on the cmd line if you don't want it to be set by
> >> default per machine type?
> >>
> >> Thanks
> >>
> >> Eric
> >>>
> >>>> vms->acpi_dev = create_acpi_ged(vms);
> >>>> } else {
> >>>> + vms->acpi_pcihp = false;
> >>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
> >>>> }
> >>>>
> >>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
> >>>> vms->its = value;
> >>>> }
> >>>>
> >>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
> >>>> +{
> >>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
> >>>> +
> >>>> + return vms->acpi_pcihp;
> >>>> +}
> >>>> +
> >>>> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
> >>>> +{
> >>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
> >>>> +
> >>>> + vms->acpi_pcihp = value;
> >>>> +}
> >>>> +
> >>>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
> >>>> {
> >>>> VirtMachineState *vms = VIRT_MACHINE(obj);
> >>>> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
> >>>> "in ACPI table header."
> >>>> "The string may be up to 8 bytes in size");
> >>>>
> >>>> + object_class_property_add_bool(oc, "acpi-pcihp",
> >>>> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
> >>>> + object_class_property_set_description(oc, "acpi-pcihp",
> >>>> + "Force ACPI PCI hotplug");
> >>>> }
> >>>>
> >>>> static void virt_instance_init(Object *obj)
> >>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
> >>>> vms->tcg_its = true;
> >>>> }
> >>>>
> >>>> + /* default disallows ACPI PCI hotplug */
> >>>> + vms->acpi_pcihp = false;
> >>>> +
> >>>> /* Default disallows iommu instantiation */
> >>>> vms->iommu = VIRT_IOMMU_NONE;
> >>>>
> >>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
> >>>>
> >>>> static void virt_machine_10_0_options(MachineClass *mc)
> >>>> {
> >>>> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
> >>>> +
> >>>> virt_machine_10_1_options(mc);
> >>>> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
> >>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
> >>>> + vmc->no_acpi_pcihp = true;
> >>>> }
> >>>> DEFINE_VIRT_MACHINE(10, 0)
> >>>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-11 8:45 ` Igor Mammedov
@ 2025-06-11 8:50 ` Eric Auger
2025-06-12 12:55 ` Igor Mammedov
0 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-06-11 8:50 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
Hi Igor,
On 6/11/25 10:45 AM, Igor Mammedov wrote:
> On Wed, 11 Jun 2025 08:53:28 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Hi Gustavo, Alex,
>>
>> On 5/28/25 12:33 PM, Igor Mammedov wrote:
>>> On Tue, 27 May 2025 15:54:15 +0200
>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>>> Hi Igor,
>>>>
>>>> On 5/27/25 1:58 PM, Igor Mammedov wrote:
>>>>> On Tue, 27 May 2025 09:40:04 +0200
>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>
>>>>>> acpi_pcihp VirtMachineClass state flag will allow
>>>>>> to opt in for acpi pci hotplug. This is guarded by a
>>>>>> class no_acpi_pcihp flag to manage compats (<= 10.0
>>>>>> machine types will not support ACPI PCI hotplug).
>>>>> there is no reason to put an effort in force disabling it
>>>>> on old machines, as long as code works when explicitly
>>>>> enabled property on CLI.
>>>>>
>>>>> See comment below on how to deal with it
>>>>>
>>>>>> Machine state acpi_pcihp flag must be set before the creation
>>>>>> of the GED device which will use it.
>>>>>>
>>>>>> Currently the ACPI PCI HP is turned off by default. This will
>>>>>> change later on for 10.1 machine type.
>>>>> one thing to note, is that turning it on by default might
>>>>> cause change of NIC naming in guest as this brings in
>>>>> new "_Sxx" slot naming. /so configs tied to nic go down the drain/
>>>>>
>>>>> Naming, we have, also happens to be broken wrt spec
>>>>> (it should be unique system wide, there was a gitlab issue for that,
>>>>> there is no easy fix that though)
>>>>>
>>>>> So I'd leave it disabled by default and let users to turn
>>>>> it on explicitly when needed.
>>>> what is the status on q35, isn't it enabled by default? If so why
>>>> wouldn't we want the same setting on ARM? Is that because of the known
>>>> issue you report above?
>>> Above issue is not a blocker (for thae lack of a good way to fix it)
>>>
>>> on q35 we have had a few complains and fixes, after pcihp was promoted
>>> to default (so hopefully that won't happen on with ARM). Also given
>>> that ARM VM is less popular like hood breaking someone setup is even less.
>>>
>>> That said I'd be cautions keep native hotplug as default,
>>> and only ones who need ACPI one, could turn it on explicitly.
>>>
>>> But well it's policies, so it's up to you ARM folks to decide what
>>> virt board should look like.
>> What is your preference? Do you prefer enabling ACPI PCI HP by default
>> or the opposite.
> I'd prefer native PCIe hotplug being default,
> that way we have less chance of causing regressions not to mention
> less complexity (as acpi pcihp adds up quite a bit of it).
>
> And ones who want/need acpi-pcihp/acpi-index can enable it explicitly,
> to play with.
OK I will follow your suggestion. You have definitively more expertise
than me here ! ;-)
Thanks!
Eric
>
>> Anybody else?
>>
>> On my end I think I would prefer to have the same default setting than
>> on x86 (ie. ACPI PCI hotplug set by default) but I have no strong
>> opinion either.
>>
>> Thanks
>>
>> Eric
>>>
>>>> The no_foo compat stuff was especially introduced to avoid breaking the
>>>> guest ABI for old machine types (like the NIC naming alternation you evoke).
>>> no_foo is just another way to handle compat stuff,
>>> and when it's more than one knob per feature it gets ugly really fast.
>>> Hence, I'd prefer pcihp done in x86 way aka:
>>> hw_compat_OLD(ged.use_acpi_hotplug_bridge, false|true)
>>> to manage presence of ACPI hotplug on desired machine version.
>>> Side benefit it's consistent with how pcihp works on x86
>>>
>>>>>
>>>>>> We also introduce properties to allow disabling it.
>>>>>>
>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>> ---
>>>>>> include/hw/arm/virt.h | 2 ++
>>>>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
>>>>>> 2 files changed, 29 insertions(+)
>>>>>>
>>>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>>>>> index 9a1b0f53d2..10ea581f06 100644
>>>>>> --- a/include/hw/arm/virt.h
>>>>>> +++ b/include/hw/arm/virt.h
>>>>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
>>>>>> bool no_tcg_lpa2;
>>>>>> bool no_ns_el2_virt_timer_irq;
>>>>>> bool no_nested_smmu;
>>>>>> + bool no_acpi_pcihp;
>>>>>> };
>>>>>>
>>>>>> struct VirtMachineState {
>>>>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
>>>>>> bool mte;
>>>>>> bool dtb_randomness;
>>>>>> bool second_ns_uart_present;
>>>>>> + bool acpi_pcihp;
>>>>>> OnOffAuto acpi;
>>>>>> VirtGICType gic_version;
>>>>>> VirtIOMMUType iommu;
>>>>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>>>>>> index 9a6cd085a3..a0deeaf2b3 100644
>>>>>> --- a/hw/arm/virt.c
>>>>>> +++ b/hw/arm/virt.c
>>>>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
>>>>>> create_pcie(vms);
>>>>>>
>>>>>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
>>>>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
>>>>> I don't particularly like no_foo naming as it makes code harder to read
>>>>> and combined with 'duplicated' field in machine state it make even things worse.
>>>>> (if I recall right Philippe was cleaning mess similar flags usage
>>>>> have introduced with ITS)
>>>>>
>>>>> instead of adding machine property (both class and state),
>>>>> I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
>>>>> And then one can meddle with defaults using hw_compat_xxx
>>>> no_foo still is a largely used pattern in arm virt: no_ged,
>>>> kvm_no_adjvtime, no_kvm_steal_time, no_tcg_lpa2, ../.. There are plenty
>>>> of them and I am not under the impression this is going to be changed.
>>>>
>>>> If you refer to 8d23b1df7212 ("hw/arm/virt: Remove
>>>> VirtMachineClass::no_its field") I think the no_its was removed because
>>>> the machine it applied was removed.
>>>>
>>>> If I understand correctly you would like the prop to be attached to the
>>>> GED device. However the GED device is internally created by the virt
>>>> machine code and not passed through a "-device" CLI option. So how would
>>>> you pass the option on the cmd line if you don't want it to be set by
>>>> default per machine type?
>>>>
>>>> Thanks
>>>>
>>>> Eric
>>>>>
>>>>>> vms->acpi_dev = create_acpi_ged(vms);
>>>>>> } else {
>>>>>> + vms->acpi_pcihp = false;
>>>>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>>>>>> }
>>>>>>
>>>>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
>>>>>> vms->its = value;
>>>>>> }
>>>>>>
>>>>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
>>>>>> +{
>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>> +
>>>>>> + return vms->acpi_pcihp;
>>>>>> +}
>>>>>> +
>>>>>> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
>>>>>> +{
>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>> +
>>>>>> + vms->acpi_pcihp = value;
>>>>>> +}
>>>>>> +
>>>>>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
>>>>>> {
>>>>>> VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
>>>>>> "in ACPI table header."
>>>>>> "The string may be up to 8 bytes in size");
>>>>>>
>>>>>> + object_class_property_add_bool(oc, "acpi-pcihp",
>>>>>> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
>>>>>> + object_class_property_set_description(oc, "acpi-pcihp",
>>>>>> + "Force ACPI PCI hotplug");
>>>>>> }
>>>>>>
>>>>>> static void virt_instance_init(Object *obj)
>>>>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
>>>>>> vms->tcg_its = true;
>>>>>> }
>>>>>>
>>>>>> + /* default disallows ACPI PCI hotplug */
>>>>>> + vms->acpi_pcihp = false;
>>>>>> +
>>>>>> /* Default disallows iommu instantiation */
>>>>>> vms->iommu = VIRT_IOMMU_NONE;
>>>>>>
>>>>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>>>>>>
>>>>>> static void virt_machine_10_0_options(MachineClass *mc)
>>>>>> {
>>>>>> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
>>>>>> +
>>>>>> virt_machine_10_1_options(mc);
>>>>>> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
>>>>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
>>>>>> + vmc->no_acpi_pcihp = true;
>>>>>> }
>>>>>> DEFINE_VIRT_MACHINE(10, 0)
>>>>>>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-11 8:50 ` Eric Auger
@ 2025-06-12 12:55 ` Igor Mammedov
2025-06-13 3:01 ` Gustavo Romero
0 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-06-12 12:55 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Wed, 11 Jun 2025 10:50:04 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Hi Igor,
> On 6/11/25 10:45 AM, Igor Mammedov wrote:
> > On Wed, 11 Jun 2025 08:53:28 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> >> Hi Gustavo, Alex,
> >>
> >> On 5/28/25 12:33 PM, Igor Mammedov wrote:
> >>> On Tue, 27 May 2025 15:54:15 +0200
> >>> Eric Auger <eric.auger@redhat.com> wrote:
> >>>
> >>>> Hi Igor,
> >>>>
> >>>> On 5/27/25 1:58 PM, Igor Mammedov wrote:
> >>>>> On Tue, 27 May 2025 09:40:04 +0200
> >>>>> Eric Auger <eric.auger@redhat.com> wrote:
> >>>>>
> >>>>>> acpi_pcihp VirtMachineClass state flag will allow
> >>>>>> to opt in for acpi pci hotplug. This is guarded by a
> >>>>>> class no_acpi_pcihp flag to manage compats (<= 10.0
> >>>>>> machine types will not support ACPI PCI hotplug).
> >>>>> there is no reason to put an effort in force disabling it
> >>>>> on old machines, as long as code works when explicitly
> >>>>> enabled property on CLI.
> >>>>>
> >>>>> See comment below on how to deal with it
> >>>>>
> >>>>>> Machine state acpi_pcihp flag must be set before the creation
> >>>>>> of the GED device which will use it.
> >>>>>>
> >>>>>> Currently the ACPI PCI HP is turned off by default. This will
> >>>>>> change later on for 10.1 machine type.
> >>>>> one thing to note, is that turning it on by default might
> >>>>> cause change of NIC naming in guest as this brings in
> >>>>> new "_Sxx" slot naming. /so configs tied to nic go down the drain/
> >>>>>
> >>>>> Naming, we have, also happens to be broken wrt spec
> >>>>> (it should be unique system wide, there was a gitlab issue for that,
> >>>>> there is no easy fix that though)
> >>>>>
> >>>>> So I'd leave it disabled by default and let users to turn
> >>>>> it on explicitly when needed.
> >>>> what is the status on q35, isn't it enabled by default? If so why
> >>>> wouldn't we want the same setting on ARM? Is that because of the known
> >>>> issue you report above?
> >>> Above issue is not a blocker (for thae lack of a good way to fix it)
> >>>
> >>> on q35 we have had a few complains and fixes, after pcihp was promoted
> >>> to default (so hopefully that won't happen on with ARM). Also given
> >>> that ARM VM is less popular like hood breaking someone setup is even less.
> >>>
> >>> That said I'd be cautions keep native hotplug as default,
> >>> and only ones who need ACPI one, could turn it on explicitly.
> >>>
> >>> But well it's policies, so it's up to you ARM folks to decide what
> >>> virt board should look like.
> >> What is your preference? Do you prefer enabling ACPI PCI HP by default
> >> or the opposite.
> > I'd prefer native PCIe hotplug being default,
> > that way we have less chance of causing regressions not to mention
> > less complexity (as acpi pcihp adds up quite a bit of it).
> >
> > And ones who want/need acpi-pcihp/acpi-index can enable it explicitly,
> > to play with.
>
> OK I will follow your suggestion. You have definitively more expertise
> than me here ! ;-)
So far what I suggest looks like better option compared to multiple machine knobs
fiddling. But I can easily change my mind once I see respin, if experiment
with compat props is not coming well together.
>
> Thanks!
>
> Eric
> >
> >> Anybody else?
> >>
> >> On my end I think I would prefer to have the same default setting than
> >> on x86 (ie. ACPI PCI hotplug set by default) but I have no strong
> >> opinion either.
> >>
> >> Thanks
> >>
> >> Eric
> >>>
> >>>> The no_foo compat stuff was especially introduced to avoid breaking the
> >>>> guest ABI for old machine types (like the NIC naming alternation you evoke).
> >>> no_foo is just another way to handle compat stuff,
> >>> and when it's more than one knob per feature it gets ugly really fast.
> >>> Hence, I'd prefer pcihp done in x86 way aka:
> >>> hw_compat_OLD(ged.use_acpi_hotplug_bridge, false|true)
> >>> to manage presence of ACPI hotplug on desired machine version.
> >>> Side benefit it's consistent with how pcihp works on x86
> >>>
> >>>>>
> >>>>>> We also introduce properties to allow disabling it.
> >>>>>>
> >>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >>>>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> >>>>>> ---
> >>>>>> include/hw/arm/virt.h | 2 ++
> >>>>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
> >>>>>> 2 files changed, 29 insertions(+)
> >>>>>>
> >>>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> >>>>>> index 9a1b0f53d2..10ea581f06 100644
> >>>>>> --- a/include/hw/arm/virt.h
> >>>>>> +++ b/include/hw/arm/virt.h
> >>>>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
> >>>>>> bool no_tcg_lpa2;
> >>>>>> bool no_ns_el2_virt_timer_irq;
> >>>>>> bool no_nested_smmu;
> >>>>>> + bool no_acpi_pcihp;
> >>>>>> };
> >>>>>>
> >>>>>> struct VirtMachineState {
> >>>>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
> >>>>>> bool mte;
> >>>>>> bool dtb_randomness;
> >>>>>> bool second_ns_uart_present;
> >>>>>> + bool acpi_pcihp;
> >>>>>> OnOffAuto acpi;
> >>>>>> VirtGICType gic_version;
> >>>>>> VirtIOMMUType iommu;
> >>>>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> >>>>>> index 9a6cd085a3..a0deeaf2b3 100644
> >>>>>> --- a/hw/arm/virt.c
> >>>>>> +++ b/hw/arm/virt.c
> >>>>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
> >>>>>> create_pcie(vms);
> >>>>>>
> >>>>>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
> >>>>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
> >>>>> I don't particularly like no_foo naming as it makes code harder to read
> >>>>> and combined with 'duplicated' field in machine state it make even things worse.
> >>>>> (if I recall right Philippe was cleaning mess similar flags usage
> >>>>> have introduced with ITS)
> >>>>>
> >>>>> instead of adding machine property (both class and state),
> >>>>> I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
> >>>>> And then one can meddle with defaults using hw_compat_xxx
> >>>> no_foo still is a largely used pattern in arm virt: no_ged,
> >>>> kvm_no_adjvtime, no_kvm_steal_time, no_tcg_lpa2, ../.. There are plenty
> >>>> of them and I am not under the impression this is going to be changed.
> >>>>
> >>>> If you refer to 8d23b1df7212 ("hw/arm/virt: Remove
> >>>> VirtMachineClass::no_its field") I think the no_its was removed because
> >>>> the machine it applied was removed.
> >>>>
> >>>> If I understand correctly you would like the prop to be attached to the
> >>>> GED device. However the GED device is internally created by the virt
> >>>> machine code and not passed through a "-device" CLI option. So how would
> >>>> you pass the option on the cmd line if you don't want it to be set by
> >>>> default per machine type?
> >>>>
> >>>> Thanks
> >>>>
> >>>> Eric
> >>>>>
> >>>>>> vms->acpi_dev = create_acpi_ged(vms);
> >>>>>> } else {
> >>>>>> + vms->acpi_pcihp = false;
> >>>>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
> >>>>>> }
> >>>>>>
> >>>>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
> >>>>>> vms->its = value;
> >>>>>> }
> >>>>>>
> >>>>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
> >>>>>> +{
> >>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
> >>>>>> +
> >>>>>> + return vms->acpi_pcihp;
> >>>>>> +}
> >>>>>> +
> >>>>>> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
> >>>>>> +{
> >>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
> >>>>>> +
> >>>>>> + vms->acpi_pcihp = value;
> >>>>>> +}
> >>>>>> +
> >>>>>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
> >>>>>> {
> >>>>>> VirtMachineState *vms = VIRT_MACHINE(obj);
> >>>>>> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
> >>>>>> "in ACPI table header."
> >>>>>> "The string may be up to 8 bytes in size");
> >>>>>>
> >>>>>> + object_class_property_add_bool(oc, "acpi-pcihp",
> >>>>>> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
> >>>>>> + object_class_property_set_description(oc, "acpi-pcihp",
> >>>>>> + "Force ACPI PCI hotplug");
> >>>>>> }
> >>>>>>
> >>>>>> static void virt_instance_init(Object *obj)
> >>>>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
> >>>>>> vms->tcg_its = true;
> >>>>>> }
> >>>>>>
> >>>>>> + /* default disallows ACPI PCI hotplug */
> >>>>>> + vms->acpi_pcihp = false;
> >>>>>> +
> >>>>>> /* Default disallows iommu instantiation */
> >>>>>> vms->iommu = VIRT_IOMMU_NONE;
> >>>>>>
> >>>>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
> >>>>>>
> >>>>>> static void virt_machine_10_0_options(MachineClass *mc)
> >>>>>> {
> >>>>>> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
> >>>>>> +
> >>>>>> virt_machine_10_1_options(mc);
> >>>>>> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
> >>>>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
> >>>>>> + vmc->no_acpi_pcihp = true;
> >>>>>> }
> >>>>>> DEFINE_VIRT_MACHINE(10, 0)
> >>>>>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-12 12:55 ` Igor Mammedov
@ 2025-06-13 3:01 ` Gustavo Romero
2025-06-13 5:05 ` Eric Auger
0 siblings, 1 reply; 121+ messages in thread
From: Gustavo Romero @ 2025-06-13 3:01 UTC (permalink / raw)
To: Igor Mammedov, Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, anisinha,
mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Eric,
On 6/12/25 09:55, Igor Mammedov wrote:
> On Wed, 11 Jun 2025 10:50:04 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Hi Igor,
>> On 6/11/25 10:45 AM, Igor Mammedov wrote:
>>> On Wed, 11 Jun 2025 08:53:28 +0200
>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>>> Hi Gustavo, Alex,
>>>>
>>>> On 5/28/25 12:33 PM, Igor Mammedov wrote:
>>>>> On Tue, 27 May 2025 15:54:15 +0200
>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>
>>>>>> Hi Igor,
>>>>>>
>>>>>> On 5/27/25 1:58 PM, Igor Mammedov wrote:
>>>>>>> On Tue, 27 May 2025 09:40:04 +0200
>>>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>>>
>>>>>>>> acpi_pcihp VirtMachineClass state flag will allow
>>>>>>>> to opt in for acpi pci hotplug. This is guarded by a
>>>>>>>> class no_acpi_pcihp flag to manage compats (<= 10.0
>>>>>>>> machine types will not support ACPI PCI hotplug).
>>>>>>> there is no reason to put an effort in force disabling it
>>>>>>> on old machines, as long as code works when explicitly
>>>>>>> enabled property on CLI.
>>>>>>>
>>>>>>> See comment below on how to deal with it
>>>>>>>
>>>>>>>> Machine state acpi_pcihp flag must be set before the creation
>>>>>>>> of the GED device which will use it.
>>>>>>>>
>>>>>>>> Currently the ACPI PCI HP is turned off by default. This will
>>>>>>>> change later on for 10.1 machine type.
>>>>>>> one thing to note, is that turning it on by default might
>>>>>>> cause change of NIC naming in guest as this brings in
>>>>>>> new "_Sxx" slot naming. /so configs tied to nic go down the drain/
>>>>>>>
>>>>>>> Naming, we have, also happens to be broken wrt spec
>>>>>>> (it should be unique system wide, there was a gitlab issue for that,
>>>>>>> there is no easy fix that though)
>>>>>>>
>>>>>>> So I'd leave it disabled by default and let users to turn
>>>>>>> it on explicitly when needed.
>>>>>> what is the status on q35, isn't it enabled by default? If so why
>>>>>> wouldn't we want the same setting on ARM? Is that because of the known
>>>>>> issue you report above?
>>>>> Above issue is not a blocker (for thae lack of a good way to fix it)
>>>>>
>>>>> on q35 we have had a few complains and fixes, after pcihp was promoted
>>>>> to default (so hopefully that won't happen on with ARM). Also given
>>>>> that ARM VM is less popular like hood breaking someone setup is even less.
>>>>>
>>>>> That said I'd be cautions keep native hotplug as default,
>>>>> and only ones who need ACPI one, could turn it on explicitly.
>>>>>
>>>>> But well it's policies, so it's up to you ARM folks to decide what
>>>>> virt board should look like.
>>>> What is your preference? Do you prefer enabling ACPI PCI HP by default
>>>> or the opposite.
>>> I'd prefer native PCIe hotplug being default,
>>> that way we have less chance of causing regressions not to mention
>>> less complexity (as acpi pcihp adds up quite a bit of it).
>>>
>>> And ones who want/need acpi-pcihp/acpi-index can enable it explicitly,
>>> to play with.
>>
>> OK I will follow your suggestion. You have definitively more expertise
>> than me here ! ;-)
>
> So far what I suggest looks like better option compared to multiple machine knobs
> fiddling. But I can easily change my mind once I see respin, if experiment
> with compat props is not coming well together.
For now, I think it's okay to let ACPI PCI hotplug stabilize (while not being the
default) for at least one release cycle. So I'm fine with keeping acpi-pcihp=off as
the default.
As I mentioned elsewhere, I don't consider native PCIe hotplug to be legacy.
We can make acpi-pcihp=on the default in a future release once it's been more
widely exercised.
I'll update the bios-tables-test.c test accordingly, then you can either put them
in the v3 (if you happen to send v3 next week) or add them to a v4.
Cheers,
Gustavo
>> Thanks!
>>
>> Eric
>>>
>>>> Anybody else?
>>>>
>>>> On my end I think I would prefer to have the same default setting than
>>>> on x86 (ie. ACPI PCI hotplug set by default) but I have no strong
>>>> opinion either.
>>>>
>>>> Thanks
>>>>
>>>> Eric
>>>>>
>>>>>> The no_foo compat stuff was especially introduced to avoid breaking the
>>>>>> guest ABI for old machine types (like the NIC naming alternation you evoke).
>>>>> no_foo is just another way to handle compat stuff,
>>>>> and when it's more than one knob per feature it gets ugly really fast.
>>>>> Hence, I'd prefer pcihp done in x86 way aka:
>>>>> hw_compat_OLD(ged.use_acpi_hotplug_bridge, false|true)
>>>>> to manage presence of ACPI hotplug on desired machine version.
>>>>> Side benefit it's consistent with how pcihp works on x86
>>>>>
>>>>>>>
>>>>>>>> We also introduce properties to allow disabling it.
>>>>>>>>
>>>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>>>> ---
>>>>>>>> include/hw/arm/virt.h | 2 ++
>>>>>>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
>>>>>>>> 2 files changed, 29 insertions(+)
>>>>>>>>
>>>>>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>>>>>>> index 9a1b0f53d2..10ea581f06 100644
>>>>>>>> --- a/include/hw/arm/virt.h
>>>>>>>> +++ b/include/hw/arm/virt.h
>>>>>>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
>>>>>>>> bool no_tcg_lpa2;
>>>>>>>> bool no_ns_el2_virt_timer_irq;
>>>>>>>> bool no_nested_smmu;
>>>>>>>> + bool no_acpi_pcihp;
>>>>>>>> };
>>>>>>>>
>>>>>>>> struct VirtMachineState {
>>>>>>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
>>>>>>>> bool mte;
>>>>>>>> bool dtb_randomness;
>>>>>>>> bool second_ns_uart_present;
>>>>>>>> + bool acpi_pcihp;
>>>>>>>> OnOffAuto acpi;
>>>>>>>> VirtGICType gic_version;
>>>>>>>> VirtIOMMUType iommu;
>>>>>>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>>>>>>>> index 9a6cd085a3..a0deeaf2b3 100644
>>>>>>>> --- a/hw/arm/virt.c
>>>>>>>> +++ b/hw/arm/virt.c
>>>>>>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
>>>>>>>> create_pcie(vms);
>>>>>>>>
>>>>>>>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
>>>>>>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
>>>>>>> I don't particularly like no_foo naming as it makes code harder to read
>>>>>>> and combined with 'duplicated' field in machine state it make even things worse.
>>>>>>> (if I recall right Philippe was cleaning mess similar flags usage
>>>>>>> have introduced with ITS)
>>>>>>>
>>>>>>> instead of adding machine property (both class and state),
>>>>>>> I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
>>>>>>> And then one can meddle with defaults using hw_compat_xxx
>>>>>> no_foo still is a largely used pattern in arm virt: no_ged,
>>>>>> kvm_no_adjvtime, no_kvm_steal_time, no_tcg_lpa2, ../.. There are plenty
>>>>>> of them and I am not under the impression this is going to be changed.
>>>>>>
>>>>>> If you refer to 8d23b1df7212 ("hw/arm/virt: Remove
>>>>>> VirtMachineClass::no_its field") I think the no_its was removed because
>>>>>> the machine it applied was removed.
>>>>>>
>>>>>> If I understand correctly you would like the prop to be attached to the
>>>>>> GED device. However the GED device is internally created by the virt
>>>>>> machine code and not passed through a "-device" CLI option. So how would
>>>>>> you pass the option on the cmd line if you don't want it to be set by
>>>>>> default per machine type?
>>>>>>
>>>>>> Thanks
>>>>>>
>>>>>> Eric
>>>>>>>
>>>>>>>> vms->acpi_dev = create_acpi_ged(vms);
>>>>>>>> } else {
>>>>>>>> + vms->acpi_pcihp = false;
>>>>>>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>>>>>>>> }
>>>>>>>>
>>>>>>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
>>>>>>>> vms->its = value;
>>>>>>>> }
>>>>>>>>
>>>>>>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
>>>>>>>> +{
>>>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>> +
>>>>>>>> + return vms->acpi_pcihp;
>>>>>>>> +}
>>>>>>>> +
>>>>>>>> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
>>>>>>>> +{
>>>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>> +
>>>>>>>> + vms->acpi_pcihp = value;
>>>>>>>> +}
>>>>>>>> +
>>>>>>>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
>>>>>>>> {
>>>>>>>> VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
>>>>>>>> "in ACPI table header."
>>>>>>>> "The string may be up to 8 bytes in size");
>>>>>>>>
>>>>>>>> + object_class_property_add_bool(oc, "acpi-pcihp",
>>>>>>>> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
>>>>>>>> + object_class_property_set_description(oc, "acpi-pcihp",
>>>>>>>> + "Force ACPI PCI hotplug");
>>>>>>>> }
>>>>>>>>
>>>>>>>> static void virt_instance_init(Object *obj)
>>>>>>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
>>>>>>>> vms->tcg_its = true;
>>>>>>>> }
>>>>>>>>
>>>>>>>> + /* default disallows ACPI PCI hotplug */
>>>>>>>> + vms->acpi_pcihp = false;
>>>>>>>> +
>>>>>>>> /* Default disallows iommu instantiation */
>>>>>>>> vms->iommu = VIRT_IOMMU_NONE;
>>>>>>>>
>>>>>>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>>>>>>>>
>>>>>>>> static void virt_machine_10_0_options(MachineClass *mc)
>>>>>>>> {
>>>>>>>> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
>>>>>>>> +
>>>>>>>> virt_machine_10_1_options(mc);
>>>>>>>> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
>>>>>>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
>>>>>>>> + vmc->no_acpi_pcihp = true;
>>>>>>>> }
>>>>>>>> DEFINE_VIRT_MACHINE(10, 0)
>>>>>>>>
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-13 3:01 ` Gustavo Romero
@ 2025-06-13 5:05 ` Eric Auger
2025-06-13 13:39 ` Gustavo Romero
0 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-06-13 5:05 UTC (permalink / raw)
To: Gustavo Romero, Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, anisinha,
mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Gustavo,
On 6/13/25 5:01 AM, Gustavo Romero wrote:
> Hi Eric,
>
> On 6/12/25 09:55, Igor Mammedov wrote:
>> On Wed, 11 Jun 2025 10:50:04 +0200
>> Eric Auger <eric.auger@redhat.com> wrote:
>>
>>> Hi Igor,
>>> On 6/11/25 10:45 AM, Igor Mammedov wrote:
>>>> On Wed, 11 Jun 2025 08:53:28 +0200
>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>
>>>>> Hi Gustavo, Alex,
>>>>>
>>>>> On 5/28/25 12:33 PM, Igor Mammedov wrote:
>>>>>> On Tue, 27 May 2025 15:54:15 +0200
>>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>>
>>>>>>> Hi Igor,
>>>>>>>
>>>>>>> On 5/27/25 1:58 PM, Igor Mammedov wrote:
>>>>>>>> On Tue, 27 May 2025 09:40:04 +0200
>>>>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>>>>
>>>>>>>>> acpi_pcihp VirtMachineClass state flag will allow
>>>>>>>>> to opt in for acpi pci hotplug. This is guarded by a
>>>>>>>>> class no_acpi_pcihp flag to manage compats (<= 10.0
>>>>>>>>> machine types will not support ACPI PCI hotplug).
>>>>>>>> there is no reason to put an effort in force disabling it
>>>>>>>> on old machines, as long as code works when explicitly
>>>>>>>> enabled property on CLI.
>>>>>>>>
>>>>>>>> See comment below on how to deal with it
>>>>>>>>
>>>>>>>>> Machine state acpi_pcihp flag must be set before the creation
>>>>>>>>> of the GED device which will use it.
>>>>>>>>>
>>>>>>>>> Currently the ACPI PCI HP is turned off by default. This will
>>>>>>>>> change later on for 10.1 machine type.
>>>>>>>> one thing to note, is that turning it on by default might
>>>>>>>> cause change of NIC naming in guest as this brings in
>>>>>>>> new "_Sxx" slot naming. /so configs tied to nic go down the
>>>>>>>> drain/
>>>>>>>>
>>>>>>>> Naming, we have, also happens to be broken wrt spec
>>>>>>>> (it should be unique system wide, there was a gitlab issue for
>>>>>>>> that,
>>>>>>>> there is no easy fix that though)
>>>>>>>>
>>>>>>>> So I'd leave it disabled by default and let users to turn
>>>>>>>> it on explicitly when needed.
>>>>>>> what is the status on q35, isn't it enabled by default? If so why
>>>>>>> wouldn't we want the same setting on ARM? Is that because of the
>>>>>>> known
>>>>>>> issue you report above?
>>>>>> Above issue is not a blocker (for thae lack of a good way to fix it)
>>>>>>
>>>>>> on q35 we have had a few complains and fixes, after pcihp was
>>>>>> promoted
>>>>>> to default (so hopefully that won't happen on with ARM). Also given
>>>>>> that ARM VM is less popular like hood breaking someone setup is
>>>>>> even less.
>>>>>>
>>>>>> That said I'd be cautions keep native hotplug as default,
>>>>>> and only ones who need ACPI one, could turn it on explicitly.
>>>>>>
>>>>>> But well it's policies, so it's up to you ARM folks to decide what
>>>>>> virt board should look like.
>>>>> What is your preference? Do you prefer enabling ACPI PCI HP by
>>>>> default
>>>>> or the opposite.
>>>> I'd prefer native PCIe hotplug being default,
>>>> that way we have less chance of causing regressions not to mention
>>>> less complexity (as acpi pcihp adds up quite a bit of it).
>>>>
>>>> And ones who want/need acpi-pcihp/acpi-index can enable it explicitly,
>>>> to play with.
>>>
>>> OK I will follow your suggestion. You have definitively more expertise
>>> than me here ! ;-)
>>
>> So far what I suggest looks like better option compared to multiple
>> machine knobs
>> fiddling. But I can easily change my mind once I see respin, if
>> experiment
>> with compat props is not coming well together.
>
> For now, I think it's okay to let ACPI PCI hotplug stabilize (while
> not being the
> default) for at least one release cycle. So I'm fine with keeping
> acpi-pcihp=off as
> the default.
>
> As I mentioned elsewhere, I don't consider native PCIe hotplug to be
> legacy.
>
> We can make acpi-pcihp=on the default in a future release once it's
> been more
> widely exercised.
>
> I'll update the bios-tables-test.c test accordingly, then you can
> either put them
> in the v3 (if you happen to send v3 next week) or add them to a v4.
OK thank you for the confirmation. So following Igor's suggestion I
indeed kept the current default value (legacy PCIe hotplug) and I don't
use a machine option anymore. Instead I use the x86 trick, ie.
-global acpi-ged.acpi-pci-hotplug-with-bridge-support=on
I can easily update your tests with that option, don't bother
respinning. I should be able to send the v3 by beginning of next week.
Thanks!
Eric
>
>
> Cheers,
> Gustavo
>
>>> Thanks!
>>>
>>> Eric
>>>>
>>>>> Anybody else?
>>>>>
>>>>> On my end I think I would prefer to have the same default setting
>>>>> than
>>>>> on x86 (ie. ACPI PCI hotplug set by default) but I have no strong
>>>>> opinion either.
>>>>>
>>>>> Thanks
>>>>>
>>>>> Eric
>>>>>>
>>>>>>> The no_foo compat stuff was especially introduced to avoid
>>>>>>> breaking the
>>>>>>> guest ABI for old machine types (like the NIC naming alternation
>>>>>>> you evoke).
>>>>>> no_foo is just another way to handle compat stuff,
>>>>>> and when it's more than one knob per feature it gets ugly really
>>>>>> fast.
>>>>>> Hence, I'd prefer pcihp done in x86 way aka:
>>>>>> hw_compat_OLD(ged.use_acpi_hotplug_bridge, false|true)
>>>>>> to manage presence of ACPI hotplug on desired machine version.
>>>>>> Side benefit it's consistent with how pcihp works on x86
>>>>>>
>>>>>>>>
>>>>>>>>> We also introduce properties to allow disabling it.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>>>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>>>>> ---
>>>>>>>>> include/hw/arm/virt.h | 2 ++
>>>>>>>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
>>>>>>>>> 2 files changed, 29 insertions(+)
>>>>>>>>>
>>>>>>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>>>>>>>> index 9a1b0f53d2..10ea581f06 100644
>>>>>>>>> --- a/include/hw/arm/virt.h
>>>>>>>>> +++ b/include/hw/arm/virt.h
>>>>>>>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
>>>>>>>>> bool no_tcg_lpa2;
>>>>>>>>> bool no_ns_el2_virt_timer_irq;
>>>>>>>>> bool no_nested_smmu;
>>>>>>>>> + bool no_acpi_pcihp;
>>>>>>>>> };
>>>>>>>>> struct VirtMachineState {
>>>>>>>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
>>>>>>>>> bool mte;
>>>>>>>>> bool dtb_randomness;
>>>>>>>>> bool second_ns_uart_present;
>>>>>>>>> + bool acpi_pcihp;
>>>>>>>>> OnOffAuto acpi;
>>>>>>>>> VirtGICType gic_version;
>>>>>>>>> VirtIOMMUType iommu;
>>>>>>>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>>>>>>>>> index 9a6cd085a3..a0deeaf2b3 100644
>>>>>>>>> --- a/hw/arm/virt.c
>>>>>>>>> +++ b/hw/arm/virt.c
>>>>>>>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState
>>>>>>>>> *machine)
>>>>>>>>> create_pcie(vms);
>>>>>>>>> if (has_ged && aarch64 && firmware_loaded &&
>>>>>>>>> virt_is_acpi_enabled(vms)) {
>>>>>>>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
>>>>>>>> I don't particularly like no_foo naming as it makes code harder
>>>>>>>> to read
>>>>>>>> and combined with 'duplicated' field in machine state it make
>>>>>>>> even things worse.
>>>>>>>> (if I recall right Philippe was cleaning mess similar flags usage
>>>>>>>> have introduced with ITS)
>>>>>>>>
>>>>>>>> instead of adding machine property (both class and state),
>>>>>>>> I'd suggest adding the only property to GPE device (akin to
>>>>>>>> what we have in x86 world)
>>>>>>>> And then one can meddle with defaults using hw_compat_xxx
>>>>>>> no_foo still is a largely used pattern in arm virt: no_ged,
>>>>>>> kvm_no_adjvtime, no_kvm_steal_time, no_tcg_lpa2, ../.. There are
>>>>>>> plenty
>>>>>>> of them and I am not under the impression this is going to be
>>>>>>> changed.
>>>>>>>
>>>>>>> If you refer to 8d23b1df7212 ("hw/arm/virt: Remove
>>>>>>> VirtMachineClass::no_its field") I think the no_its was removed
>>>>>>> because
>>>>>>> the machine it applied was removed.
>>>>>>>
>>>>>>> If I understand correctly you would like the prop to be attached
>>>>>>> to the
>>>>>>> GED device. However the GED device is internally created by the
>>>>>>> virt
>>>>>>> machine code and not passed through a "-device" CLI option. So
>>>>>>> how would
>>>>>>> you pass the option on the cmd line if you don't want it to be
>>>>>>> set by
>>>>>>> default per machine type?
>>>>>>>
>>>>>>> Thanks
>>>>>>>
>>>>>>> Eric
>>>>>>>>
>>>>>>>>> vms->acpi_dev = create_acpi_ged(vms);
>>>>>>>>> } else {
>>>>>>>>> + vms->acpi_pcihp = false;
>>>>>>>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>>>>>>>>> }
>>>>>>>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj,
>>>>>>>>> bool value, Error **errp)
>>>>>>>>> vms->its = value;
>>>>>>>>> }
>>>>>>>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
>>>>>>>>> +{
>>>>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>>> +
>>>>>>>>> + return vms->acpi_pcihp;
>>>>>>>>> +}
>>>>>>>>> +
>>>>>>>>> +static void virt_set_acpi_pcihp(Object *obj, bool value,
>>>>>>>>> Error **errp)
>>>>>>>>> +{
>>>>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>>> +
>>>>>>>>> + vms->acpi_pcihp = value;
>>>>>>>>> +}
>>>>>>>>> +
>>>>>>>>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
>>>>>>>>> {
>>>>>>>>> VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>>> @@ -3310,6 +3326,10 @@ static void
>>>>>>>>> virt_machine_class_init(ObjectClass *oc, const void *data)
>>>>>>>>> "in ACPI table
>>>>>>>>> header."
>>>>>>>>> "The string may be
>>>>>>>>> up to 8 bytes in size");
>>>>>>>>> + object_class_property_add_bool(oc, "acpi-pcihp",
>>>>>>>>> + virt_get_acpi_pcihp,
>>>>>>>>> virt_set_acpi_pcihp);
>>>>>>>>> + object_class_property_set_description(oc, "acpi-pcihp",
>>>>>>>>> + "Force ACPI PCI
>>>>>>>>> hotplug");
>>>>>>>>> }
>>>>>>>>> static void virt_instance_init(Object *obj)
>>>>>>>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
>>>>>>>>> vms->tcg_its = true;
>>>>>>>>> }
>>>>>>>>> + /* default disallows ACPI PCI hotplug */
>>>>>>>>> + vms->acpi_pcihp = false;
>>>>>>>>> +
>>>>>>>>> /* Default disallows iommu instantiation */
>>>>>>>>> vms->iommu = VIRT_IOMMU_NONE;
>>>>>>>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>>>>>>>>> static void virt_machine_10_0_options(MachineClass *mc)
>>>>>>>>> {
>>>>>>>>> + VirtMachineClass *vmc =
>>>>>>>>> VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
>>>>>>>>> +
>>>>>>>>> virt_machine_10_1_options(mc);
>>>>>>>>> compat_props_add(mc->compat_props, hw_compat_10_0,
>>>>>>>>> hw_compat_10_0_len);
>>>>>>>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
>>>>>>>>> + vmc->no_acpi_pcihp = true;
>>>>>>>>> }
>>>>>>>>> DEFINE_VIRT_MACHINE(10, 0)
>>>>>>>>>
>>>
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-13 5:05 ` Eric Auger
@ 2025-06-13 13:39 ` Gustavo Romero
2025-06-14 8:04 ` Eric Auger
0 siblings, 1 reply; 121+ messages in thread
From: Gustavo Romero @ 2025-06-13 13:39 UTC (permalink / raw)
To: eric.auger, Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, anisinha,
mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Eric,
On 6/13/25 02:05, Eric Auger wrote:
> Hi Gustavo,
>
> On 6/13/25 5:01 AM, Gustavo Romero wrote:
>> Hi Eric,
>>
>> On 6/12/25 09:55, Igor Mammedov wrote:
>>> On Wed, 11 Jun 2025 10:50:04 +0200
>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>>> Hi Igor,
>>>> On 6/11/25 10:45 AM, Igor Mammedov wrote:
>>>>> On Wed, 11 Jun 2025 08:53:28 +0200
>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>
>>>>>> Hi Gustavo, Alex,
>>>>>>
>>>>>> On 5/28/25 12:33 PM, Igor Mammedov wrote:
>>>>>>> On Tue, 27 May 2025 15:54:15 +0200
>>>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>>>
>>>>>>>> Hi Igor,
>>>>>>>>
>>>>>>>> On 5/27/25 1:58 PM, Igor Mammedov wrote:
>>>>>>>>> On Tue, 27 May 2025 09:40:04 +0200
>>>>>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>>>>>
>>>>>>>>>> acpi_pcihp VirtMachineClass state flag will allow
>>>>>>>>>> to opt in for acpi pci hotplug. This is guarded by a
>>>>>>>>>> class no_acpi_pcihp flag to manage compats (<= 10.0
>>>>>>>>>> machine types will not support ACPI PCI hotplug).
>>>>>>>>> there is no reason to put an effort in force disabling it
>>>>>>>>> on old machines, as long as code works when explicitly
>>>>>>>>> enabled property on CLI.
>>>>>>>>>
>>>>>>>>> See comment below on how to deal with it
>>>>>>>>>
>>>>>>>>>> Machine state acpi_pcihp flag must be set before the creation
>>>>>>>>>> of the GED device which will use it.
>>>>>>>>>>
>>>>>>>>>> Currently the ACPI PCI HP is turned off by default. This will
>>>>>>>>>> change later on for 10.1 machine type.
>>>>>>>>> one thing to note, is that turning it on by default might
>>>>>>>>> cause change of NIC naming in guest as this brings in
>>>>>>>>> new "_Sxx" slot naming. /so configs tied to nic go down the
>>>>>>>>> drain/
>>>>>>>>>
>>>>>>>>> Naming, we have, also happens to be broken wrt spec
>>>>>>>>> (it should be unique system wide, there was a gitlab issue for
>>>>>>>>> that,
>>>>>>>>> there is no easy fix that though)
>>>>>>>>>
>>>>>>>>> So I'd leave it disabled by default and let users to turn
>>>>>>>>> it on explicitly when needed.
>>>>>>>> what is the status on q35, isn't it enabled by default? If so why
>>>>>>>> wouldn't we want the same setting on ARM? Is that because of the
>>>>>>>> known
>>>>>>>> issue you report above?
>>>>>>> Above issue is not a blocker (for thae lack of a good way to fix it)
>>>>>>>
>>>>>>> on q35 we have had a few complains and fixes, after pcihp was
>>>>>>> promoted
>>>>>>> to default (so hopefully that won't happen on with ARM). Also given
>>>>>>> that ARM VM is less popular like hood breaking someone setup is
>>>>>>> even less.
>>>>>>>
>>>>>>> That said I'd be cautions keep native hotplug as default,
>>>>>>> and only ones who need ACPI one, could turn it on explicitly.
>>>>>>>
>>>>>>> But well it's policies, so it's up to you ARM folks to decide what
>>>>>>> virt board should look like.
>>>>>> What is your preference? Do you prefer enabling ACPI PCI HP by
>>>>>> default
>>>>>> or the opposite.
>>>>> I'd prefer native PCIe hotplug being default,
>>>>> that way we have less chance of causing regressions not to mention
>>>>> less complexity (as acpi pcihp adds up quite a bit of it).
>>>>>
>>>>> And ones who want/need acpi-pcihp/acpi-index can enable it explicitly,
>>>>> to play with.
>>>>
>>>> OK I will follow your suggestion. You have definitively more expertise
>>>> than me here ! ;-)
>>>
>>> So far what I suggest looks like better option compared to multiple
>>> machine knobs
>>> fiddling. But I can easily change my mind once I see respin, if
>>> experiment
>>> with compat props is not coming well together.
>>
>> For now, I think it's okay to let ACPI PCI hotplug stabilize (while
>> not being the
>> default) for at least one release cycle. So I'm fine with keeping
>> acpi-pcihp=off as
>> the default.
>>
>> As I mentioned elsewhere, I don't consider native PCIe hotplug to be
>> legacy.
>>
>> We can make acpi-pcihp=on the default in a future release once it's
>> been more
>> widely exercised.
>>
>> I'll update the bios-tables-test.c test accordingly, then you can
>> either put them
>> in the v3 (if you happen to send v3 next week) or add them to a v4.
>
> OK thank you for the confirmation. So following Igor's suggestion I
> indeed kept the current default value (legacy PCIe hotplug) and I don't
_native_ PCIe hotplug? :)
> use a machine option anymore. Instead I use the x86 trick, ie.
>
> -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on
hm but why you don't keep the machine option "acpi-pcihp" and just don't
set it as "on" by default? I find global options like that a tad difficult
to follow, feels indeed like a trick. Also, I don't like much not
mentioning GPEX in the option name (and only the event notification device, "ged).
Am I missing something why a global would work better than a machine option
when the default is the native PCIe hotplug?
> I can easily update your tests with that option, don't bother
> respinning. I should be able to send the v3 by beginning of next week.
Got it! Thanks.
Cheers,
Gustavo
> Thanks!
>
> Eric
>
>>
>>
>> Cheers,
>> Gustavo
>>
>>>> Thanks!
>>>>
>>>> Eric
>>>>>
>>>>>> Anybody else?
>>>>>>
>>>>>> On my end I think I would prefer to have the same default setting
>>>>>> than
>>>>>> on x86 (ie. ACPI PCI hotplug set by default) but I have no strong
>>>>>> opinion either.
>>>>>>
>>>>>> Thanks
>>>>>>
>>>>>> Eric
>>>>>>>
>>>>>>>> The no_foo compat stuff was especially introduced to avoid
>>>>>>>> breaking the
>>>>>>>> guest ABI for old machine types (like the NIC naming alternation
>>>>>>>> you evoke).
>>>>>>> no_foo is just another way to handle compat stuff,
>>>>>>> and when it's more than one knob per feature it gets ugly really
>>>>>>> fast.
>>>>>>> Hence, I'd prefer pcihp done in x86 way aka:
>>>>>>> hw_compat_OLD(ged.use_acpi_hotplug_bridge, false|true)
>>>>>>> to manage presence of ACPI hotplug on desired machine version.
>>>>>>> Side benefit it's consistent with how pcihp works on x86
>>>>>>>
>>>>>>>>>
>>>>>>>>>> We also introduce properties to allow disabling it.
>>>>>>>>>>
>>>>>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>>>>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>>>>>> ---
>>>>>>>>>> include/hw/arm/virt.h | 2 ++
>>>>>>>>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
>>>>>>>>>> 2 files changed, 29 insertions(+)
>>>>>>>>>>
>>>>>>>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>>>>>>>>> index 9a1b0f53d2..10ea581f06 100644
>>>>>>>>>> --- a/include/hw/arm/virt.h
>>>>>>>>>> +++ b/include/hw/arm/virt.h
>>>>>>>>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
>>>>>>>>>> bool no_tcg_lpa2;
>>>>>>>>>> bool no_ns_el2_virt_timer_irq;
>>>>>>>>>> bool no_nested_smmu;
>>>>>>>>>> + bool no_acpi_pcihp;
>>>>>>>>>> };
>>>>>>>>>> struct VirtMachineState {
>>>>>>>>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
>>>>>>>>>> bool mte;
>>>>>>>>>> bool dtb_randomness;
>>>>>>>>>> bool second_ns_uart_present;
>>>>>>>>>> + bool acpi_pcihp;
>>>>>>>>>> OnOffAuto acpi;
>>>>>>>>>> VirtGICType gic_version;
>>>>>>>>>> VirtIOMMUType iommu;
>>>>>>>>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>>>>>>>>>> index 9a6cd085a3..a0deeaf2b3 100644
>>>>>>>>>> --- a/hw/arm/virt.c
>>>>>>>>>> +++ b/hw/arm/virt.c
>>>>>>>>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState
>>>>>>>>>> *machine)
>>>>>>>>>> create_pcie(vms);
>>>>>>>>>> if (has_ged && aarch64 && firmware_loaded &&
>>>>>>>>>> virt_is_acpi_enabled(vms)) {
>>>>>>>>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
>>>>>>>>> I don't particularly like no_foo naming as it makes code harder
>>>>>>>>> to read
>>>>>>>>> and combined with 'duplicated' field in machine state it make
>>>>>>>>> even things worse.
>>>>>>>>> (if I recall right Philippe was cleaning mess similar flags usage
>>>>>>>>> have introduced with ITS)
>>>>>>>>>
>>>>>>>>> instead of adding machine property (both class and state),
>>>>>>>>> I'd suggest adding the only property to GPE device (akin to
>>>>>>>>> what we have in x86 world)
>>>>>>>>> And then one can meddle with defaults using hw_compat_xxx
>>>>>>>> no_foo still is a largely used pattern in arm virt: no_ged,
>>>>>>>> kvm_no_adjvtime, no_kvm_steal_time, no_tcg_lpa2, ../.. There are
>>>>>>>> plenty
>>>>>>>> of them and I am not under the impression this is going to be
>>>>>>>> changed.
>>>>>>>>
>>>>>>>> If you refer to 8d23b1df7212 ("hw/arm/virt: Remove
>>>>>>>> VirtMachineClass::no_its field") I think the no_its was removed
>>>>>>>> because
>>>>>>>> the machine it applied was removed.
>>>>>>>>
>>>>>>>> If I understand correctly you would like the prop to be attached
>>>>>>>> to the
>>>>>>>> GED device. However the GED device is internally created by the
>>>>>>>> virt
>>>>>>>> machine code and not passed through a "-device" CLI option. So
>>>>>>>> how would
>>>>>>>> you pass the option on the cmd line if you don't want it to be
>>>>>>>> set by
>>>>>>>> default per machine type?
>>>>>>>>
>>>>>>>> Thanks
>>>>>>>>
>>>>>>>> Eric
>>>>>>>>>
>>>>>>>>>> vms->acpi_dev = create_acpi_ged(vms);
>>>>>>>>>> } else {
>>>>>>>>>> + vms->acpi_pcihp = false;
>>>>>>>>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>>>>>>>>>> }
>>>>>>>>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj,
>>>>>>>>>> bool value, Error **errp)
>>>>>>>>>> vms->its = value;
>>>>>>>>>> }
>>>>>>>>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
>>>>>>>>>> +{
>>>>>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>>>> +
>>>>>>>>>> + return vms->acpi_pcihp;
>>>>>>>>>> +}
>>>>>>>>>> +
>>>>>>>>>> +static void virt_set_acpi_pcihp(Object *obj, bool value,
>>>>>>>>>> Error **errp)
>>>>>>>>>> +{
>>>>>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>>>> +
>>>>>>>>>> + vms->acpi_pcihp = value;
>>>>>>>>>> +}
>>>>>>>>>> +
>>>>>>>>>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
>>>>>>>>>> {
>>>>>>>>>> VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>>>> @@ -3310,6 +3326,10 @@ static void
>>>>>>>>>> virt_machine_class_init(ObjectClass *oc, const void *data)
>>>>>>>>>> "in ACPI table
>>>>>>>>>> header."
>>>>>>>>>> "The string may be
>>>>>>>>>> up to 8 bytes in size");
>>>>>>>>>> + object_class_property_add_bool(oc, "acpi-pcihp",
>>>>>>>>>> + virt_get_acpi_pcihp,
>>>>>>>>>> virt_set_acpi_pcihp);
>>>>>>>>>> + object_class_property_set_description(oc, "acpi-pcihp",
>>>>>>>>>> + "Force ACPI PCI
>>>>>>>>>> hotplug");
>>>>>>>>>> }
>>>>>>>>>> static void virt_instance_init(Object *obj)
>>>>>>>>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
>>>>>>>>>> vms->tcg_its = true;
>>>>>>>>>> }
>>>>>>>>>> + /* default disallows ACPI PCI hotplug */
>>>>>>>>>> + vms->acpi_pcihp = false;
>>>>>>>>>> +
>>>>>>>>>> /* Default disallows iommu instantiation */
>>>>>>>>>> vms->iommu = VIRT_IOMMU_NONE;
>>>>>>>>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>>>>>>>>>> static void virt_machine_10_0_options(MachineClass *mc)
>>>>>>>>>> {
>>>>>>>>>> + VirtMachineClass *vmc =
>>>>>>>>>> VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
>>>>>>>>>> +
>>>>>>>>>> virt_machine_10_1_options(mc);
>>>>>>>>>> compat_props_add(mc->compat_props, hw_compat_10_0,
>>>>>>>>>> hw_compat_10_0_len);
>>>>>>>>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
>>>>>>>>>> + vmc->no_acpi_pcihp = true;
>>>>>>>>>> }
>>>>>>>>>> DEFINE_VIRT_MACHINE(10, 0)
>>>>>>>>>>
>>>>
>>>
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-13 13:39 ` Gustavo Romero
@ 2025-06-14 8:04 ` Eric Auger
0 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-06-14 8:04 UTC (permalink / raw)
To: Gustavo Romero, Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, anisinha,
mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Gustavo,
On 6/13/25 3:39 PM, Gustavo Romero wrote:
> Hi Eric,
>
> On 6/13/25 02:05, Eric Auger wrote:
>> Hi Gustavo,
>>
>> On 6/13/25 5:01 AM, Gustavo Romero wrote:
>>> Hi Eric,
>>>
>>> On 6/12/25 09:55, Igor Mammedov wrote:
>>>> On Wed, 11 Jun 2025 10:50:04 +0200
>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>
>>>>> Hi Igor,
>>>>> On 6/11/25 10:45 AM, Igor Mammedov wrote:
>>>>>> On Wed, 11 Jun 2025 08:53:28 +0200
>>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>>
>>>>>>> Hi Gustavo, Alex,
>>>>>>>
>>>>>>> On 5/28/25 12:33 PM, Igor Mammedov wrote:
>>>>>>>> On Tue, 27 May 2025 15:54:15 +0200
>>>>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>>>>
>>>>>>>>> Hi Igor,
>>>>>>>>>
>>>>>>>>> On 5/27/25 1:58 PM, Igor Mammedov wrote:
>>>>>>>>>> On Tue, 27 May 2025 09:40:04 +0200
>>>>>>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>>>>>>
>>>>>>>>>>> acpi_pcihp VirtMachineClass state flag will allow
>>>>>>>>>>> to opt in for acpi pci hotplug. This is guarded by a
>>>>>>>>>>> class no_acpi_pcihp flag to manage compats (<= 10.0
>>>>>>>>>>> machine types will not support ACPI PCI hotplug).
>>>>>>>>>> there is no reason to put an effort in force disabling it
>>>>>>>>>> on old machines, as long as code works when explicitly
>>>>>>>>>> enabled property on CLI.
>>>>>>>>>>
>>>>>>>>>> See comment below on how to deal with it
>>>>>>>>>>
>>>>>>>>>>> Machine state acpi_pcihp flag must be set before the creation
>>>>>>>>>>> of the GED device which will use it.
>>>>>>>>>>>
>>>>>>>>>>> Currently the ACPI PCI HP is turned off by default. This will
>>>>>>>>>>> change later on for 10.1 machine type.
>>>>>>>>>> one thing to note, is that turning it on by default might
>>>>>>>>>> cause change of NIC naming in guest as this brings in
>>>>>>>>>> new "_Sxx" slot naming. /so configs tied to nic go down the
>>>>>>>>>> drain/
>>>>>>>>>>
>>>>>>>>>> Naming, we have, also happens to be broken wrt spec
>>>>>>>>>> (it should be unique system wide, there was a gitlab issue for
>>>>>>>>>> that,
>>>>>>>>>> there is no easy fix that though)
>>>>>>>>>>
>>>>>>>>>> So I'd leave it disabled by default and let users to turn
>>>>>>>>>> it on explicitly when needed.
>>>>>>>>> what is the status on q35, isn't it enabled by default? If so why
>>>>>>>>> wouldn't we want the same setting on ARM? Is that because of the
>>>>>>>>> known
>>>>>>>>> issue you report above?
>>>>>>>> Above issue is not a blocker (for thae lack of a good way to
>>>>>>>> fix it)
>>>>>>>>
>>>>>>>> on q35 we have had a few complains and fixes, after pcihp was
>>>>>>>> promoted
>>>>>>>> to default (so hopefully that won't happen on with ARM). Also
>>>>>>>> given
>>>>>>>> that ARM VM is less popular like hood breaking someone setup is
>>>>>>>> even less.
>>>>>>>>
>>>>>>>> That said I'd be cautions keep native hotplug as default,
>>>>>>>> and only ones who need ACPI one, could turn it on explicitly.
>>>>>>>>
>>>>>>>> But well it's policies, so it's up to you ARM folks to decide what
>>>>>>>> virt board should look like.
>>>>>>> What is your preference? Do you prefer enabling ACPI PCI HP by
>>>>>>> default
>>>>>>> or the opposite.
>>>>>> I'd prefer native PCIe hotplug being default,
>>>>>> that way we have less chance of causing regressions not to mention
>>>>>> less complexity (as acpi pcihp adds up quite a bit of it).
>>>>>>
>>>>>> And ones who want/need acpi-pcihp/acpi-index can enable it
>>>>>> explicitly,
>>>>>> to play with.
>>>>>
>>>>> OK I will follow your suggestion. You have definitively more
>>>>> expertise
>>>>> than me here ! ;-)
>>>>
>>>> So far what I suggest looks like better option compared to multiple
>>>> machine knobs
>>>> fiddling. But I can easily change my mind once I see respin, if
>>>> experiment
>>>> with compat props is not coming well together.
>>>
>>> For now, I think it's okay to let ACPI PCI hotplug stabilize (while
>>> not being the
>>> default) for at least one release cycle. So I'm fine with keeping
>>> acpi-pcihp=off as
>>> the default.
>>>
>>> As I mentioned elsewhere, I don't consider native PCIe hotplug to be
>>> legacy.
>>>
>>> We can make acpi-pcihp=on the default in a future release once it's
>>> been more
>>> widely exercised.
>>>
>>> I'll update the bios-tables-test.c test accordingly, then you can
>>> either put them
>>> in the v3 (if you happen to send v3 next week) or add them to a v4.
>>
>> OK thank you for the confirmation. So following Igor's suggestion I
>> indeed kept the current default value (legacy PCIe hotplug) and I don't
>
> _native_ PCIe hotplug? :)
yes!
>
>
>> use a machine option anymore. Instead I use the x86 trick, ie.
>>
>> -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on
>
> hm but why you don't keep the machine option "acpi-pcihp" and just don't
> set it as "on" by default? I find global options like that a tad
> difficult
> to follow, feels indeed like a trick. Also, I don't like much not
> mentioning GPEX in the option name (and only the event notification
> device, "ged).
>
> Am I missing something why a global would work better than a machine
> option
> when the default is the native PCIe hotplug?
I am just following Igor's suggestion at the moment. According to Igor
the benefit is that it looks exactly the same as x86 integration (which
would ease libvirt integration) and it is also reusable with microvm.
Anyway if reviewers are not happy with the end result I will revert ;-)
Thanks
Eric
>
>
>> I can easily update your tests with that option, don't bother
>> respinning. I should be able to send the v3 by beginning of next week.
>
> Got it! Thanks.
>
>
> Cheers,
> Gustavo
>
>> Thanks!
>>
>> Eric
>>
>>>
>>>
>>> Cheers,
>>> Gustavo
>>>
>>>>> Thanks!
>>>>>
>>>>> Eric
>>>>>>
>>>>>>> Anybody else?
>>>>>>>
>>>>>>> On my end I think I would prefer to have the same default setting
>>>>>>> than
>>>>>>> on x86 (ie. ACPI PCI hotplug set by default) but I have no strong
>>>>>>> opinion either.
>>>>>>>
>>>>>>> Thanks
>>>>>>>
>>>>>>> Eric
>>>>>>>>
>>>>>>>>> The no_foo compat stuff was especially introduced to avoid
>>>>>>>>> breaking the
>>>>>>>>> guest ABI for old machine types (like the NIC naming alternation
>>>>>>>>> you evoke).
>>>>>>>> no_foo is just another way to handle compat stuff,
>>>>>>>> and when it's more than one knob per feature it gets ugly really
>>>>>>>> fast.
>>>>>>>> Hence, I'd prefer pcihp done in x86 way aka:
>>>>>>>> hw_compat_OLD(ged.use_acpi_hotplug_bridge, false|true)
>>>>>>>> to manage presence of ACPI hotplug on desired machine version.
>>>>>>>> Side benefit it's consistent with how pcihp works on x86
>>>>>>>>
>>>>>>>>>>
>>>>>>>>>>> We also introduce properties to allow disabling it.
>>>>>>>>>>>
>>>>>>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>>>>>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>>>>>>> ---
>>>>>>>>>>> include/hw/arm/virt.h | 2 ++
>>>>>>>>>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
>>>>>>>>>>> 2 files changed, 29 insertions(+)
>>>>>>>>>>>
>>>>>>>>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>>>>>>>>>> index 9a1b0f53d2..10ea581f06 100644
>>>>>>>>>>> --- a/include/hw/arm/virt.h
>>>>>>>>>>> +++ b/include/hw/arm/virt.h
>>>>>>>>>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
>>>>>>>>>>> bool no_tcg_lpa2;
>>>>>>>>>>> bool no_ns_el2_virt_timer_irq;
>>>>>>>>>>> bool no_nested_smmu;
>>>>>>>>>>> + bool no_acpi_pcihp;
>>>>>>>>>>> };
>>>>>>>>>>> struct VirtMachineState {
>>>>>>>>>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
>>>>>>>>>>> bool mte;
>>>>>>>>>>> bool dtb_randomness;
>>>>>>>>>>> bool second_ns_uart_present;
>>>>>>>>>>> + bool acpi_pcihp;
>>>>>>>>>>> OnOffAuto acpi;
>>>>>>>>>>> VirtGICType gic_version;
>>>>>>>>>>> VirtIOMMUType iommu;
>>>>>>>>>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>>>>>>>>>>> index 9a6cd085a3..a0deeaf2b3 100644
>>>>>>>>>>> --- a/hw/arm/virt.c
>>>>>>>>>>> +++ b/hw/arm/virt.c
>>>>>>>>>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState
>>>>>>>>>>> *machine)
>>>>>>>>>>> create_pcie(vms);
>>>>>>>>>>> if (has_ged && aarch64 && firmware_loaded &&
>>>>>>>>>>> virt_is_acpi_enabled(vms)) {
>>>>>>>>>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
>>>>>>>>>> I don't particularly like no_foo naming as it makes code harder
>>>>>>>>>> to read
>>>>>>>>>> and combined with 'duplicated' field in machine state it make
>>>>>>>>>> even things worse.
>>>>>>>>>> (if I recall right Philippe was cleaning mess similar flags
>>>>>>>>>> usage
>>>>>>>>>> have introduced with ITS)
>>>>>>>>>>
>>>>>>>>>> instead of adding machine property (both class and state),
>>>>>>>>>> I'd suggest adding the only property to GPE device (akin to
>>>>>>>>>> what we have in x86 world)
>>>>>>>>>> And then one can meddle with defaults using hw_compat_xxx
>>>>>>>>> no_foo still is a largely used pattern in arm virt: no_ged,
>>>>>>>>> kvm_no_adjvtime, no_kvm_steal_time, no_tcg_lpa2, ../.. There are
>>>>>>>>> plenty
>>>>>>>>> of them and I am not under the impression this is going to be
>>>>>>>>> changed.
>>>>>>>>>
>>>>>>>>> If you refer to 8d23b1df7212 ("hw/arm/virt: Remove
>>>>>>>>> VirtMachineClass::no_its field") I think the no_its was removed
>>>>>>>>> because
>>>>>>>>> the machine it applied was removed.
>>>>>>>>>
>>>>>>>>> If I understand correctly you would like the prop to be attached
>>>>>>>>> to the
>>>>>>>>> GED device. However the GED device is internally created by the
>>>>>>>>> virt
>>>>>>>>> machine code and not passed through a "-device" CLI option. So
>>>>>>>>> how would
>>>>>>>>> you pass the option on the cmd line if you don't want it to be
>>>>>>>>> set by
>>>>>>>>> default per machine type?
>>>>>>>>>
>>>>>>>>> Thanks
>>>>>>>>>
>>>>>>>>> Eric
>>>>>>>>>>
>>>>>>>>>>> vms->acpi_dev = create_acpi_ged(vms);
>>>>>>>>>>> } else {
>>>>>>>>>>> + vms->acpi_pcihp = false;
>>>>>>>>>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>>>>>>>>>>> }
>>>>>>>>>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj,
>>>>>>>>>>> bool value, Error **errp)
>>>>>>>>>>> vms->its = value;
>>>>>>>>>>> }
>>>>>>>>>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
>>>>>>>>>>> +{
>>>>>>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>>>>> +
>>>>>>>>>>> + return vms->acpi_pcihp;
>>>>>>>>>>> +}
>>>>>>>>>>> +
>>>>>>>>>>> +static void virt_set_acpi_pcihp(Object *obj, bool value,
>>>>>>>>>>> Error **errp)
>>>>>>>>>>> +{
>>>>>>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>>>>> +
>>>>>>>>>>> + vms->acpi_pcihp = value;
>>>>>>>>>>> +}
>>>>>>>>>>> +
>>>>>>>>>>> static bool virt_get_dtb_randomness(Object *obj, Error
>>>>>>>>>>> **errp)
>>>>>>>>>>> {
>>>>>>>>>>> VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>>>>>>> @@ -3310,6 +3326,10 @@ static void
>>>>>>>>>>> virt_machine_class_init(ObjectClass *oc, const void *data)
>>>>>>>>>>> "in ACPI table
>>>>>>>>>>> header."
>>>>>>>>>>> "The string may be
>>>>>>>>>>> up to 8 bytes in size");
>>>>>>>>>>> + object_class_property_add_bool(oc, "acpi-pcihp",
>>>>>>>>>>> + virt_get_acpi_pcihp,
>>>>>>>>>>> virt_set_acpi_pcihp);
>>>>>>>>>>> + object_class_property_set_description(oc, "acpi-pcihp",
>>>>>>>>>>> + "Force ACPI PCI
>>>>>>>>>>> hotplug");
>>>>>>>>>>> }
>>>>>>>>>>> static void virt_instance_init(Object *obj)
>>>>>>>>>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object
>>>>>>>>>>> *obj)
>>>>>>>>>>> vms->tcg_its = true;
>>>>>>>>>>> }
>>>>>>>>>>> + /* default disallows ACPI PCI hotplug */
>>>>>>>>>>> + vms->acpi_pcihp = false;
>>>>>>>>>>> +
>>>>>>>>>>> /* Default disallows iommu instantiation */
>>>>>>>>>>> vms->iommu = VIRT_IOMMU_NONE;
>>>>>>>>>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>>>>>>>>>>> static void virt_machine_10_0_options(MachineClass *mc)
>>>>>>>>>>> {
>>>>>>>>>>> + VirtMachineClass *vmc =
>>>>>>>>>>> VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
>>>>>>>>>>> +
>>>>>>>>>>> virt_machine_10_1_options(mc);
>>>>>>>>>>> compat_props_add(mc->compat_props, hw_compat_10_0,
>>>>>>>>>>> hw_compat_10_0_len);
>>>>>>>>>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
>>>>>>>>>>> + vmc->no_acpi_pcihp = true;
>>>>>>>>>>> }
>>>>>>>>>>> DEFINE_VIRT_MACHINE(10, 0)
>>>>>>>>>>>
>>>>>
>>>>
>>>
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-05-27 11:58 ` Igor Mammedov
2025-05-27 13:54 ` Eric Auger
@ 2025-06-11 6:47 ` Eric Auger
2025-06-11 8:49 ` Igor Mammedov
1 sibling, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-06-11 6:47 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
Hi Igor,
On 5/27/25 1:58 PM, Igor Mammedov wrote:
> On Tue, 27 May 2025 09:40:04 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> acpi_pcihp VirtMachineClass state flag will allow
>> to opt in for acpi pci hotplug. This is guarded by a
>> class no_acpi_pcihp flag to manage compats (<= 10.0
>> machine types will not support ACPI PCI hotplug).
> there is no reason to put an effort in force disabling it
> on old machines, as long as code works when explicitly
> enabled property on CLI.
>
> See comment below on how to deal with it
>
>> Machine state acpi_pcihp flag must be set before the creation
>> of the GED device which will use it.
>>
>> Currently the ACPI PCI HP is turned off by default. This will
>> change later on for 10.1 machine type.
> one thing to note, is that turning it on by default might
> cause change of NIC naming in guest as this brings in
> new "_Sxx" slot naming. /so configs tied to nic go down the drain/
>
> Naming, we have, also happens to be broken wrt spec
> (it should be unique system wide, there was a gitlab issue for that,
> there is no easy fix that though)
>
> So I'd leave it disabled by default and let users to turn
> it on explicitly when needed.
>
>> We also introduce properties to allow disabling it.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>> ---
>> include/hw/arm/virt.h | 2 ++
>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
>> 2 files changed, 29 insertions(+)
>>
>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>> index 9a1b0f53d2..10ea581f06 100644
>> --- a/include/hw/arm/virt.h
>> +++ b/include/hw/arm/virt.h
>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
>> bool no_tcg_lpa2;
>> bool no_ns_el2_virt_timer_irq;
>> bool no_nested_smmu;
>> + bool no_acpi_pcihp;
>> };
>>
>> struct VirtMachineState {
>> @@ -150,6 +151,7 @@ struct VirtMachineState {
>> bool mte;
>> bool dtb_randomness;
>> bool second_ns_uart_present;
>> + bool acpi_pcihp;
>> OnOffAuto acpi;
>> VirtGICType gic_version;
>> VirtIOMMUType iommu;
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 9a6cd085a3..a0deeaf2b3 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
>> create_pcie(vms);
>>
>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
> I don't particularly like no_foo naming as it makes code harder to read
> and combined with 'duplicated' field in machine state it make even things worse.
> (if I recall right Philippe was cleaning mess similar flags usage
> have introduced with ITS)
>
> instead of adding machine property (both class and state),
> I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
> And then one can meddle with defaults using hw_compat_xxx
What I fail to understand is whether you want me to attach this property
to the GPEX host bridge device or to the GED device. Comment on patch
6/25 seems to indicate you expect it to be attached to the GPEX. I ask
here because also the GED device will need to be configured depending on
the hp setting. Maybe we can retrieve the info from the gpex at that
time. on x86 it is attached to piix4 or ich9 I/O controller hub which do
not have direct equivalent on ARM.
Thanks
Eric
>
>
>> vms->acpi_dev = create_acpi_ged(vms);
>> } else {
>> + vms->acpi_pcihp = false;
>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>> }
>>
>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
>> vms->its = value;
>> }
>>
>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
>> +{
>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>> +
>> + return vms->acpi_pcihp;
>> +}
>> +
>> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
>> +{
>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>> +
>> + vms->acpi_pcihp = value;
>> +}
>> +
>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
>> {
>> VirtMachineState *vms = VIRT_MACHINE(obj);
>> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
>> "in ACPI table header."
>> "The string may be up to 8 bytes in size");
>>
>> + object_class_property_add_bool(oc, "acpi-pcihp",
>> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
>> + object_class_property_set_description(oc, "acpi-pcihp",
>> + "Force ACPI PCI hotplug");
>> }
>>
>> static void virt_instance_init(Object *obj)
>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
>> vms->tcg_its = true;
>> }
>>
>> + /* default disallows ACPI PCI hotplug */
>> + vms->acpi_pcihp = false;
>> +
>> /* Default disallows iommu instantiation */
>> vms->iommu = VIRT_IOMMU_NONE;
>>
>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>>
>> static void virt_machine_10_0_options(MachineClass *mc)
>> {
>> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
>> +
>> virt_machine_10_1_options(mc);
>> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
>> + vmc->no_acpi_pcihp = true;
>> }
>> DEFINE_VIRT_MACHINE(10, 0)
>>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-11 6:47 ` Eric Auger
@ 2025-06-11 8:49 ` Igor Mammedov
2025-06-11 8:56 ` Eric Auger
0 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-06-11 8:49 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Wed, 11 Jun 2025 08:47:36 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Hi Igor,
>
> On 5/27/25 1:58 PM, Igor Mammedov wrote:
> > On Tue, 27 May 2025 09:40:04 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> >> acpi_pcihp VirtMachineClass state flag will allow
> >> to opt in for acpi pci hotplug. This is guarded by a
> >> class no_acpi_pcihp flag to manage compats (<= 10.0
> >> machine types will not support ACPI PCI hotplug).
> > there is no reason to put an effort in force disabling it
> > on old machines, as long as code works when explicitly
> > enabled property on CLI.
> >
> > See comment below on how to deal with it
> >
> >> Machine state acpi_pcihp flag must be set before the creation
> >> of the GED device which will use it.
> >>
> >> Currently the ACPI PCI HP is turned off by default. This will
> >> change later on for 10.1 machine type.
> > one thing to note, is that turning it on by default might
> > cause change of NIC naming in guest as this brings in
> > new "_Sxx" slot naming. /so configs tied to nic go down the drain/
> >
> > Naming, we have, also happens to be broken wrt spec
> > (it should be unique system wide, there was a gitlab issue for that,
> > there is no easy fix that though)
> >
> > So I'd leave it disabled by default and let users to turn
> > it on explicitly when needed.
> >
> >> We also introduce properties to allow disabling it.
> >>
> >> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> >> ---
> >> include/hw/arm/virt.h | 2 ++
> >> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
> >> 2 files changed, 29 insertions(+)
> >>
> >> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> >> index 9a1b0f53d2..10ea581f06 100644
> >> --- a/include/hw/arm/virt.h
> >> +++ b/include/hw/arm/virt.h
> >> @@ -129,6 +129,7 @@ struct VirtMachineClass {
> >> bool no_tcg_lpa2;
> >> bool no_ns_el2_virt_timer_irq;
> >> bool no_nested_smmu;
> >> + bool no_acpi_pcihp;
> >> };
> >>
> >> struct VirtMachineState {
> >> @@ -150,6 +151,7 @@ struct VirtMachineState {
> >> bool mte;
> >> bool dtb_randomness;
> >> bool second_ns_uart_present;
> >> + bool acpi_pcihp;
> >> OnOffAuto acpi;
> >> VirtGICType gic_version;
> >> VirtIOMMUType iommu;
> >> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> >> index 9a6cd085a3..a0deeaf2b3 100644
> >> --- a/hw/arm/virt.c
> >> +++ b/hw/arm/virt.c
> >> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
> >> create_pcie(vms);
> >>
> >> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
> >> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
> > I don't particularly like no_foo naming as it makes code harder to read
> > and combined with 'duplicated' field in machine state it make even things worse.
> > (if I recall right Philippe was cleaning mess similar flags usage
> > have introduced with ITS)
> >
> > instead of adding machine property (both class and state),
> > I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
> > And then one can meddle with defaults using hw_compat_xxx
> What I fail to understand is whether you want me to attach this property
> to the GPEX host bridge device or to the GED device. Comment on patch
I'd say GED.
> 6/25 seems to indicate you expect it to be attached to the GPEX. I ask
> here because also the GED device will need to be configured depending on
> the hp setting. Maybe we can retrieve the info from the gpex at that
> time. on x86 it is attached to piix4 or ich9 I/O controller hub which do
> not have direct equivalent on ARM.
for ARM, equivalent would be GED device which hosts our paravirt acpi registers.
>
> Thanks
>
> Eric
> >
> >
> >> vms->acpi_dev = create_acpi_ged(vms);
> >> } else {
> >> + vms->acpi_pcihp = false;
> >> create_gpio_devices(vms, VIRT_GPIO, sysmem);
> >> }
> >>
> >> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
> >> vms->its = value;
> >> }
> >>
> >> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
> >> +{
> >> + VirtMachineState *vms = VIRT_MACHINE(obj);
> >> +
> >> + return vms->acpi_pcihp;
> >> +}
> >> +
> >> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
> >> +{
> >> + VirtMachineState *vms = VIRT_MACHINE(obj);
> >> +
> >> + vms->acpi_pcihp = value;
> >> +}
> >> +
> >> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
> >> {
> >> VirtMachineState *vms = VIRT_MACHINE(obj);
> >> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
> >> "in ACPI table header."
> >> "The string may be up to 8 bytes in size");
> >>
> >> + object_class_property_add_bool(oc, "acpi-pcihp",
> >> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
> >> + object_class_property_set_description(oc, "acpi-pcihp",
> >> + "Force ACPI PCI hotplug");
> >> }
> >>
> >> static void virt_instance_init(Object *obj)
> >> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
> >> vms->tcg_its = true;
> >> }
> >>
> >> + /* default disallows ACPI PCI hotplug */
> >> + vms->acpi_pcihp = false;
> >> +
> >> /* Default disallows iommu instantiation */
> >> vms->iommu = VIRT_IOMMU_NONE;
> >>
> >> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
> >>
> >> static void virt_machine_10_0_options(MachineClass *mc)
> >> {
> >> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
> >> +
> >> virt_machine_10_1_options(mc);
> >> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
> >> + /* 10.0 and earlier do not support ACPI PCI hotplug */
> >> + vmc->no_acpi_pcihp = true;
> >> }
> >> DEFINE_VIRT_MACHINE(10, 0)
> >>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-11 8:49 ` Igor Mammedov
@ 2025-06-11 8:56 ` Eric Auger
2025-06-12 13:00 ` Igor Mammedov
0 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-06-11 8:56 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On 6/11/25 10:49 AM, Igor Mammedov wrote:
> On Wed, 11 Jun 2025 08:47:36 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Hi Igor,
>>
>> On 5/27/25 1:58 PM, Igor Mammedov wrote:
>>> On Tue, 27 May 2025 09:40:04 +0200
>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>>> acpi_pcihp VirtMachineClass state flag will allow
>>>> to opt in for acpi pci hotplug. This is guarded by a
>>>> class no_acpi_pcihp flag to manage compats (<= 10.0
>>>> machine types will not support ACPI PCI hotplug).
>>> there is no reason to put an effort in force disabling it
>>> on old machines, as long as code works when explicitly
>>> enabled property on CLI.
>>>
>>> See comment below on how to deal with it
>>>
>>>> Machine state acpi_pcihp flag must be set before the creation
>>>> of the GED device which will use it.
>>>>
>>>> Currently the ACPI PCI HP is turned off by default. This will
>>>> change later on for 10.1 machine type.
>>> one thing to note, is that turning it on by default might
>>> cause change of NIC naming in guest as this brings in
>>> new "_Sxx" slot naming. /so configs tied to nic go down the drain/
>>>
>>> Naming, we have, also happens to be broken wrt spec
>>> (it should be unique system wide, there was a gitlab issue for that,
>>> there is no easy fix that though)
>>>
>>> So I'd leave it disabled by default and let users to turn
>>> it on explicitly when needed.
>>>
>>>> We also introduce properties to allow disabling it.
>>>>
>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>> ---
>>>> include/hw/arm/virt.h | 2 ++
>>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
>>>> 2 files changed, 29 insertions(+)
>>>>
>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>>> index 9a1b0f53d2..10ea581f06 100644
>>>> --- a/include/hw/arm/virt.h
>>>> +++ b/include/hw/arm/virt.h
>>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
>>>> bool no_tcg_lpa2;
>>>> bool no_ns_el2_virt_timer_irq;
>>>> bool no_nested_smmu;
>>>> + bool no_acpi_pcihp;
>>>> };
>>>>
>>>> struct VirtMachineState {
>>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
>>>> bool mte;
>>>> bool dtb_randomness;
>>>> bool second_ns_uart_present;
>>>> + bool acpi_pcihp;
>>>> OnOffAuto acpi;
>>>> VirtGICType gic_version;
>>>> VirtIOMMUType iommu;
>>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>>>> index 9a6cd085a3..a0deeaf2b3 100644
>>>> --- a/hw/arm/virt.c
>>>> +++ b/hw/arm/virt.c
>>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
>>>> create_pcie(vms);
>>>>
>>>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
>>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
>>> I don't particularly like no_foo naming as it makes code harder to read
>>> and combined with 'duplicated' field in machine state it make even things worse.
>>> (if I recall right Philippe was cleaning mess similar flags usage
>>> have introduced with ITS)
>>>
>>> instead of adding machine property (both class and state),
>>> I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
>>> And then one can meddle with defaults using hw_compat_xxx
>> What I fail to understand is whether you want me to attach this property
>> to the GPEX host bridge device or to the GED device. Comment on patch
> I'd say GED.
>
>> 6/25 seems to indicate you expect it to be attached to the GPEX. I ask
>> here because also the GED device will need to be configured depending on
>> the hp setting. Maybe we can retrieve the info from the gpex at that
>> time. on x86 it is attached to piix4 or ich9 I/O controller hub which do
>> not have direct equivalent on ARM.
> for ARM, equivalent would be GED device which hosts our paravirt acpi registers.
OK thank you for the clarification. I will add a property to the GED device.
As the GED device is directly instantiated by the virt machine code (not
exposed to the end user CLI) I guess we still want a virt machine option
that would allow to set the property explicitly from CLI?
Thanks
Eric
>
>> Thanks
>>
>> Eric
>>>
>>>> vms->acpi_dev = create_acpi_ged(vms);
>>>> } else {
>>>> + vms->acpi_pcihp = false;
>>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>>>> }
>>>>
>>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
>>>> vms->its = value;
>>>> }
>>>>
>>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
>>>> +{
>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>> +
>>>> + return vms->acpi_pcihp;
>>>> +}
>>>> +
>>>> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
>>>> +{
>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>> +
>>>> + vms->acpi_pcihp = value;
>>>> +}
>>>> +
>>>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
>>>> {
>>>> VirtMachineState *vms = VIRT_MACHINE(obj);
>>>> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
>>>> "in ACPI table header."
>>>> "The string may be up to 8 bytes in size");
>>>>
>>>> + object_class_property_add_bool(oc, "acpi-pcihp",
>>>> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
>>>> + object_class_property_set_description(oc, "acpi-pcihp",
>>>> + "Force ACPI PCI hotplug");
>>>> }
>>>>
>>>> static void virt_instance_init(Object *obj)
>>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
>>>> vms->tcg_its = true;
>>>> }
>>>>
>>>> + /* default disallows ACPI PCI hotplug */
>>>> + vms->acpi_pcihp = false;
>>>> +
>>>> /* Default disallows iommu instantiation */
>>>> vms->iommu = VIRT_IOMMU_NONE;
>>>>
>>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>>>>
>>>> static void virt_machine_10_0_options(MachineClass *mc)
>>>> {
>>>> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
>>>> +
>>>> virt_machine_10_1_options(mc);
>>>> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
>>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
>>>> + vmc->no_acpi_pcihp = true;
>>>> }
>>>> DEFINE_VIRT_MACHINE(10, 0)
>>>>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-11 8:56 ` Eric Auger
@ 2025-06-12 13:00 ` Igor Mammedov
2025-06-12 13:54 ` Eric Auger
0 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-06-12 13:00 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Wed, 11 Jun 2025 10:56:36 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> On 6/11/25 10:49 AM, Igor Mammedov wrote:
> > On Wed, 11 Jun 2025 08:47:36 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> >> Hi Igor,
> >>
> >> On 5/27/25 1:58 PM, Igor Mammedov wrote:
> >>> On Tue, 27 May 2025 09:40:04 +0200
> >>> Eric Auger <eric.auger@redhat.com> wrote:
> >>>
> >>>> acpi_pcihp VirtMachineClass state flag will allow
> >>>> to opt in for acpi pci hotplug. This is guarded by a
> >>>> class no_acpi_pcihp flag to manage compats (<= 10.0
> >>>> machine types will not support ACPI PCI hotplug).
> >>> there is no reason to put an effort in force disabling it
> >>> on old machines, as long as code works when explicitly
> >>> enabled property on CLI.
> >>>
> >>> See comment below on how to deal with it
> >>>
> >>>> Machine state acpi_pcihp flag must be set before the creation
> >>>> of the GED device which will use it.
> >>>>
> >>>> Currently the ACPI PCI HP is turned off by default. This will
> >>>> change later on for 10.1 machine type.
> >>> one thing to note, is that turning it on by default might
> >>> cause change of NIC naming in guest as this brings in
> >>> new "_Sxx" slot naming. /so configs tied to nic go down the drain/
> >>>
> >>> Naming, we have, also happens to be broken wrt spec
> >>> (it should be unique system wide, there was a gitlab issue for that,
> >>> there is no easy fix that though)
> >>>
> >>> So I'd leave it disabled by default and let users to turn
> >>> it on explicitly when needed.
> >>>
> >>>> We also introduce properties to allow disabling it.
> >>>>
> >>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> >>>> ---
> >>>> include/hw/arm/virt.h | 2 ++
> >>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
> >>>> 2 files changed, 29 insertions(+)
> >>>>
> >>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> >>>> index 9a1b0f53d2..10ea581f06 100644
> >>>> --- a/include/hw/arm/virt.h
> >>>> +++ b/include/hw/arm/virt.h
> >>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
> >>>> bool no_tcg_lpa2;
> >>>> bool no_ns_el2_virt_timer_irq;
> >>>> bool no_nested_smmu;
> >>>> + bool no_acpi_pcihp;
> >>>> };
> >>>>
> >>>> struct VirtMachineState {
> >>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
> >>>> bool mte;
> >>>> bool dtb_randomness;
> >>>> bool second_ns_uart_present;
> >>>> + bool acpi_pcihp;
> >>>> OnOffAuto acpi;
> >>>> VirtGICType gic_version;
> >>>> VirtIOMMUType iommu;
> >>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> >>>> index 9a6cd085a3..a0deeaf2b3 100644
> >>>> --- a/hw/arm/virt.c
> >>>> +++ b/hw/arm/virt.c
> >>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
> >>>> create_pcie(vms);
> >>>>
> >>>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
> >>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
> >>> I don't particularly like no_foo naming as it makes code harder to read
> >>> and combined with 'duplicated' field in machine state it make even things worse.
> >>> (if I recall right Philippe was cleaning mess similar flags usage
> >>> have introduced with ITS)
> >>>
> >>> instead of adding machine property (both class and state),
> >>> I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
> >>> And then one can meddle with defaults using hw_compat_xxx
> >> What I fail to understand is whether you want me to attach this property
> >> to the GPEX host bridge device or to the GED device. Comment on patch
> > I'd say GED.
> >
> >> 6/25 seems to indicate you expect it to be attached to the GPEX. I ask
> >> here because also the GED device will need to be configured depending on
> >> the hp setting. Maybe we can retrieve the info from the gpex at that
> >> time. on x86 it is attached to piix4 or ich9 I/O controller hub which do
> >> not have direct equivalent on ARM.
> > for ARM, equivalent would be GED device which hosts our paravirt acpi registers.
>
> OK thank you for the clarification. I will add a property to the GED device.
>
> As the GED device is directly instantiated by the virt machine code (not
> exposed to the end user CLI) I guess we still want a virt machine option
> that would allow to set the property explicitly from CLI?
Instead of machine option,
I'd go pc/q35 way (aka -global ged.acpi-pci-hotplug-with-bridges=on/off).
it's not as pretty as machine specific option but that would work just as well
and as bonus could be used for microvm in the same form.
>
> Thanks
>
> Eric
> >
> >> Thanks
> >>
> >> Eric
> >>>
> >>>> vms->acpi_dev = create_acpi_ged(vms);
> >>>> } else {
> >>>> + vms->acpi_pcihp = false;
> >>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
> >>>> }
> >>>>
> >>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
> >>>> vms->its = value;
> >>>> }
> >>>>
> >>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
> >>>> +{
> >>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
> >>>> +
> >>>> + return vms->acpi_pcihp;
> >>>> +}
> >>>> +
> >>>> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
> >>>> +{
> >>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
> >>>> +
> >>>> + vms->acpi_pcihp = value;
> >>>> +}
> >>>> +
> >>>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
> >>>> {
> >>>> VirtMachineState *vms = VIRT_MACHINE(obj);
> >>>> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
> >>>> "in ACPI table header."
> >>>> "The string may be up to 8 bytes in size");
> >>>>
> >>>> + object_class_property_add_bool(oc, "acpi-pcihp",
> >>>> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
> >>>> + object_class_property_set_description(oc, "acpi-pcihp",
> >>>> + "Force ACPI PCI hotplug");
> >>>> }
> >>>>
> >>>> static void virt_instance_init(Object *obj)
> >>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
> >>>> vms->tcg_its = true;
> >>>> }
> >>>>
> >>>> + /* default disallows ACPI PCI hotplug */
> >>>> + vms->acpi_pcihp = false;
> >>>> +
> >>>> /* Default disallows iommu instantiation */
> >>>> vms->iommu = VIRT_IOMMU_NONE;
> >>>>
> >>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
> >>>>
> >>>> static void virt_machine_10_0_options(MachineClass *mc)
> >>>> {
> >>>> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
> >>>> +
> >>>> virt_machine_10_1_options(mc);
> >>>> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
> >>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
> >>>> + vmc->no_acpi_pcihp = true;
> >>>> }
> >>>> DEFINE_VIRT_MACHINE(10, 0)
> >>>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-06-12 13:00 ` Igor Mammedov
@ 2025-06-12 13:54 ` Eric Auger
0 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-06-12 13:54 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
Hi Igor,
On 6/12/25 3:00 PM, Igor Mammedov wrote:
> On Wed, 11 Jun 2025 10:56:36 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> On 6/11/25 10:49 AM, Igor Mammedov wrote:
>>> On Wed, 11 Jun 2025 08:47:36 +0200
>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>>> Hi Igor,
>>>>
>>>> On 5/27/25 1:58 PM, Igor Mammedov wrote:
>>>>> On Tue, 27 May 2025 09:40:04 +0200
>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>
>>>>>> acpi_pcihp VirtMachineClass state flag will allow
>>>>>> to opt in for acpi pci hotplug. This is guarded by a
>>>>>> class no_acpi_pcihp flag to manage compats (<= 10.0
>>>>>> machine types will not support ACPI PCI hotplug).
>>>>> there is no reason to put an effort in force disabling it
>>>>> on old machines, as long as code works when explicitly
>>>>> enabled property on CLI.
>>>>>
>>>>> See comment below on how to deal with it
>>>>>
>>>>>> Machine state acpi_pcihp flag must be set before the creation
>>>>>> of the GED device which will use it.
>>>>>>
>>>>>> Currently the ACPI PCI HP is turned off by default. This will
>>>>>> change later on for 10.1 machine type.
>>>>> one thing to note, is that turning it on by default might
>>>>> cause change of NIC naming in guest as this brings in
>>>>> new "_Sxx" slot naming. /so configs tied to nic go down the drain/
>>>>>
>>>>> Naming, we have, also happens to be broken wrt spec
>>>>> (it should be unique system wide, there was a gitlab issue for that,
>>>>> there is no easy fix that though)
>>>>>
>>>>> So I'd leave it disabled by default and let users to turn
>>>>> it on explicitly when needed.
>>>>>
>>>>>> We also introduce properties to allow disabling it.
>>>>>>
>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>> ---
>>>>>> include/hw/arm/virt.h | 2 ++
>>>>>> hw/arm/virt.c | 27 +++++++++++++++++++++++++++
>>>>>> 2 files changed, 29 insertions(+)
>>>>>>
>>>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>>>>> index 9a1b0f53d2..10ea581f06 100644
>>>>>> --- a/include/hw/arm/virt.h
>>>>>> +++ b/include/hw/arm/virt.h
>>>>>> @@ -129,6 +129,7 @@ struct VirtMachineClass {
>>>>>> bool no_tcg_lpa2;
>>>>>> bool no_ns_el2_virt_timer_irq;
>>>>>> bool no_nested_smmu;
>>>>>> + bool no_acpi_pcihp;
>>>>>> };
>>>>>>
>>>>>> struct VirtMachineState {
>>>>>> @@ -150,6 +151,7 @@ struct VirtMachineState {
>>>>>> bool mte;
>>>>>> bool dtb_randomness;
>>>>>> bool second_ns_uart_present;
>>>>>> + bool acpi_pcihp;
>>>>>> OnOffAuto acpi;
>>>>>> VirtGICType gic_version;
>>>>>> VirtIOMMUType iommu;
>>>>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>>>>>> index 9a6cd085a3..a0deeaf2b3 100644
>>>>>> --- a/hw/arm/virt.c
>>>>>> +++ b/hw/arm/virt.c
>>>>>> @@ -2397,8 +2397,10 @@ static void machvirt_init(MachineState *machine)
>>>>>> create_pcie(vms);
>>>>>>
>>>>>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
>>>>>> + vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
>>>>> I don't particularly like no_foo naming as it makes code harder to read
>>>>> and combined with 'duplicated' field in machine state it make even things worse.
>>>>> (if I recall right Philippe was cleaning mess similar flags usage
>>>>> have introduced with ITS)
>>>>>
>>>>> instead of adding machine property (both class and state),
>>>>> I'd suggest adding the only property to GPE device (akin to what we have in x86 world)
>>>>> And then one can meddle with defaults using hw_compat_xxx
>>>> What I fail to understand is whether you want me to attach this property
>>>> to the GPEX host bridge device or to the GED device. Comment on patch
>>> I'd say GED.
>>>
>>>> 6/25 seems to indicate you expect it to be attached to the GPEX. I ask
>>>> here because also the GED device will need to be configured depending on
>>>> the hp setting. Maybe we can retrieve the info from the gpex at that
>>>> time. on x86 it is attached to piix4 or ich9 I/O controller hub which do
>>>> not have direct equivalent on ARM.
>>> for ARM, equivalent would be GED device which hosts our paravirt acpi registers.
>> OK thank you for the clarification. I will add a property to the GED device.
>>
>> As the GED device is directly instantiated by the virt machine code (not
>> exposed to the end user CLI) I guess we still want a virt machine option
>> that would allow to set the property explicitly from CLI?
> Instead of machine option,
> I'd go pc/q35 way (aka -global ged.acpi-pci-hotplug-with-bridges=on/off).
> it's not as pretty as machine specific option but that would work just as well
> and as bonus could be used for microvm in the same form.
Ah OK. Then I need to rework it.
Thanks!
Eric
>
>> Thanks
>>
>> Eric
>>>
>>>> Thanks
>>>>
>>>> Eric
>>>>>
>>>>>> vms->acpi_dev = create_acpi_ged(vms);
>>>>>> } else {
>>>>>> + vms->acpi_pcihp = false;
>>>>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>>>>>> }
>>>>>>
>>>>>> @@ -2593,6 +2595,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp)
>>>>>> vms->its = value;
>>>>>> }
>>>>>>
>>>>>> +static bool virt_get_acpi_pcihp(Object *obj, Error **errp)
>>>>>> +{
>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>> +
>>>>>> + return vms->acpi_pcihp;
>>>>>> +}
>>>>>> +
>>>>>> +static void virt_set_acpi_pcihp(Object *obj, bool value, Error **errp)
>>>>>> +{
>>>>>> + VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>> +
>>>>>> + vms->acpi_pcihp = value;
>>>>>> +}
>>>>>> +
>>>>>> static bool virt_get_dtb_randomness(Object *obj, Error **errp)
>>>>>> {
>>>>>> VirtMachineState *vms = VIRT_MACHINE(obj);
>>>>>> @@ -3310,6 +3326,10 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
>>>>>> "in ACPI table header."
>>>>>> "The string may be up to 8 bytes in size");
>>>>>>
>>>>>> + object_class_property_add_bool(oc, "acpi-pcihp",
>>>>>> + virt_get_acpi_pcihp, virt_set_acpi_pcihp);
>>>>>> + object_class_property_set_description(oc, "acpi-pcihp",
>>>>>> + "Force ACPI PCI hotplug");
>>>>>> }
>>>>>>
>>>>>> static void virt_instance_init(Object *obj)
>>>>>> @@ -3344,6 +3364,9 @@ static void virt_instance_init(Object *obj)
>>>>>> vms->tcg_its = true;
>>>>>> }
>>>>>>
>>>>>> + /* default disallows ACPI PCI hotplug */
>>>>>> + vms->acpi_pcihp = false;
>>>>>> +
>>>>>> /* Default disallows iommu instantiation */
>>>>>> vms->iommu = VIRT_IOMMU_NONE;
>>>>>>
>>>>>> @@ -3394,8 +3417,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
>>>>>>
>>>>>> static void virt_machine_10_0_options(MachineClass *mc)
>>>>>> {
>>>>>> + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
>>>>>> +
>>>>>> virt_machine_10_1_options(mc);
>>>>>> compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
>>>>>> + /* 10.0 and earlier do not support ACPI PCI hotplug */
>>>>>> + vmc->no_acpi_pcihp = true;
>>>>>> }
>>>>>> DEFINE_VIRT_MACHINE(10, 0)
>>>>>>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
2025-05-27 7:40 ` [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props Eric Auger
@ 2025-05-30 8:58 ` Jonathan Cameron via
2025-05-30 8:58 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 8:58 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:04 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> acpi_pcihp VirtMachineClass state flag will allow
> to opt in for acpi pci hotplug. This is guarded by a
> class no_acpi_pcihp flag to manage compats (<= 10.0
> machine types will not support ACPI PCI hotplug).
>
> Machine state acpi_pcihp flag must be set before the creation
> of the GED device which will use it.
>
> Currently the ACPI PCI HP is turned off by default. This will
> change later on for 10.1 machine type.
>
> We also introduce properties to allow disabling it.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Seems fine though I'm not sure on the default for 10.1
I don't feel that strongly about it though.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props
@ 2025-05-30 8:58 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 8:58 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:04 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> acpi_pcihp VirtMachineClass state flag will allow
> to opt in for acpi pci hotplug. This is guarded by a
> class no_acpi_pcihp flag to manage compats (<= 10.0
> machine types will not support ACPI PCI hotplug).
>
> Machine state acpi_pcihp flag must be set before the creation
> of the GED device which will use it.
>
> Currently the ACPI PCI HP is turned off by default. This will
> change later on for 10.1 machine type.
>
> We also introduce properties to allow disabling it.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Seems fine though I'm not sure on the default for 10.1
I don't feel that strongly about it though.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 03/25] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
2025-05-27 7:40 ` [PATCH v2 01/25] hw/i386/acpi-build: Make aml_pci_device_dsm() static Eric Auger
2025-05-27 7:40 ` [PATCH v2 02/25] hw/arm/virt: Introduce machine state acpi pcihp flags and props Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 12:08 ` Igor Mammedov
2025-05-30 9:06 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc Eric Auger
` (21 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
We plan to reuse build_x86_acpi_pci_hotplug() implementation
for ARM so let's move the code to generic pcihp.
Associated static aml_pci_pdsm() helper is also moved along.
build_x86_acpi_pci_hotplug is renamed into build_acpi_pci_hotplug().
No code change intended.
Also fix the reference to acpi_pci_hotplug.rst documentation
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
v1 -> v2:
- s/spec/specs in reference to rst (Gustavo)
- fixed double space in commit msg (Gustavo)
rfc -> v1:
- make build_append_pci_dsm_func0_common non static and move it to
pcihp
---
hw/i386/acpi-build.h | 4 -
include/hw/acpi/pcihp.h | 9 +-
hw/acpi/pcihp.c | 174 ++++++++++++++++++++++++++++++++++++++-
hw/i386/acpi-build.c | 176 +---------------------------------------
4 files changed, 183 insertions(+), 180 deletions(-)
diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
index 275ec058a1..8ba3c33e48 100644
--- a/hw/i386/acpi-build.h
+++ b/hw/i386/acpi-build.h
@@ -5,10 +5,6 @@
extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
-/* PCI Hot-plug registers' base. See docs/specs/acpi_pci_hotplug.rst */
-#define ACPI_PCIHP_SEJ_BASE 0x8
-#define ACPI_PCIHP_BNMR_BASE 0x10
-
void acpi_setup(void);
Object *acpi_get_i386_pci_host(void);
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index a97904bada..971451e8ea 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -3,7 +3,7 @@
*
* QEMU supports PCI hotplug via ACPI. This module
* implements the interface between QEMU and the ACPI BIOS.
- * Interface specification - see docs/specs/acpi_pci_hotplug.txt
+ * Interface specification - see docs/specs/acpi_pci_hotplug.rst
*
* Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
* Copyright (c) 2006 Fabrice Bellard
@@ -33,6 +33,10 @@
#define ACPI_PCIHP_IO_BASE_PROP "acpi-pcihp-io-base"
#define ACPI_PCIHP_IO_LEN_PROP "acpi-pcihp-io-len"
+/* PCI Hot-plug registers bases. See docs/specs/acpi_pci_hotplug.rst */
+#define ACPI_PCIHP_SEJ_BASE 0x8
+#define ACPI_PCIHP_BNMR_BASE 0x10
+
typedef struct AcpiPciHpPciStatus {
uint32_t up;
uint32_t down;
@@ -69,6 +73,9 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
AcpiPciHpState *s, DeviceState *dev,
Error **errp);
+void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
+void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
+
/* Called on reset */
void acpi_pcihp_reset(AcpiPciHpState *s);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index aac90013d4..e0260f67e6 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -26,7 +26,7 @@
#include "qemu/osdep.h"
#include "hw/acpi/pcihp.h"
-
+#include "hw/acpi/aml-build.h"
#include "hw/pci-host/i440fx.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_bridge.h"
@@ -513,6 +513,178 @@ void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
OBJ_PROP_FLAG_READ);
}
+void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar)
+{
+ Aml *UUID, *ifctx1;
+ uint8_t byte_list[1] = { 0 }; /* nothing supported yet */
+
+ aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar));
+ /*
+ * PCI Firmware Specification 3.1
+ * 4.6. _DSM Definitions for PCI
+ */
+ UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
+ ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID)));
+ {
+ /* call is for unsupported UUID, bail out */
+ aml_append(ifctx1, aml_return(retvar));
+ }
+ aml_append(ctx, ifctx1);
+
+ ifctx1 = aml_if(aml_lless(aml_arg(1), aml_int(2)));
+ {
+ /* call is for unsupported REV, bail out */
+ aml_append(ifctx1, aml_return(retvar));
+ }
+ aml_append(ctx, ifctx1);
+}
+
+static Aml *aml_pci_pdsm(void)
+{
+ Aml *method, *ifctx, *ifctx1;
+ Aml *ret = aml_local(0);
+ Aml *caps = aml_local(1);
+ Aml *acpi_index = aml_local(2);
+ Aml *zero = aml_int(0);
+ Aml *one = aml_int(1);
+ Aml *not_supp = aml_int(0xFFFFFFFF);
+ Aml *func = aml_arg(2);
+ Aml *params = aml_arg(4);
+ Aml *bnum = aml_derefof(aml_index(params, aml_int(0)));
+ Aml *sunum = aml_derefof(aml_index(params, aml_int(1)));
+
+ method = aml_method("PDSM", 5, AML_SERIALIZED);
+
+ /* get supported functions */
+ ifctx = aml_if(aml_equal(func, zero));
+ {
+ build_append_pci_dsm_func0_common(ifctx, ret);
+
+ aml_append(ifctx, aml_store(zero, caps));
+ aml_append(ifctx,
+ aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
+ /*
+ * advertise function 7 if device has acpi-index
+ * acpi_index values:
+ * 0: not present (default value)
+ * FFFFFFFF: not supported (old QEMU without PIDX reg)
+ * other: device's acpi-index
+ */
+ ifctx1 = aml_if(aml_lnot(
+ aml_or(aml_equal(acpi_index, zero),
+ aml_equal(acpi_index, not_supp), NULL)
+ ));
+ {
+ /* have supported functions */
+ aml_append(ifctx1, aml_or(caps, one, caps));
+ /* support for function 7 */
+ aml_append(ifctx1,
+ aml_or(caps, aml_shiftleft(one, aml_int(7)), caps));
+ }
+ aml_append(ifctx, ifctx1);
+
+ aml_append(ifctx, aml_store(caps, aml_index(ret, zero)));
+ aml_append(ifctx, aml_return(ret));
+ }
+ aml_append(method, ifctx);
+
+ /* handle specific functions requests */
+ /*
+ * PCI Firmware Specification 3.1
+ * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
+ * Operating Systems
+ */
+ ifctx = aml_if(aml_equal(func, aml_int(7)));
+ {
+ Aml *pkg = aml_package(2);
+
+ aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
+ aml_append(ifctx, aml_store(pkg, ret));
+ /*
+ * Windows calls func=7 without checking if it's available,
+ * as workaround Microsoft has suggested to return invalid for func7
+ * Package, so return 2 elements package but only initialize elements
+ * when acpi_index is supported and leave them uninitialized, which
+ * leads elements to being Uninitialized ObjectType and should trip
+ * Windows into discarding result as an unexpected and prevent setting
+ * bogus 'PCI Label' on the device.
+ */
+ ifctx1 = aml_if(aml_lnot(aml_lor(
+ aml_equal(acpi_index, zero), aml_equal(acpi_index, not_supp)
+ )));
+ {
+ aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero)));
+ /*
+ * optional, if not impl. should return null string
+ */
+ aml_append(ifctx1, aml_store(aml_string("%s", ""),
+ aml_index(ret, one)));
+ }
+ aml_append(ifctx, ifctx1);
+
+ aml_append(ifctx, aml_return(ret));
+ }
+
+ aml_append(method, ifctx);
+ return method;
+}
+
+void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
+{
+ Aml *scope;
+ Aml *field;
+ Aml *method;
+
+ scope = aml_scope("_SB.PCI0");
+
+ aml_append(scope,
+ aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08));
+ field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
+ aml_append(field, aml_named_field("PCIU", 32));
+ aml_append(field, aml_named_field("PCID", 32));
+ aml_append(scope, field);
+
+ aml_append(scope,
+ aml_operation_region("SEJ", AML_SYSTEM_IO,
+ aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04));
+ field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
+ aml_append(field, aml_named_field("B0EJ", 32));
+ aml_append(scope, field);
+
+ aml_append(scope,
+ aml_operation_region("BNMR", AML_SYSTEM_IO,
+ aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08));
+ field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
+ aml_append(field, aml_named_field("BNUM", 32));
+ aml_append(field, aml_named_field("PIDX", 32));
+ aml_append(scope, field);
+
+ aml_append(scope, aml_mutex("BLCK", 0));
+
+ method = aml_method("PCEJ", 2, AML_NOTSERIALIZED);
+ aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
+ aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
+ aml_append(method,
+ aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ")));
+ aml_append(method, aml_release(aml_name("BLCK")));
+ aml_append(method, aml_return(aml_int(0)));
+ aml_append(scope, method);
+
+ method = aml_method("AIDX", 2, AML_NOTSERIALIZED);
+ aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
+ aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
+ aml_append(method,
+ aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX")));
+ aml_append(method, aml_store(aml_name("PIDX"), aml_local(0)));
+ aml_append(method, aml_release(aml_name("BLCK")));
+ aml_append(method, aml_return(aml_local(0)));
+ aml_append(scope, method);
+
+ aml_append(scope, aml_pci_pdsm());
+
+ aml_append(table, scope);
+}
+
const VMStateDescription vmstate_acpi_pcihp_pci_status = {
.name = "acpi_pcihp_pci_status",
.version_id = 1,
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f59026524f..4f8572eebe 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -361,32 +361,6 @@ static Aml *aml_pci_device_dsm(void)
return method;
}
-static void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar)
-{
- Aml *UUID, *ifctx1;
- uint8_t byte_list[1] = { 0 }; /* nothing supported yet */
-
- aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar));
- /*
- * PCI Firmware Specification 3.1
- * 4.6. _DSM Definitions for PCI
- */
- UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
- ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID)));
- {
- /* call is for unsupported UUID, bail out */
- aml_append(ifctx1, aml_return(retvar));
- }
- aml_append(ctx, ifctx1);
-
- ifctx1 = aml_if(aml_lless(aml_arg(1), aml_int(2)));
- {
- /* call is for unsupported REV, bail out */
- aml_append(ifctx1, aml_return(retvar));
- }
- aml_append(ctx, ifctx1);
-}
-
static Aml *aml_pci_edsm(void)
{
Aml *method, *ifctx;
@@ -647,96 +621,6 @@ static bool build_append_notification_callback(Aml *parent_scope,
return !!nr_notifiers;
}
-static Aml *aml_pci_pdsm(void)
-{
- Aml *method, *ifctx, *ifctx1;
- Aml *ret = aml_local(0);
- Aml *caps = aml_local(1);
- Aml *acpi_index = aml_local(2);
- Aml *zero = aml_int(0);
- Aml *one = aml_int(1);
- Aml *not_supp = aml_int(0xFFFFFFFF);
- Aml *func = aml_arg(2);
- Aml *params = aml_arg(4);
- Aml *bnum = aml_derefof(aml_index(params, aml_int(0)));
- Aml *sunum = aml_derefof(aml_index(params, aml_int(1)));
-
- method = aml_method("PDSM", 5, AML_SERIALIZED);
-
- /* get supported functions */
- ifctx = aml_if(aml_equal(func, zero));
- {
- build_append_pci_dsm_func0_common(ifctx, ret);
-
- aml_append(ifctx, aml_store(zero, caps));
- aml_append(ifctx,
- aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
- /*
- * advertise function 7 if device has acpi-index
- * acpi_index values:
- * 0: not present (default value)
- * FFFFFFFF: not supported (old QEMU without PIDX reg)
- * other: device's acpi-index
- */
- ifctx1 = aml_if(aml_lnot(
- aml_or(aml_equal(acpi_index, zero),
- aml_equal(acpi_index, not_supp), NULL)
- ));
- {
- /* have supported functions */
- aml_append(ifctx1, aml_or(caps, one, caps));
- /* support for function 7 */
- aml_append(ifctx1,
- aml_or(caps, aml_shiftleft(one, aml_int(7)), caps));
- }
- aml_append(ifctx, ifctx1);
-
- aml_append(ifctx, aml_store(caps, aml_index(ret, zero)));
- aml_append(ifctx, aml_return(ret));
- }
- aml_append(method, ifctx);
-
- /* handle specific functions requests */
- /*
- * PCI Firmware Specification 3.1
- * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
- * Operating Systems
- */
- ifctx = aml_if(aml_equal(func, aml_int(7)));
- {
- Aml *pkg = aml_package(2);
-
- aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
- aml_append(ifctx, aml_store(pkg, ret));
- /*
- * Windows calls func=7 without checking if it's available,
- * as workaround Microsoft has suggested to return invalid for func7
- * Package, so return 2 elements package but only initialize elements
- * when acpi_index is supported and leave them uninitialized, which
- * leads elements to being Uninitialized ObjectType and should trip
- * Windows into discarding result as an unexpected and prevent setting
- * bogus 'PCI Label' on the device.
- */
- ifctx1 = aml_if(aml_lnot(aml_lor(
- aml_equal(acpi_index, zero), aml_equal(acpi_index, not_supp)
- )));
- {
- aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero)));
- /*
- * optional, if not impl. should return null string
- */
- aml_append(ifctx1, aml_store(aml_string("%s", ""),
- aml_index(ret, one)));
- }
- aml_append(ifctx, ifctx1);
-
- aml_append(ifctx, aml_return(ret));
- }
-
- aml_append(method, ifctx);
- return method;
-}
-
/*
* build_prt - Define interrupt routing rules
*
@@ -1227,62 +1111,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfgInfo *mcfg)
return dev;
}
-static void build_x86_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
-{
- Aml *scope;
- Aml *field;
- Aml *method;
-
- scope = aml_scope("_SB.PCI0");
-
- aml_append(scope,
- aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08));
- field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
- aml_append(field, aml_named_field("PCIU", 32));
- aml_append(field, aml_named_field("PCID", 32));
- aml_append(scope, field);
-
- aml_append(scope,
- aml_operation_region("SEJ", AML_SYSTEM_IO,
- aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04));
- field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
- aml_append(field, aml_named_field("B0EJ", 32));
- aml_append(scope, field);
-
- aml_append(scope,
- aml_operation_region("BNMR", AML_SYSTEM_IO,
- aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08));
- field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
- aml_append(field, aml_named_field("BNUM", 32));
- aml_append(field, aml_named_field("PIDX", 32));
- aml_append(scope, field);
-
- aml_append(scope, aml_mutex("BLCK", 0));
-
- method = aml_method("PCEJ", 2, AML_NOTSERIALIZED);
- aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
- aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
- aml_append(method,
- aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ")));
- aml_append(method, aml_release(aml_name("BLCK")));
- aml_append(method, aml_return(aml_int(0)));
- aml_append(scope, method);
-
- method = aml_method("AIDX", 2, AML_NOTSERIALIZED);
- aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
- aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
- aml_append(method,
- aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX")));
- aml_append(method, aml_store(aml_name("PIDX"), aml_local(0)));
- aml_append(method, aml_release(aml_name("BLCK")));
- aml_append(method, aml_return(aml_local(0)));
- aml_append(scope, method);
-
- aml_append(scope, aml_pci_pdsm());
-
- aml_append(table, scope);
-}
-
static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug)
{
Aml *if_ctx;
@@ -1394,7 +1222,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dsdt, sb_scope);
if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
- build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
+ build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
}
build_piix4_pci0_int(dsdt);
} else if (q35) {
@@ -1438,7 +1266,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dsdt, sb_scope);
if (pm->pcihp_bridge_en) {
- build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
+ build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
}
build_q35_pci0_int(dsdt);
}
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 03/25] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
2025-05-27 7:40 ` [PATCH v2 03/25] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp Eric Auger
@ 2025-05-27 12:08 ` Igor Mammedov
2025-05-30 9:06 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 12:08 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:05 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> We plan to reuse build_x86_acpi_pci_hotplug() implementation
> for ARM so let's move the code to generic pcihp.
>
> Associated static aml_pci_pdsm() helper is also moved along.
> build_x86_acpi_pci_hotplug is renamed into build_acpi_pci_hotplug().
>
> No code change intended.
>
> Also fix the reference to acpi_pci_hotplug.rst documentation
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> ---
>
> v1 -> v2:
> - s/spec/specs in reference to rst (Gustavo)
> - fixed double space in commit msg (Gustavo)
>
> rfc -> v1:
> - make build_append_pci_dsm_func0_common non static and move it to
> pcihp
> ---
> hw/i386/acpi-build.h | 4 -
> include/hw/acpi/pcihp.h | 9 +-
> hw/acpi/pcihp.c | 174 ++++++++++++++++++++++++++++++++++++++-
> hw/i386/acpi-build.c | 176 +---------------------------------------
> 4 files changed, 183 insertions(+), 180 deletions(-)
>
> diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
> index 275ec058a1..8ba3c33e48 100644
> --- a/hw/i386/acpi-build.h
> +++ b/hw/i386/acpi-build.h
> @@ -5,10 +5,6 @@
>
> extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
>
> -/* PCI Hot-plug registers' base. See docs/specs/acpi_pci_hotplug.rst */
> -#define ACPI_PCIHP_SEJ_BASE 0x8
> -#define ACPI_PCIHP_BNMR_BASE 0x10
> -
> void acpi_setup(void);
> Object *acpi_get_i386_pci_host(void);
>
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index a97904bada..971451e8ea 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -3,7 +3,7 @@
> *
> * QEMU supports PCI hotplug via ACPI. This module
> * implements the interface between QEMU and the ACPI BIOS.
> - * Interface specification - see docs/specs/acpi_pci_hotplug.txt
> + * Interface specification - see docs/specs/acpi_pci_hotplug.rst
> *
> * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
> * Copyright (c) 2006 Fabrice Bellard
> @@ -33,6 +33,10 @@
> #define ACPI_PCIHP_IO_BASE_PROP "acpi-pcihp-io-base"
> #define ACPI_PCIHP_IO_LEN_PROP "acpi-pcihp-io-len"
>
> +/* PCI Hot-plug registers bases. See docs/specs/acpi_pci_hotplug.rst */
> +#define ACPI_PCIHP_SEJ_BASE 0x8
> +#define ACPI_PCIHP_BNMR_BASE 0x10
> +
> typedef struct AcpiPciHpPciStatus {
> uint32_t up;
> uint32_t down;
> @@ -69,6 +73,9 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
> AcpiPciHpState *s, DeviceState *dev,
> Error **errp);
>
> +void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
> +void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
> +
> /* Called on reset */
> void acpi_pcihp_reset(AcpiPciHpState *s);
>
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index aac90013d4..e0260f67e6 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -26,7 +26,7 @@
>
> #include "qemu/osdep.h"
> #include "hw/acpi/pcihp.h"
> -
> +#include "hw/acpi/aml-build.h"
> #include "hw/pci-host/i440fx.h"
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_bridge.h"
> @@ -513,6 +513,178 @@ void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
> OBJ_PROP_FLAG_READ);
> }
>
> +void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar)
> +{
> + Aml *UUID, *ifctx1;
> + uint8_t byte_list[1] = { 0 }; /* nothing supported yet */
> +
> + aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar));
> + /*
> + * PCI Firmware Specification 3.1
> + * 4.6. _DSM Definitions for PCI
> + */
> + UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
> + ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID)));
> + {
> + /* call is for unsupported UUID, bail out */
> + aml_append(ifctx1, aml_return(retvar));
> + }
> + aml_append(ctx, ifctx1);
> +
> + ifctx1 = aml_if(aml_lless(aml_arg(1), aml_int(2)));
> + {
> + /* call is for unsupported REV, bail out */
> + aml_append(ifctx1, aml_return(retvar));
> + }
> + aml_append(ctx, ifctx1);
> +}
> +
> +static Aml *aml_pci_pdsm(void)
> +{
> + Aml *method, *ifctx, *ifctx1;
> + Aml *ret = aml_local(0);
> + Aml *caps = aml_local(1);
> + Aml *acpi_index = aml_local(2);
> + Aml *zero = aml_int(0);
> + Aml *one = aml_int(1);
> + Aml *not_supp = aml_int(0xFFFFFFFF);
> + Aml *func = aml_arg(2);
> + Aml *params = aml_arg(4);
> + Aml *bnum = aml_derefof(aml_index(params, aml_int(0)));
> + Aml *sunum = aml_derefof(aml_index(params, aml_int(1)));
> +
> + method = aml_method("PDSM", 5, AML_SERIALIZED);
> +
> + /* get supported functions */
> + ifctx = aml_if(aml_equal(func, zero));
> + {
> + build_append_pci_dsm_func0_common(ifctx, ret);
> +
> + aml_append(ifctx, aml_store(zero, caps));
> + aml_append(ifctx,
> + aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
> + /*
> + * advertise function 7 if device has acpi-index
> + * acpi_index values:
> + * 0: not present (default value)
> + * FFFFFFFF: not supported (old QEMU without PIDX reg)
> + * other: device's acpi-index
> + */
> + ifctx1 = aml_if(aml_lnot(
> + aml_or(aml_equal(acpi_index, zero),
> + aml_equal(acpi_index, not_supp), NULL)
> + ));
> + {
> + /* have supported functions */
> + aml_append(ifctx1, aml_or(caps, one, caps));
> + /* support for function 7 */
> + aml_append(ifctx1,
> + aml_or(caps, aml_shiftleft(one, aml_int(7)), caps));
> + }
> + aml_append(ifctx, ifctx1);
> +
> + aml_append(ifctx, aml_store(caps, aml_index(ret, zero)));
> + aml_append(ifctx, aml_return(ret));
> + }
> + aml_append(method, ifctx);
> +
> + /* handle specific functions requests */
> + /*
> + * PCI Firmware Specification 3.1
> + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> + * Operating Systems
> + */
> + ifctx = aml_if(aml_equal(func, aml_int(7)));
> + {
> + Aml *pkg = aml_package(2);
> +
> + aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
> + aml_append(ifctx, aml_store(pkg, ret));
> + /*
> + * Windows calls func=7 without checking if it's available,
> + * as workaround Microsoft has suggested to return invalid for func7
> + * Package, so return 2 elements package but only initialize elements
> + * when acpi_index is supported and leave them uninitialized, which
> + * leads elements to being Uninitialized ObjectType and should trip
> + * Windows into discarding result as an unexpected and prevent setting
> + * bogus 'PCI Label' on the device.
> + */
> + ifctx1 = aml_if(aml_lnot(aml_lor(
> + aml_equal(acpi_index, zero), aml_equal(acpi_index, not_supp)
> + )));
> + {
> + aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero)));
> + /*
> + * optional, if not impl. should return null string
> + */
> + aml_append(ifctx1, aml_store(aml_string("%s", ""),
> + aml_index(ret, one)));
> + }
> + aml_append(ifctx, ifctx1);
> +
> + aml_append(ifctx, aml_return(ret));
> + }
> +
> + aml_append(method, ifctx);
> + return method;
> +}
> +
> +void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
> +{
> + Aml *scope;
> + Aml *field;
> + Aml *method;
> +
> + scope = aml_scope("_SB.PCI0");
> +
> + aml_append(scope,
> + aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08));
> + field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> + aml_append(field, aml_named_field("PCIU", 32));
> + aml_append(field, aml_named_field("PCID", 32));
> + aml_append(scope, field);
> +
> + aml_append(scope,
> + aml_operation_region("SEJ", AML_SYSTEM_IO,
> + aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04));
> + field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> + aml_append(field, aml_named_field("B0EJ", 32));
> + aml_append(scope, field);
> +
> + aml_append(scope,
> + aml_operation_region("BNMR", AML_SYSTEM_IO,
> + aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08));
> + field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> + aml_append(field, aml_named_field("BNUM", 32));
> + aml_append(field, aml_named_field("PIDX", 32));
> + aml_append(scope, field);
> +
> + aml_append(scope, aml_mutex("BLCK", 0));
> +
> + method = aml_method("PCEJ", 2, AML_NOTSERIALIZED);
> + aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
> + aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
> + aml_append(method,
> + aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ")));
> + aml_append(method, aml_release(aml_name("BLCK")));
> + aml_append(method, aml_return(aml_int(0)));
> + aml_append(scope, method);
> +
> + method = aml_method("AIDX", 2, AML_NOTSERIALIZED);
> + aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
> + aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
> + aml_append(method,
> + aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX")));
> + aml_append(method, aml_store(aml_name("PIDX"), aml_local(0)));
> + aml_append(method, aml_release(aml_name("BLCK")));
> + aml_append(method, aml_return(aml_local(0)));
> + aml_append(scope, method);
> +
> + aml_append(scope, aml_pci_pdsm());
> +
> + aml_append(table, scope);
> +}
> +
> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
> .name = "acpi_pcihp_pci_status",
> .version_id = 1,
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index f59026524f..4f8572eebe 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -361,32 +361,6 @@ static Aml *aml_pci_device_dsm(void)
> return method;
> }
>
> -static void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar)
> -{
> - Aml *UUID, *ifctx1;
> - uint8_t byte_list[1] = { 0 }; /* nothing supported yet */
> -
> - aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar));
> - /*
> - * PCI Firmware Specification 3.1
> - * 4.6. _DSM Definitions for PCI
> - */
> - UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID)));
> - {
> - /* call is for unsupported UUID, bail out */
> - aml_append(ifctx1, aml_return(retvar));
> - }
> - aml_append(ctx, ifctx1);
> -
> - ifctx1 = aml_if(aml_lless(aml_arg(1), aml_int(2)));
> - {
> - /* call is for unsupported REV, bail out */
> - aml_append(ifctx1, aml_return(retvar));
> - }
> - aml_append(ctx, ifctx1);
> -}
> -
> static Aml *aml_pci_edsm(void)
> {
> Aml *method, *ifctx;
> @@ -647,96 +621,6 @@ static bool build_append_notification_callback(Aml *parent_scope,
> return !!nr_notifiers;
> }
>
> -static Aml *aml_pci_pdsm(void)
> -{
> - Aml *method, *ifctx, *ifctx1;
> - Aml *ret = aml_local(0);
> - Aml *caps = aml_local(1);
> - Aml *acpi_index = aml_local(2);
> - Aml *zero = aml_int(0);
> - Aml *one = aml_int(1);
> - Aml *not_supp = aml_int(0xFFFFFFFF);
> - Aml *func = aml_arg(2);
> - Aml *params = aml_arg(4);
> - Aml *bnum = aml_derefof(aml_index(params, aml_int(0)));
> - Aml *sunum = aml_derefof(aml_index(params, aml_int(1)));
> -
> - method = aml_method("PDSM", 5, AML_SERIALIZED);
> -
> - /* get supported functions */
> - ifctx = aml_if(aml_equal(func, zero));
> - {
> - build_append_pci_dsm_func0_common(ifctx, ret);
> -
> - aml_append(ifctx, aml_store(zero, caps));
> - aml_append(ifctx,
> - aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
> - /*
> - * advertise function 7 if device has acpi-index
> - * acpi_index values:
> - * 0: not present (default value)
> - * FFFFFFFF: not supported (old QEMU without PIDX reg)
> - * other: device's acpi-index
> - */
> - ifctx1 = aml_if(aml_lnot(
> - aml_or(aml_equal(acpi_index, zero),
> - aml_equal(acpi_index, not_supp), NULL)
> - ));
> - {
> - /* have supported functions */
> - aml_append(ifctx1, aml_or(caps, one, caps));
> - /* support for function 7 */
> - aml_append(ifctx1,
> - aml_or(caps, aml_shiftleft(one, aml_int(7)), caps));
> - }
> - aml_append(ifctx, ifctx1);
> -
> - aml_append(ifctx, aml_store(caps, aml_index(ret, zero)));
> - aml_append(ifctx, aml_return(ret));
> - }
> - aml_append(method, ifctx);
> -
> - /* handle specific functions requests */
> - /*
> - * PCI Firmware Specification 3.1
> - * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> - * Operating Systems
> - */
> - ifctx = aml_if(aml_equal(func, aml_int(7)));
> - {
> - Aml *pkg = aml_package(2);
> -
> - aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
> - aml_append(ifctx, aml_store(pkg, ret));
> - /*
> - * Windows calls func=7 without checking if it's available,
> - * as workaround Microsoft has suggested to return invalid for func7
> - * Package, so return 2 elements package but only initialize elements
> - * when acpi_index is supported and leave them uninitialized, which
> - * leads elements to being Uninitialized ObjectType and should trip
> - * Windows into discarding result as an unexpected and prevent setting
> - * bogus 'PCI Label' on the device.
> - */
> - ifctx1 = aml_if(aml_lnot(aml_lor(
> - aml_equal(acpi_index, zero), aml_equal(acpi_index, not_supp)
> - )));
> - {
> - aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero)));
> - /*
> - * optional, if not impl. should return null string
> - */
> - aml_append(ifctx1, aml_store(aml_string("%s", ""),
> - aml_index(ret, one)));
> - }
> - aml_append(ifctx, ifctx1);
> -
> - aml_append(ifctx, aml_return(ret));
> - }
> -
> - aml_append(method, ifctx);
> - return method;
> -}
> -
> /*
> * build_prt - Define interrupt routing rules
> *
> @@ -1227,62 +1111,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfgInfo *mcfg)
> return dev;
> }
>
> -static void build_x86_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
> -{
> - Aml *scope;
> - Aml *field;
> - Aml *method;
> -
> - scope = aml_scope("_SB.PCI0");
> -
> - aml_append(scope,
> - aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08));
> - field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> - aml_append(field, aml_named_field("PCIU", 32));
> - aml_append(field, aml_named_field("PCID", 32));
> - aml_append(scope, field);
> -
> - aml_append(scope,
> - aml_operation_region("SEJ", AML_SYSTEM_IO,
> - aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04));
> - field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> - aml_append(field, aml_named_field("B0EJ", 32));
> - aml_append(scope, field);
> -
> - aml_append(scope,
> - aml_operation_region("BNMR", AML_SYSTEM_IO,
> - aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08));
> - field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> - aml_append(field, aml_named_field("BNUM", 32));
> - aml_append(field, aml_named_field("PIDX", 32));
> - aml_append(scope, field);
> -
> - aml_append(scope, aml_mutex("BLCK", 0));
> -
> - method = aml_method("PCEJ", 2, AML_NOTSERIALIZED);
> - aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
> - aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
> - aml_append(method,
> - aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ")));
> - aml_append(method, aml_release(aml_name("BLCK")));
> - aml_append(method, aml_return(aml_int(0)));
> - aml_append(scope, method);
> -
> - method = aml_method("AIDX", 2, AML_NOTSERIALIZED);
> - aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
> - aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
> - aml_append(method,
> - aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX")));
> - aml_append(method, aml_store(aml_name("PIDX"), aml_local(0)));
> - aml_append(method, aml_release(aml_name("BLCK")));
> - aml_append(method, aml_return(aml_local(0)));
> - aml_append(scope, method);
> -
> - aml_append(scope, aml_pci_pdsm());
> -
> - aml_append(table, scope);
> -}
> -
> static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug)
> {
> Aml *if_ctx;
> @@ -1394,7 +1222,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> aml_append(dsdt, sb_scope);
>
> if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
> - build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
> + build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
> }
> build_piix4_pci0_int(dsdt);
> } else if (q35) {
> @@ -1438,7 +1266,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> aml_append(dsdt, sb_scope);
>
> if (pm->pcihp_bridge_en) {
> - build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
> + build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
> }
> build_q35_pci0_int(dsdt);
> }
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 03/25] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
2025-05-27 7:40 ` [PATCH v2 03/25] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp Eric Auger
@ 2025-05-30 9:06 ` Jonathan Cameron via
2025-05-30 9:06 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 9:06 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:05 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> We plan to reuse build_x86_acpi_pci_hotplug() implementation
> for ARM so let's move the code to generic pcihp.
>
> Associated static aml_pci_pdsm() helper is also moved along.
> build_x86_acpi_pci_hotplug is renamed into build_acpi_pci_hotplug().
>
> No code change intended.
>
> Also fix the reference to acpi_pci_hotplug.rst documentation
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Indeed moves the code as described...
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 03/25] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
@ 2025-05-30 9:06 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 9:06 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:05 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> We plan to reuse build_x86_acpi_pci_hotplug() implementation
> for ARM so let's move the code to generic pcihp.
>
> Associated static aml_pci_pdsm() helper is also moved along.
> build_x86_acpi_pci_hotplug is renamed into build_acpi_pci_hotplug().
>
> No code change intended.
>
> Also fix the reference to acpi_pci_hotplug.rst documentation
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Indeed moves the code as described...
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (2 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 03/25] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 12:27 ` Igor Mammedov
2025-05-30 9:27 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation Eric Auger
` (20 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
native pci hotplug.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
rfc -> v1:
- updated the "Allow OS control for all 5 features" comment
---
hw/pci-host/gpex-acpi.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index 0aba47c71c..f34b7cf25e 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
}
}
-static void acpi_dsdt_add_pci_osc(Aml *dev)
+static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
{
Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
@@ -77,11 +77,12 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
/*
- * Allow OS control for all 5 features:
- * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
+ * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
+ * and PCIeHotplug depending on enable_native_pcie_hotplug
*/
- aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F),
- aml_name("CTRL")));
+ aml_append(ifctx, aml_and(aml_name("CTRL"),
+ aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
+ aml_name("CTRL")));
ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
@@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
if (is_cxl) {
build_cxl_osc_method(dev);
} else {
- acpi_dsdt_add_pci_osc(dev);
+ acpi_dsdt_add_pci_osc(dev, true);
}
aml_append(scope, dev);
@@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
}
aml_append(dev, aml_name_decl("_CRS", rbuf));
- acpi_dsdt_add_pci_osc(dev);
+ acpi_dsdt_add_pci_osc(dev, true);
Aml *dev_res0 = aml_device("%s", "RES0");
aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
2025-05-27 7:40 ` [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc Eric Auger
@ 2025-05-27 12:27 ` Igor Mammedov
2025-05-30 9:27 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 12:27 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:06 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
> native pci hotplug.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> ---
>
> rfc -> v1:
> - updated the "Allow OS control for all 5 features" comment
> ---
> hw/pci-host/gpex-acpi.c | 15 ++++++++-------
> 1 file changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 0aba47c71c..f34b7cf25e 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static void acpi_dsdt_add_pci_osc(Aml *dev)
> +static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> {
> Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
>
> @@ -77,11 +77,12 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>
> /*
> - * Allow OS control for all 5 features:
> - * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
> + * and PCIeHotplug depending on enable_native_pcie_hotplug
> */
> - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F),
> - aml_name("CTRL")));
> + aml_append(ifctx, aml_and(aml_name("CTRL"),
> + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
> + aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
> @@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> - acpi_dsdt_add_pci_osc(dev);
> + acpi_dsdt_add_pci_osc(dev, true);
> }
>
> aml_append(scope, dev);
> @@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_pci_osc(dev);
> + acpi_dsdt_add_pci_osc(dev, true);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
2025-05-27 7:40 ` [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc Eric Auger
@ 2025-05-30 9:27 ` Jonathan Cameron via
2025-05-30 9:27 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 9:27 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:06 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
> native pci hotplug.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Hi Eric,
Makes me wonder what we should do for CXL - I was expecting
a very similar change. Currently seems like those always
allow native hotplug (__build_cxl_osc_method()) on x86 and
arm64 (patches on list).
Maybe that has only been working because the kernel is reading
the PCI _OSC first. Or it's always been doing native hotplug
an no one noticed. A quick look at logs shows the kernel
first gets told no, then yes as it queries the two different
_OSC types.
Looks like I should fix that _OSC then it should be carried
over to this as well (or if you don't mind adding a trivial
patch to replicate this patch for the CXL _OSC, even better!)
Other than that, this patch looks fine to me though I do wonder
if we could unify this with build_q35_osc_method()?
I'm not the best at reading AML generation code but whilst
they are written quite differently they seem to be functionally
very similar, more so after this patch.
>
> ---
>
> rfc -> v1:
> - updated the "Allow OS control for all 5 features" comment
> ---
> hw/pci-host/gpex-acpi.c | 15 ++++++++-------
> 1 file changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 0aba47c71c..f34b7cf25e 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static void acpi_dsdt_add_pci_osc(Aml *dev)
> +static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> {
> Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
>
> @@ -77,11 +77,12 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>
> /*
> - * Allow OS control for all 5 features:
> - * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
> + * and PCIeHotplug depending on enable_native_pcie_hotplug
> */
> - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F),
> - aml_name("CTRL")));
> + aml_append(ifctx, aml_and(aml_name("CTRL"),
> + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
> + aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
> @@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
This was the path I was expecting to change as well.
> } else {
> - acpi_dsdt_add_pci_osc(dev);
> + acpi_dsdt_add_pci_osc(dev, true);
> }
>
> aml_append(scope, dev);
> @@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_pci_osc(dev);
> + acpi_dsdt_add_pci_osc(dev, true);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
@ 2025-05-30 9:27 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 9:27 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:06 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
> native pci hotplug.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Hi Eric,
Makes me wonder what we should do for CXL - I was expecting
a very similar change. Currently seems like those always
allow native hotplug (__build_cxl_osc_method()) on x86 and
arm64 (patches on list).
Maybe that has only been working because the kernel is reading
the PCI _OSC first. Or it's always been doing native hotplug
an no one noticed. A quick look at logs shows the kernel
first gets told no, then yes as it queries the two different
_OSC types.
Looks like I should fix that _OSC then it should be carried
over to this as well (or if you don't mind adding a trivial
patch to replicate this patch for the CXL _OSC, even better!)
Other than that, this patch looks fine to me though I do wonder
if we could unify this with build_q35_osc_method()?
I'm not the best at reading AML generation code but whilst
they are written quite differently they seem to be functionally
very similar, more so after this patch.
>
> ---
>
> rfc -> v1:
> - updated the "Allow OS control for all 5 features" comment
> ---
> hw/pci-host/gpex-acpi.c | 15 ++++++++-------
> 1 file changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 0aba47c71c..f34b7cf25e 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static void acpi_dsdt_add_pci_osc(Aml *dev)
> +static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> {
> Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
>
> @@ -77,11 +77,12 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>
> /*
> - * Allow OS control for all 5 features:
> - * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
> + * and PCIeHotplug depending on enable_native_pcie_hotplug
> */
> - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F),
> - aml_name("CTRL")));
> + aml_append(ifctx, aml_and(aml_name("CTRL"),
> + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
> + aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
> @@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
This was the path I was expecting to change as well.
> } else {
> - acpi_dsdt_add_pci_osc(dev);
> + acpi_dsdt_add_pci_osc(dev, true);
> }
>
> aml_append(scope, dev);
> @@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_pci_osc(dev);
> + acpi_dsdt_add_pci_osc(dev, true);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
2025-05-30 9:27 ` Jonathan Cameron via
@ 2025-05-30 9:28 ` Jonathan Cameron via
-1 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 9:28 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 30 May 2025 10:27:11 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Tue, 27 May 2025 09:40:06 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
> > native pci hotplug.
> >
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>
> Hi Eric,
>
> Makes me wonder what we should do for CXL - I was expecting
> a very similar change. Currently seems like those always
> allow native hotplug (__build_cxl_osc_method()) on x86 and
> arm64 (patches on list).
>
> Maybe that has only been working because the kernel is reading
> the PCI _OSC first. Or it's always been doing native hotplug
> an no one noticed. A quick look at logs shows the kernel
> first gets told no, then yes as it queries the two different
> _OSC types.
>
> Looks like I should fix that _OSC then it should be carried
> over to this as well (or if you don't mind adding a trivial
> patch to replicate this patch for the CXL _OSC, even better!)
>
> Other than that, this patch looks fine to me though I do wonder
> if we could unify this with build_q35_osc_method()?
> I'm not the best at reading AML generation code but whilst
> they are written quite differently they seem to be functionally
> very similar, more so after this patch.
>
I should have read on... Sorry for the noise!
J
> >
> > ---
> >
> > rfc -> v1:
> > - updated the "Allow OS control for all 5 features" comment
> > ---
> > hw/pci-host/gpex-acpi.c | 15 ++++++++-------
> > 1 file changed, 8 insertions(+), 7 deletions(-)
> >
> > diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> > index 0aba47c71c..f34b7cf25e 100644
> > --- a/hw/pci-host/gpex-acpi.c
> > +++ b/hw/pci-host/gpex-acpi.c
> > @@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> > }
> > }
> >
> > -static void acpi_dsdt_add_pci_osc(Aml *dev)
> > +static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> > {
> > Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
> >
> > @@ -77,11 +77,12 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
> > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> >
> > /*
> > - * Allow OS control for all 5 features:
> > - * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> > + * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
> > + * and PCIeHotplug depending on enable_native_pcie_hotplug
> > */
> > - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F),
> > - aml_name("CTRL")));
> > + aml_append(ifctx, aml_and(aml_name("CTRL"),
> > + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
> > + aml_name("CTRL")));
> >
> > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> > aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
> > @@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> > if (is_cxl) {
> > build_cxl_osc_method(dev);
>
> This was the path I was expecting to change as well.
>
> > } else {
> > - acpi_dsdt_add_pci_osc(dev);
> > + acpi_dsdt_add_pci_osc(dev, true);
> > }
> >
> > aml_append(scope, dev);
> > @@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> > }
> > aml_append(dev, aml_name_decl("_CRS", rbuf));
> >
> > - acpi_dsdt_add_pci_osc(dev);
> > + acpi_dsdt_add_pci_osc(dev, true);
> >
> > Aml *dev_res0 = aml_device("%s", "RES0");
> > aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
@ 2025-05-30 9:28 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 9:28 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 30 May 2025 10:27:11 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Tue, 27 May 2025 09:40:06 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
> > native pci hotplug.
> >
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>
> Hi Eric,
>
> Makes me wonder what we should do for CXL - I was expecting
> a very similar change. Currently seems like those always
> allow native hotplug (__build_cxl_osc_method()) on x86 and
> arm64 (patches on list).
>
> Maybe that has only been working because the kernel is reading
> the PCI _OSC first. Or it's always been doing native hotplug
> an no one noticed. A quick look at logs shows the kernel
> first gets told no, then yes as it queries the two different
> _OSC types.
>
> Looks like I should fix that _OSC then it should be carried
> over to this as well (or if you don't mind adding a trivial
> patch to replicate this patch for the CXL _OSC, even better!)
>
> Other than that, this patch looks fine to me though I do wonder
> if we could unify this with build_q35_osc_method()?
> I'm not the best at reading AML generation code but whilst
> they are written quite differently they seem to be functionally
> very similar, more so after this patch.
>
I should have read on... Sorry for the noise!
J
> >
> > ---
> >
> > rfc -> v1:
> > - updated the "Allow OS control for all 5 features" comment
> > ---
> > hw/pci-host/gpex-acpi.c | 15 ++++++++-------
> > 1 file changed, 8 insertions(+), 7 deletions(-)
> >
> > diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> > index 0aba47c71c..f34b7cf25e 100644
> > --- a/hw/pci-host/gpex-acpi.c
> > +++ b/hw/pci-host/gpex-acpi.c
> > @@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> > }
> > }
> >
> > -static void acpi_dsdt_add_pci_osc(Aml *dev)
> > +static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> > {
> > Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
> >
> > @@ -77,11 +77,12 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
> > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> >
> > /*
> > - * Allow OS control for all 5 features:
> > - * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> > + * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
> > + * and PCIeHotplug depending on enable_native_pcie_hotplug
> > */
> > - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F),
> > - aml_name("CTRL")));
> > + aml_append(ifctx, aml_and(aml_name("CTRL"),
> > + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
> > + aml_name("CTRL")));
> >
> > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> > aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
> > @@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> > if (is_cxl) {
> > build_cxl_osc_method(dev);
>
> This was the path I was expecting to change as well.
>
> > } else {
> > - acpi_dsdt_add_pci_osc(dev);
> > + acpi_dsdt_add_pci_osc(dev, true);
> > }
> >
> > aml_append(scope, dev);
> > @@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> > }
> > aml_append(dev, aml_name_decl("_CRS", rbuf));
> >
> > - acpi_dsdt_add_pci_osc(dev);
> > + acpi_dsdt_add_pci_osc(dev, true);
> >
> > Aml *dev_res0 = aml_device("%s", "RES0");
> > aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
2025-05-30 9:27 ` Jonathan Cameron via
(?)
(?)
@ 2025-06-11 12:05 ` Eric Auger
-1 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-06-11 12:05 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan,
On 5/30/25 11:27 AM, Jonathan Cameron wrote:
> On Tue, 27 May 2025 09:40:06 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
>> native pci hotplug.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> Hi Eric,
>
> Makes me wonder what we should do for CXL - I was expecting
> a very similar change. Currently seems like those always
> allow native hotplug (__build_cxl_osc_method()) on x86 and
> arm64 (patches on list).
>
> Maybe that has only been working because the kernel is reading
> the PCI _OSC first. Or it's always been doing native hotplug
> an no one noticed. A quick look at logs shows the kernel
> first gets told no, then yes as it queries the two different
> _OSC types.
>
> Looks like I should fix that _OSC then it should be carried
> over to this as well (or if you don't mind adding a trivial
> patch to replicate this patch for the CXL _OSC, even better!)
If you don't mind I would prefer we carry out cxl changes separately as
it may also require some test blob changes and I am not much
knowledgable on CXL yet. I would prefer stabilizing this series before
extending it.
But sure if it is relevant we can then mimic that change on cxl path.
Eric
>
> Other than that, this patch looks fine to me though I do wonder
> if we could unify this with build_q35_osc_method()?
> I'm not the best at reading AML generation code but whilst
> they are written quite differently they seem to be functionally
> very similar, more so after this patch.
>
>> ---
>>
>> rfc -> v1:
>> - updated the "Allow OS control for all 5 features" comment
>> ---
>> hw/pci-host/gpex-acpi.c | 15 ++++++++-------
>> 1 file changed, 8 insertions(+), 7 deletions(-)
>>
>> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
>> index 0aba47c71c..f34b7cf25e 100644
>> --- a/hw/pci-host/gpex-acpi.c
>> +++ b/hw/pci-host/gpex-acpi.c
>> @@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
>> }
>> }
>>
>> -static void acpi_dsdt_add_pci_osc(Aml *dev)
>> +static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
>> {
>> Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
>>
>> @@ -77,11 +77,12 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
>> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>>
>> /*
>> - * Allow OS control for all 5 features:
>> - * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
>> + * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
>> + * and PCIeHotplug depending on enable_native_pcie_hotplug
>> */
>> - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F),
>> - aml_name("CTRL")));
>> + aml_append(ifctx, aml_and(aml_name("CTRL"),
>> + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
>> + aml_name("CTRL")));
>>
>> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
>> aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
>> @@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> if (is_cxl) {
>> build_cxl_osc_method(dev);
> This was the path I was expecting to change as well.
>
>> } else {
>> - acpi_dsdt_add_pci_osc(dev);
>> + acpi_dsdt_add_pci_osc(dev, true);
>> }
>>
>> aml_append(scope, dev);
>> @@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> }
>> aml_append(dev, aml_name_decl("_CRS", rbuf));
>>
>> - acpi_dsdt_add_pci_osc(dev);
>> + acpi_dsdt_add_pci_osc(dev, true);
>>
>> Aml *dev_res0 = aml_device("%s", "RES0");
>> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (3 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 04/25] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 12:31 ` Igor Mammedov
2025-05-30 10:02 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex Eric Auger
` (19 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
it appends the _OSC method but in fact it also appends the _DSM method
for the host bridge. Let's split the function into two separate ones
and let them return the method Aml pointer instead. This matches the
way it is done on x86 (build_q35_osc_method). In a subsequent patch
we will replace the gpex method by the q35 implementation that will
become shared between ARM and x86.
acpi_dsdt_add_host_bridge_methods is a new top helper that generates
both the _OSC and _DSM methods.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
hw/pci-host/gpex-acpi.c | 31 +++++++++++++++++++++----------
1 file changed, 21 insertions(+), 10 deletions(-)
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index f34b7cf25e..1aa2d12026 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -50,13 +50,10 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
}
}
-static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
+static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
{
- Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
+ Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
- /* Declare an _OSC (OS Control Handoff) method */
- aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
- aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
aml_append(method,
aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
@@ -103,9 +100,13 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
aml_name("CDW1")));
aml_append(elsectx, aml_return(aml_arg(3)));
aml_append(method, elsectx);
- aml_append(dev, method);
+ return method;
+}
- method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
+static Aml *build_host_bridge_dsm(void)
+{
+ Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
+ Aml *UUID, *ifctx, *ifctx1, *buf;
/* PCI Firmware Specification 3.0
* 4.6.1. _DSM for PCI Express Slot Information
@@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
byte_list[0] = 0;
buf = aml_buffer(1, byte_list);
aml_append(method, aml_return(buf));
- aml_append(dev, method);
+ return method;
+}
+
+static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
+ bool enable_native_pcie_hotplug)
+{
+ aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
+ aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
+ /* Declare an _OSC (OS Control Handoff) method */
+ aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
+ aml_append(dev, build_host_bridge_dsm());
}
void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
@@ -193,7 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
if (is_cxl) {
build_cxl_osc_method(dev);
} else {
- acpi_dsdt_add_pci_osc(dev, true);
+ acpi_dsdt_add_host_bridge_methods(dev, true);
}
aml_append(scope, dev);
@@ -268,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
}
aml_append(dev, aml_name_decl("_CRS", rbuf));
- acpi_dsdt_add_pci_osc(dev, true);
+ acpi_dsdt_add_host_bridge_methods(dev, true);
Aml *dev_res0 = aml_device("%s", "RES0");
aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-05-27 7:40 ` [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation Eric Auger
@ 2025-05-27 12:31 ` Igor Mammedov
2025-05-30 10:02 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 12:31 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:07 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
> it appends the _OSC method but in fact it also appends the _DSM method
> for the host bridge. Let's split the function into two separate ones
> and let them return the method Aml pointer instead. This matches the
> way it is done on x86 (build_q35_osc_method). In a subsequent patch
> we will replace the gpex method by the q35 implementation that will
> become shared between ARM and x86.
>
> acpi_dsdt_add_host_bridge_methods is a new top helper that generates
> both the _OSC and _DSM methods.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> hw/pci-host/gpex-acpi.c | 31 +++++++++++++++++++++----------
> 1 file changed, 21 insertions(+), 10 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index f34b7cf25e..1aa2d12026 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,13 +50,10 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> +static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
> {
> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
> + Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
>
> - /* Declare an _OSC (OS Control Handoff) method */
> - aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> - aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> aml_append(method,
> aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> @@ -103,9 +100,13 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> aml_name("CDW1")));
> aml_append(elsectx, aml_return(aml_arg(3)));
> aml_append(method, elsectx);
> - aml_append(dev, method);
> + return method;
> +}
>
> - method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> +static Aml *build_host_bridge_dsm(void)
> +{
> + Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> + Aml *UUID, *ifctx, *ifctx1, *buf;
>
> /* PCI Firmware Specification 3.0
> * 4.6.1. _DSM for PCI Express Slot Information
> @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> byte_list[0] = 0;
> buf = aml_buffer(1, byte_list);
> aml_append(method, aml_return(buf));
> - aml_append(dev, method);
> + return method;
> +}
> +
> +static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> + bool enable_native_pcie_hotplug)
> +{
> + aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> + aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> + /* Declare an _OSC (OS Control Handoff) method */
> + aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
> + aml_append(dev, build_host_bridge_dsm());
> }
>
> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> @@ -193,7 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> - acpi_dsdt_add_pci_osc(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, true);
> }
>
> aml_append(scope, dev);
> @@ -268,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_pci_osc(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, true);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-05-27 7:40 ` [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation Eric Auger
@ 2025-05-30 10:02 ` Jonathan Cameron via
2025-05-30 10:02 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 10:02 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:07 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
> it appends the _OSC method but in fact it also appends the _DSM method
> for the host bridge. Let's split the function into two separate ones
> and let them return the method Aml pointer instead. This matches the
> way it is done on x86 (build_q35_osc_method). In a subsequent patch
> we will replace the gpex method by the q35 implementation that will
> become shared between ARM and x86.
>
> acpi_dsdt_add_host_bridge_methods is a new top helper that generates
> both the _OSC and _DSM methods.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Makes complete sense. I've had local equivalent of this on the CXL
tree for a while as without it we don't register the _DSM for the
CXL path (and we should). However, can you modify it a little to
make that easier for me? Basically make sure the _DSM is registered
for the CXL path as well.
One other comment inline.
> ---
> hw/pci-host/gpex-acpi.c | 31 +++++++++++++++++++++----------
> 1 file changed, 21 insertions(+), 10 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index f34b7cf25e..1aa2d12026 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,13 +50,10 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> +static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
> {
> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
> + Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
>
> - /* Declare an _OSC (OS Control Handoff) method */
> - aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> - aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> aml_append(method,
> aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> @@ -103,9 +100,13 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> aml_name("CDW1")));
> aml_append(elsectx, aml_return(aml_arg(3)));
> aml_append(method, elsectx);
> - aml_append(dev, method);
> + return method;
> +}
>
> - method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> +static Aml *build_host_bridge_dsm(void)
> +{
> + Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> + Aml *UUID, *ifctx, *ifctx1, *buf;
>
> /* PCI Firmware Specification 3.0
> * 4.6.1. _DSM for PCI Express Slot Information
> @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> byte_list[0] = 0;
> buf = aml_buffer(1, byte_list);
> aml_append(method, aml_return(buf));
> - aml_append(dev, method);
> + return method;
> +}
> +
> +static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> + bool enable_native_pcie_hotplug)
> +{
> + aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> + aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
These two declarations seem to be very much part of the _OSC build though not
within the the method. I 'think' you get left with them later with no users.
So move them into the osc build here and they will naturally go away when
you move to the generic code.
They end up unused in the DSDT at the end of the series.
I ran a quick GPEX + pxb-pcie test and we do get the odd mix that the OSC for
the GPEX say no native hotplug but the OSC for the PXB allows it.
> + /* Declare an _OSC (OS Control Handoff) method */
> + aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
> + aml_append(dev, build_host_bridge_dsm());
> }
>
> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> @@ -193,7 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> - acpi_dsdt_add_pci_osc(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, true);
Can you either drop the use of the wrapper for the DSM part here and call
it unconditionally (for cxl and PCIe cases) or add an extra call to
aml_append(dev, build_host_bridge_dsm()) for the is_cxl path?
> }
>
> aml_append(scope, dev);
> @@ -268,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_pci_osc(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, true);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
@ 2025-05-30 10:02 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 10:02 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:07 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
> it appends the _OSC method but in fact it also appends the _DSM method
> for the host bridge. Let's split the function into two separate ones
> and let them return the method Aml pointer instead. This matches the
> way it is done on x86 (build_q35_osc_method). In a subsequent patch
> we will replace the gpex method by the q35 implementation that will
> become shared between ARM and x86.
>
> acpi_dsdt_add_host_bridge_methods is a new top helper that generates
> both the _OSC and _DSM methods.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Makes complete sense. I've had local equivalent of this on the CXL
tree for a while as without it we don't register the _DSM for the
CXL path (and we should). However, can you modify it a little to
make that easier for me? Basically make sure the _DSM is registered
for the CXL path as well.
One other comment inline.
> ---
> hw/pci-host/gpex-acpi.c | 31 +++++++++++++++++++++----------
> 1 file changed, 21 insertions(+), 10 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index f34b7cf25e..1aa2d12026 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,13 +50,10 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> +static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
> {
> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
> + Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
>
> - /* Declare an _OSC (OS Control Handoff) method */
> - aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> - aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> aml_append(method,
> aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> @@ -103,9 +100,13 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> aml_name("CDW1")));
> aml_append(elsectx, aml_return(aml_arg(3)));
> aml_append(method, elsectx);
> - aml_append(dev, method);
> + return method;
> +}
>
> - method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> +static Aml *build_host_bridge_dsm(void)
> +{
> + Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> + Aml *UUID, *ifctx, *ifctx1, *buf;
>
> /* PCI Firmware Specification 3.0
> * 4.6.1. _DSM for PCI Express Slot Information
> @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> byte_list[0] = 0;
> buf = aml_buffer(1, byte_list);
> aml_append(method, aml_return(buf));
> - aml_append(dev, method);
> + return method;
> +}
> +
> +static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> + bool enable_native_pcie_hotplug)
> +{
> + aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> + aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
These two declarations seem to be very much part of the _OSC build though not
within the the method. I 'think' you get left with them later with no users.
So move them into the osc build here and they will naturally go away when
you move to the generic code.
They end up unused in the DSDT at the end of the series.
I ran a quick GPEX + pxb-pcie test and we do get the odd mix that the OSC for
the GPEX say no native hotplug but the OSC for the PXB allows it.
> + /* Declare an _OSC (OS Control Handoff) method */
> + aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
> + aml_append(dev, build_host_bridge_dsm());
> }
>
> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> @@ -193,7 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> - acpi_dsdt_add_pci_osc(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, true);
Can you either drop the use of the wrapper for the DSM part here and call
it unconditionally (for cxl and PCIe cases) or add an extra call to
aml_append(dev, build_host_bridge_dsm()) for the is_cxl path?
> }
>
> aml_append(scope, dev);
> @@ -268,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_pci_osc(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, true);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-05-30 10:02 ` Jonathan Cameron via
(?)
@ 2025-05-30 12:05 ` Igor Mammedov
2025-05-30 15:00 ` Jonathan Cameron via
-1 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-05-30 12:05 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 30 May 2025 11:02:27 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Tue, 27 May 2025 09:40:07 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
> > it appends the _OSC method but in fact it also appends the _DSM method
> > for the host bridge. Let's split the function into two separate ones
> > and let them return the method Aml pointer instead. This matches the
> > way it is done on x86 (build_q35_osc_method). In a subsequent patch
> > we will replace the gpex method by the q35 implementation that will
> > become shared between ARM and x86.
> >
> > acpi_dsdt_add_host_bridge_methods is a new top helper that generates
> > both the _OSC and _DSM methods.
> >
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>
> Makes complete sense. I've had local equivalent of this on the CXL
> tree for a while as without it we don't register the _DSM for the
> CXL path (and we should). However, can you modify it a little to
> make that easier for me? Basically make sure the _DSM is registered
> for the CXL path as well.
>
[...]
unless CXL is root host bridge, current _DSM shouldn't be added to it.
read on comment below.
> > @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> > byte_list[0] = 0;
> > buf = aml_buffer(1, byte_list);
> > aml_append(method, aml_return(buf));
> > - aml_append(dev, method);
> > + return method;
> > +}
> > +
> > +static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> > + bool enable_native_pcie_hotplug)
> > +{
> > + aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> > + aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
>
> These two declarations seem to be very much part of the _OSC build though not
> within the the method. I 'think' you get left with them later with no users.
> So move them into the osc build here and they will naturally go away when
> you move to the generic code.
>
> They end up unused in the DSDT at the end of the series.
>
> I ran a quick GPEX + pxb-pcie test and we do get the odd mix that the OSC for
> the GPEX say no native hotplug but the OSC for the PXB allows it.
It's fine for each PXB to have it's own _OSC.
Also current incarnation of ACPI pcihp doesn't support PXBs at all,
it would be wrong to enable the on PXBs.
Thus I'd avoid touching CXL related code paths from this series.
I'm working on extending ACPI pcihp to PXBs
(for the same reason as Eric does for arm/virt, i.e. enable acpi-index support there).
I can add CXL bits then if there is a need/demand for that in CXL land.
[...]
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-05-30 12:05 ` Igor Mammedov
@ 2025-05-30 15:00 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 15:00 UTC (permalink / raw)
To: Igor Mammedov
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 30 May 2025 14:05:16 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> On Fri, 30 May 2025 11:02:27 +0100
> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>
> > On Tue, 27 May 2025 09:40:07 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> > > acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
> > > it appends the _OSC method but in fact it also appends the _DSM method
> > > for the host bridge. Let's split the function into two separate ones
> > > and let them return the method Aml pointer instead. This matches the
> > > way it is done on x86 (build_q35_osc_method). In a subsequent patch
> > > we will replace the gpex method by the q35 implementation that will
> > > become shared between ARM and x86.
> > >
> > > acpi_dsdt_add_host_bridge_methods is a new top helper that generates
> > > both the _OSC and _DSM methods.
> > >
> > > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > > Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> >
> > Makes complete sense. I've had local equivalent of this on the CXL
> > tree for a while as without it we don't register the _DSM for the
> > CXL path (and we should). However, can you modify it a little to
> > make that easier for me? Basically make sure the _DSM is registered
> > for the CXL path as well.
> >
> [...]
> unless CXL is root host bridge, current _DSM shouldn't be added to it.
> read on comment below.
I'm not clear how this is different from pxb-pcie where we do have
the _DSM. Both are pretending to be real host bridges.
>
> > > @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> > > byte_list[0] = 0;
> > > buf = aml_buffer(1, byte_list);
> > > aml_append(method, aml_return(buf));
> > > - aml_append(dev, method);
> > > + return method;
> > > +}
> > > +
> > > +static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> > > + bool enable_native_pcie_hotplug)
> > > +{
> > > + aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> > > + aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> >
> > These two declarations seem to be very much part of the _OSC build though not
> > within the the method. I 'think' you get left with them later with no users.
> > So move them into the osc build here and they will naturally go away when
> > you move to the generic code.
> >
> > They end up unused in the DSDT at the end of the series.
> >
> > I ran a quick GPEX + pxb-pcie test and we do get the odd mix that the OSC for
> > the GPEX say no native hotplug but the OSC for the PXB allows it.
>
> It's fine for each PXB to have it's own _OSC.
> Also current incarnation of ACPI pcihp doesn't support PXBs at all,
> it would be wrong to enable the on PXBs.
>
> Thus I'd avoid touching CXL related code paths from this series.
>
> I'm working on extending ACPI pcihp to PXBs
> (for the same reason as Eric does for arm/virt, i.e. enable acpi-index support there).
> I can add CXL bits then if there is a need/demand for that in CXL land.
Ok. My original motivation for _DSM on CXL was function 5 to stop Linux messing up
the reenumeration which I know has been rejected upstream for a bunch of
compatibility reasons. Anyhow, that's a future problem.
Thanks,
Jonathan
>
> [...]
>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
@ 2025-05-30 15:00 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 15:00 UTC (permalink / raw)
To: Igor Mammedov
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 30 May 2025 14:05:16 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> On Fri, 30 May 2025 11:02:27 +0100
> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>
> > On Tue, 27 May 2025 09:40:07 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> > > acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
> > > it appends the _OSC method but in fact it also appends the _DSM method
> > > for the host bridge. Let's split the function into two separate ones
> > > and let them return the method Aml pointer instead. This matches the
> > > way it is done on x86 (build_q35_osc_method). In a subsequent patch
> > > we will replace the gpex method by the q35 implementation that will
> > > become shared between ARM and x86.
> > >
> > > acpi_dsdt_add_host_bridge_methods is a new top helper that generates
> > > both the _OSC and _DSM methods.
> > >
> > > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > > Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> >
> > Makes complete sense. I've had local equivalent of this on the CXL
> > tree for a while as without it we don't register the _DSM for the
> > CXL path (and we should). However, can you modify it a little to
> > make that easier for me? Basically make sure the _DSM is registered
> > for the CXL path as well.
> >
> [...]
> unless CXL is root host bridge, current _DSM shouldn't be added to it.
> read on comment below.
I'm not clear how this is different from pxb-pcie where we do have
the _DSM. Both are pretending to be real host bridges.
>
> > > @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> > > byte_list[0] = 0;
> > > buf = aml_buffer(1, byte_list);
> > > aml_append(method, aml_return(buf));
> > > - aml_append(dev, method);
> > > + return method;
> > > +}
> > > +
> > > +static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> > > + bool enable_native_pcie_hotplug)
> > > +{
> > > + aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> > > + aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> >
> > These two declarations seem to be very much part of the _OSC build though not
> > within the the method. I 'think' you get left with them later with no users.
> > So move them into the osc build here and they will naturally go away when
> > you move to the generic code.
> >
> > They end up unused in the DSDT at the end of the series.
> >
> > I ran a quick GPEX + pxb-pcie test and we do get the odd mix that the OSC for
> > the GPEX say no native hotplug but the OSC for the PXB allows it.
>
> It's fine for each PXB to have it's own _OSC.
> Also current incarnation of ACPI pcihp doesn't support PXBs at all,
> it would be wrong to enable the on PXBs.
>
> Thus I'd avoid touching CXL related code paths from this series.
>
> I'm working on extending ACPI pcihp to PXBs
> (for the same reason as Eric does for arm/virt, i.e. enable acpi-index support there).
> I can add CXL bits then if there is a need/demand for that in CXL land.
Ok. My original motivation for _DSM on CXL was function 5 to stop Linux messing up
the reenumeration which I know has been rejected upstream for a bunch of
compatibility reasons. Anyhow, that's a future problem.
Thanks,
Jonathan
>
> [...]
>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-05-30 15:00 ` Jonathan Cameron via
(?)
@ 2025-06-02 10:18 ` Igor Mammedov
-1 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-06-02 10:18 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 30 May 2025 16:00:19 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Fri, 30 May 2025 14:05:16 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
> > On Fri, 30 May 2025 11:02:27 +0100
> > Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> >
> > > On Tue, 27 May 2025 09:40:07 +0200
> > > Eric Auger <eric.auger@redhat.com> wrote:
> > >
> > > > acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
> > > > it appends the _OSC method but in fact it also appends the _DSM method
> > > > for the host bridge. Let's split the function into two separate ones
> > > > and let them return the method Aml pointer instead. This matches the
> > > > way it is done on x86 (build_q35_osc_method). In a subsequent patch
> > > > we will replace the gpex method by the q35 implementation that will
> > > > become shared between ARM and x86.
> > > >
> > > > acpi_dsdt_add_host_bridge_methods is a new top helper that generates
> > > > both the _OSC and _DSM methods.
> > > >
> > > > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > > > Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> > >
> > > Makes complete sense. I've had local equivalent of this on the CXL
> > > tree for a while as without it we don't register the _DSM for the
> > > CXL path (and we should). However, can you modify it a little to
> > > make that easier for me? Basically make sure the _DSM is registered
> > > for the CXL path as well.
> > >
> > [...]
> > unless CXL is root host bridge, current _DSM shouldn't be added to it.
> > read on comment below.
>
> I'm not clear how this is different from pxb-pcie where we do have
> the _DSM. Both are pretending to be real host bridges.
there is some space for _OSC consolidation, but it's not realy related to pcihp,
so I'd rather do it as a separate series on top.
current PCI _DSM and _CXL one (build_cxl_dsm_method) are implementing
different namespaces, there is not much to consolidate there.
If later on CXL would need E5C937D0-3553-4D7A-9117-EA4D19C3434D,
then, I'd say do it at that time and use that moment as an opportunity
to consolidate.
> >
> > > > @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> > > > byte_list[0] = 0;
> > > > buf = aml_buffer(1, byte_list);
> > > > aml_append(method, aml_return(buf));
> > > > - aml_append(dev, method);
> > > > + return method;
> > > > +}
> > > > +
> > > > +static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> > > > + bool enable_native_pcie_hotplug)
> > > > +{
> > > > + aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> > > > + aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> > >
> > > These two declarations seem to be very much part of the _OSC build though not
> > > within the the method. I 'think' you get left with them later with no users.
> > > So move them into the osc build here and they will naturally go away when
> > > you move to the generic code.
> > >
> > > They end up unused in the DSDT at the end of the series.
> > >
> > > I ran a quick GPEX + pxb-pcie test and we do get the odd mix that the OSC for
> > > the GPEX say no native hotplug but the OSC for the PXB allows it.
> >
> > It's fine for each PXB to have it's own _OSC.
> > Also current incarnation of ACPI pcihp doesn't support PXBs at all,
> > it would be wrong to enable the on PXBs.
> >
> > Thus I'd avoid touching CXL related code paths from this series.
> >
> > I'm working on extending ACPI pcihp to PXBs
> > (for the same reason as Eric does for arm/virt, i.e. enable acpi-index support there).
> > I can add CXL bits then if there is a need/demand for that in CXL land.
>
> Ok. My original motivation for _DSM on CXL was function 5 to stop Linux messing up
> the reenumeration which I know has been rejected upstream for a bunch of
> compatibility reasons. Anyhow, that's a future problem.
yep, let's worry about merging _DSMs when that future comes.
>
> Thanks,
>
> Jonathan
>
> >
> > [...]
> >
> >
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-05-30 10:02 ` Jonathan Cameron via
(?)
(?)
@ 2025-06-11 12:18 ` Eric Auger
-1 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-06-11 12:18 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan,
On 5/30/25 12:02 PM, Jonathan Cameron wrote:
> On Tue, 27 May 2025 09:40:07 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
>> it appends the _OSC method but in fact it also appends the _DSM method
>> for the host bridge. Let's split the function into two separate ones
>> and let them return the method Aml pointer instead. This matches the
>> way it is done on x86 (build_q35_osc_method). In a subsequent patch
>> we will replace the gpex method by the q35 implementation that will
>> become shared between ARM and x86.
>>
>> acpi_dsdt_add_host_bridge_methods is a new top helper that generates
>> both the _OSC and _DSM methods.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> Makes complete sense. I've had local equivalent of this on the CXL
> tree for a while as without it we don't register the _DSM for the
> CXL path (and we should). However, can you modify it a little to
> make that easier for me? Basically make sure the _DSM is registered
> for the CXL path as well.
>
> One other comment inline.
>
>
>> ---
>> hw/pci-host/gpex-acpi.c | 31 +++++++++++++++++++++----------
>> 1 file changed, 21 insertions(+), 10 deletions(-)
>>
>> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
>> index f34b7cf25e..1aa2d12026 100644
>> --- a/hw/pci-host/gpex-acpi.c
>> +++ b/hw/pci-host/gpex-acpi.c
>> @@ -50,13 +50,10 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
>> }
>> }
>>
>> -static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
>> +static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
>> {
>> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
>> + Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
>>
>> - /* Declare an _OSC (OS Control Handoff) method */
>> - aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
>> - aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
>> method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
>> aml_append(method,
>> aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
>> @@ -103,9 +100,13 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
>> aml_name("CDW1")));
>> aml_append(elsectx, aml_return(aml_arg(3)));
>> aml_append(method, elsectx);
>> - aml_append(dev, method);
>> + return method;
>> +}
>>
>> - method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
>> +static Aml *build_host_bridge_dsm(void)
>> +{
>> + Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
>> + Aml *UUID, *ifctx, *ifctx1, *buf;
>>
>> /* PCI Firmware Specification 3.0
>> * 4.6.1. _DSM for PCI Express Slot Information
>> @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
>> byte_list[0] = 0;
>> buf = aml_buffer(1, byte_list);
>> aml_append(method, aml_return(buf));
>> - aml_append(dev, method);
>> + return method;
>> +}
>> +
>> +static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
>> + bool enable_native_pcie_hotplug)
>> +{
>> + aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
>> + aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> These two declarations seem to be very much part of the _OSC build though not
> within the the method. I 'think' you get left with them later with no users.
> So move them into the osc build here and they will naturally go away when
> you move to the generic code.
>
> They end up unused in the DSDT at the end of the series.
Done
Thanks
Eric
>
> I ran a quick GPEX + pxb-pcie test and we do get the odd mix that the OSC for
> the GPEX say no native hotplug but the OSC for the PXB allows it.
>
>> + /* Declare an _OSC (OS Control Handoff) method */
>> + aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
>> + aml_append(dev, build_host_bridge_dsm());
>> }
>>
>> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> @@ -193,7 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> if (is_cxl) {
>> build_cxl_osc_method(dev);
>> } else {
>> - acpi_dsdt_add_pci_osc(dev, true);
>> + acpi_dsdt_add_host_bridge_methods(dev, true);
> Can you either drop the use of the wrapper for the DSM part here and call
> it unconditionally (for cxl and PCIe cases) or add an extra call to
> aml_append(dev, build_host_bridge_dsm()) for the is_cxl path?
>
>> }
>>
>> aml_append(scope, dev);
>> @@ -268,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> }
>> aml_append(dev, aml_name_decl("_CRS", rbuf));
>>
>> - acpi_dsdt_add_pci_osc(dev, true);
>> + acpi_dsdt_add_host_bridge_methods(dev, true);
>>
>> Aml *dev_res0 = aml_device("%s", "RES0");
>> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-05-30 10:02 ` Jonathan Cameron via
` (2 preceding siblings ...)
(?)
@ 2025-06-11 12:22 ` Eric Auger
-1 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-06-11 12:22 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan
On 5/30/25 12:02 PM, Jonathan Cameron wrote:
> On Tue, 27 May 2025 09:40:07 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
>> it appends the _OSC method but in fact it also appends the _DSM method
>> for the host bridge. Let's split the function into two separate ones
>> and let them return the method Aml pointer instead. This matches the
>> way it is done on x86 (build_q35_osc_method). In a subsequent patch
>> we will replace the gpex method by the q35 implementation that will
>> become shared between ARM and x86.
>>
>> acpi_dsdt_add_host_bridge_methods is a new top helper that generates
>> both the _OSC and _DSM methods.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> Makes complete sense. I've had local equivalent of this on the CXL
> tree for a while as without it we don't register the _DSM for the
> CXL path (and we should). However, can you modify it a little to
> make that easier for me? Basically make sure the _DSM is registered
> for the CXL path as well.
>
> One other comment inline.
>
>
>> ---
>> hw/pci-host/gpex-acpi.c | 31 +++++++++++++++++++++----------
>> 1 file changed, 21 insertions(+), 10 deletions(-)
>>
>> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
>> index f34b7cf25e..1aa2d12026 100644
>> --- a/hw/pci-host/gpex-acpi.c
>> +++ b/hw/pci-host/gpex-acpi.c
>> @@ -50,13 +50,10 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
>> }
>> }
>>
>> -static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
>> +static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
>> {
>> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
>> + Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
>>
>> - /* Declare an _OSC (OS Control Handoff) method */
>> - aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
>> - aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
>> method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
>> aml_append(method,
>> aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
>> @@ -103,9 +100,13 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
>> aml_name("CDW1")));
>> aml_append(elsectx, aml_return(aml_arg(3)));
>> aml_append(method, elsectx);
>> - aml_append(dev, method);
>> + return method;
>> +}
>>
>> - method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
>> +static Aml *build_host_bridge_dsm(void)
>> +{
>> + Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
>> + Aml *UUID, *ifctx, *ifctx1, *buf;
>>
>> /* PCI Firmware Specification 3.0
>> * 4.6.1. _DSM for PCI Express Slot Information
>> @@ -124,7 +125,17 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
>> byte_list[0] = 0;
>> buf = aml_buffer(1, byte_list);
>> aml_append(method, aml_return(buf));
>> - aml_append(dev, method);
>> + return method;
>> +}
>> +
>> +static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
>> + bool enable_native_pcie_hotplug)
>> +{
>> + aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
>> + aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> These two declarations seem to be very much part of the _OSC build though not
> within the the method. I 'think' you get left with them later with no users.
> So move them into the osc build here and they will naturally go away when
> you move to the generic code.
>
> They end up unused in the DSDT at the end of the series.
>
> I ran a quick GPEX + pxb-pcie test and we do get the odd mix that the OSC for
> the GPEX say no native hotplug but the OSC for the PXB allows it.
>
>> + /* Declare an _OSC (OS Control Handoff) method */
>> + aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
>> + aml_append(dev, build_host_bridge_dsm());
>> }
>>
>> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> @@ -193,7 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> if (is_cxl) {
>> build_cxl_osc_method(dev);
>> } else {
>> - acpi_dsdt_add_pci_osc(dev, true);
>> + acpi_dsdt_add_host_bridge_methods(dev, true);
> Can you either drop the use of the wrapper for the DSM part here and call
> it unconditionally (for cxl and PCIe cases) or add an extra call to
> aml_append(dev, build_host_bridge_dsm()) for the is_cxl path?
Given the following discussion between you and Igor, I understand we can
keep the code as is for now. cxl alignment would be done later and also
pxb support might be reworked in near future.
Eric
>
>> }
>>
>> aml_append(scope, dev);
>> @@ -268,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> }
>> aml_append(dev, aml_name_decl("_CRS", rbuf));
>>
>> - acpi_dsdt_add_pci_osc(dev, true);
>> + acpi_dsdt_add_host_bridge_methods(dev, true);
>>
>> Aml *dev_res0 = aml_device("%s", "RES0");
>> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (4 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 05/25] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 12:33 ` Igor Mammedov
2025-05-30 10:14 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 07/25] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method Eric Auger
` (18 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Propagate the type of pci hotplug mode downto the gpex
acpi code. In case machine acpi_pcihp is unset we configure
pci native hotplug on pci0. For expander bridges we keep
legacy pci native hotplug, as done on x86 q35.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
include/hw/pci-host/gpex.h | 1 +
hw/arm/virt-acpi-build.c | 1 +
hw/pci-host/gpex-acpi.c | 3 ++-
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
index 84471533af..feaf827474 100644
--- a/include/hw/pci-host/gpex.h
+++ b/include/hw/pci-host/gpex.h
@@ -45,6 +45,7 @@ struct GPEXConfig {
MemMapEntry pio;
int irq;
PCIBus *bus;
+ bool pci_native_hotplug;
};
typedef struct GPEXIrq GPEXIrq;
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 7e8e0f0298..be5e00a56e 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -129,6 +129,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
.ecam = memmap[ecam_id],
.irq = irq,
.bus = vms->bus,
+ .pci_native_hotplug = !vms->acpi_pcihp,
};
if (vms->highmem_mmio) {
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index 1aa2d12026..f1ab30f3d5 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -204,6 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
if (is_cxl) {
build_cxl_osc_method(dev);
} else {
+ /* pxb bridges do not have ACPI PCI Hot-plug enabled */
acpi_dsdt_add_host_bridge_methods(dev, true);
}
@@ -279,7 +280,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
}
aml_append(dev, aml_name_decl("_CRS", rbuf));
- acpi_dsdt_add_host_bridge_methods(dev, true);
+ acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
Aml *dev_res0 = aml_device("%s", "RES0");
aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
2025-05-27 7:40 ` [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex Eric Auger
@ 2025-05-27 12:33 ` Igor Mammedov
2025-06-11 9:00 ` Eric Auger
2025-05-30 10:14 ` Jonathan Cameron via
1 sibling, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 12:33 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:08 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Propagate the type of pci hotplug mode downto the gpex
> acpi code. In case machine acpi_pcihp is unset we configure
> pci native hotplug on pci0. For expander bridges we keep
> legacy pci native hotplug, as done on x86 q35.
this is not needed if done as suggested in 2/25
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> ---
> include/hw/pci-host/gpex.h | 1 +
> hw/arm/virt-acpi-build.c | 1 +
> hw/pci-host/gpex-acpi.c | 3 ++-
> 3 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
> index 84471533af..feaf827474 100644
> --- a/include/hw/pci-host/gpex.h
> +++ b/include/hw/pci-host/gpex.h
> @@ -45,6 +45,7 @@ struct GPEXConfig {
> MemMapEntry pio;
> int irq;
> PCIBus *bus;
> + bool pci_native_hotplug;
> };
>
> typedef struct GPEXIrq GPEXIrq;
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 7e8e0f0298..be5e00a56e 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -129,6 +129,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> .ecam = memmap[ecam_id],
> .irq = irq,
> .bus = vms->bus,
> + .pci_native_hotplug = !vms->acpi_pcihp,
> };
>
> if (vms->highmem_mmio) {
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 1aa2d12026..f1ab30f3d5 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -204,6 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> + /* pxb bridges do not have ACPI PCI Hot-plug enabled */
> acpi_dsdt_add_host_bridge_methods(dev, true);
> }
>
> @@ -279,7 +280,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_host_bridge_methods(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
2025-05-27 12:33 ` Igor Mammedov
@ 2025-06-11 9:00 ` Eric Auger
2025-06-12 13:25 ` Igor Mammedov
0 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-06-11 9:00 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
Hi Igor,
On 5/27/25 2:33 PM, Igor Mammedov wrote:
> On Tue, 27 May 2025 09:40:08 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Propagate the type of pci hotplug mode downto the gpex
>> acpi code. In case machine acpi_pcihp is unset we configure
>> pci native hotplug on pci0. For expander bridges we keep
>> legacy pci native hotplug, as done on x86 q35.
> this is not needed if done as suggested in 2/25
So since the property would be applied to the GED device we will still
need a patch that retrieves the GED setting and propagate it to the GPEX
device.
Thanks
Eric
>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>> ---
>> include/hw/pci-host/gpex.h | 1 +
>> hw/arm/virt-acpi-build.c | 1 +
>> hw/pci-host/gpex-acpi.c | 3 ++-
>> 3 files changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
>> index 84471533af..feaf827474 100644
>> --- a/include/hw/pci-host/gpex.h
>> +++ b/include/hw/pci-host/gpex.h
>> @@ -45,6 +45,7 @@ struct GPEXConfig {
>> MemMapEntry pio;
>> int irq;
>> PCIBus *bus;
>> + bool pci_native_hotplug;
>> };
>>
>> typedef struct GPEXIrq GPEXIrq;
>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>> index 7e8e0f0298..be5e00a56e 100644
>> --- a/hw/arm/virt-acpi-build.c
>> +++ b/hw/arm/virt-acpi-build.c
>> @@ -129,6 +129,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
>> .ecam = memmap[ecam_id],
>> .irq = irq,
>> .bus = vms->bus,
>> + .pci_native_hotplug = !vms->acpi_pcihp,
>> };
>>
>> if (vms->highmem_mmio) {
>> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
>> index 1aa2d12026..f1ab30f3d5 100644
>> --- a/hw/pci-host/gpex-acpi.c
>> +++ b/hw/pci-host/gpex-acpi.c
>> @@ -204,6 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> if (is_cxl) {
>> build_cxl_osc_method(dev);
>> } else {
>> + /* pxb bridges do not have ACPI PCI Hot-plug enabled */
>> acpi_dsdt_add_host_bridge_methods(dev, true);
>> }
>>
>> @@ -279,7 +280,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> }
>> aml_append(dev, aml_name_decl("_CRS", rbuf));
>>
>> - acpi_dsdt_add_host_bridge_methods(dev, true);
>> + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
>>
>> Aml *dev_res0 = aml_device("%s", "RES0");
>> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
2025-06-11 9:00 ` Eric Auger
@ 2025-06-12 13:25 ` Igor Mammedov
0 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-06-12 13:25 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Wed, 11 Jun 2025 11:00:02 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Hi Igor,
>
> On 5/27/25 2:33 PM, Igor Mammedov wrote:
> > On Tue, 27 May 2025 09:40:08 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> >> Propagate the type of pci hotplug mode downto the gpex
> >> acpi code. In case machine acpi_pcihp is unset we configure
> >> pci native hotplug on pci0. For expander bridges we keep
> >> legacy pci native hotplug, as done on x86 q35.
> > this is not needed if done as suggested in 2/25
> So since the property would be applied to the GED device we will still
> need a patch that retrieves the GED setting and propagate it to the GPEX
> device.
I don't see a need for propagating it to GPEX device itself for ACPI sake.
For ACPI code, what we do in q35 case is fetching
pm->pcihp_bridge_en from acpi_dev(whatever it is) and then
passing it down trough call-chain
build_dsdt->build_q35_osc_method
the only hack that touches GPEX device model, is the need to
wire up root bus to GED, when GED is being created.
So that GED would be able to swap hotplug handler on
an acpi specific one when configured to do so.
> Thanks
>
> Eric
> >
> >> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
[...]
> >> @@ -279,7 +280,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> >> }
> >> aml_append(dev, aml_name_decl("_CRS", rbuf));
> >>
> >> - acpi_dsdt_add_host_bridge_methods(dev, true);
> >> + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
also, having sufficiently forgotten this series context.
It might be better to abandon idea of consolidating osc and dsm methods
in acpi_dsdt_add_host_bridge_methods().
Just looking at above is confusing and forces one to re-rear previous
commits to figure out what acpi_dsdt_add_host_bridge_methods() is doing.
having here separate sequence of
add_osc()
add_dsm()
would be much more readable.
Lets drop acpi_dsdt_add_host_bridge_methods() helper.
> >>
> >> Aml *dev_res0 = aml_device("%s", "RES0");
> >> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
> >
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
2025-05-27 7:40 ` [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex Eric Auger
@ 2025-05-30 10:14 ` Jonathan Cameron via
2025-05-30 10:14 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 10:14 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:08 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Propagate the type of pci hotplug mode downto the gpex
> acpi code. In case machine acpi_pcihp is unset we configure
> pci native hotplug on pci0. For expander bridges we keep
> legacy pci native hotplug, as done on x86 q35.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> ---
> include/hw/pci-host/gpex.h | 1 +
> hw/arm/virt-acpi-build.c | 1 +
> hw/pci-host/gpex-acpi.c | 3 ++-
> 3 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
> index 84471533af..feaf827474 100644
> --- a/include/hw/pci-host/gpex.h
> +++ b/include/hw/pci-host/gpex.h
> @@ -45,6 +45,7 @@ struct GPEXConfig {
> MemMapEntry pio;
> int irq;
> PCIBus *bus;
> + bool pci_native_hotplug;
> };
>
> typedef struct GPEXIrq GPEXIrq;
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 7e8e0f0298..be5e00a56e 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -129,6 +129,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> .ecam = memmap[ecam_id],
> .irq = irq,
> .bus = vms->bus,
> + .pci_native_hotplug = !vms->acpi_pcihp,
> };
>
> if (vms->highmem_mmio) {
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 1aa2d12026..f1ab30f3d5 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -204,6 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> + /* pxb bridges do not have ACPI PCI Hot-plug enabled */
> acpi_dsdt_add_host_bridge_methods(dev, true);
This is awkward but explains why my CXL cases weren't causing trouble.
A mixed config is counter to the recommendation in the PCI firmware spec
"It is recommended that a machine with multiple host bridge devices should
report the same capabilities for all host bridges of the same type and also
negotiate control of the features described in the Control Field in the
same way for all host bridges of the same type"
I guess if any OS isn't coping with the mix then they can request native
hotplug.
> }
>
> @@ -279,7 +280,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_host_bridge_methods(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
@ 2025-05-30 10:14 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 10:14 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:08 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Propagate the type of pci hotplug mode downto the gpex
> acpi code. In case machine acpi_pcihp is unset we configure
> pci native hotplug on pci0. For expander bridges we keep
> legacy pci native hotplug, as done on x86 q35.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> ---
> include/hw/pci-host/gpex.h | 1 +
> hw/arm/virt-acpi-build.c | 1 +
> hw/pci-host/gpex-acpi.c | 3 ++-
> 3 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
> index 84471533af..feaf827474 100644
> --- a/include/hw/pci-host/gpex.h
> +++ b/include/hw/pci-host/gpex.h
> @@ -45,6 +45,7 @@ struct GPEXConfig {
> MemMapEntry pio;
> int irq;
> PCIBus *bus;
> + bool pci_native_hotplug;
> };
>
> typedef struct GPEXIrq GPEXIrq;
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 7e8e0f0298..be5e00a56e 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -129,6 +129,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> .ecam = memmap[ecam_id],
> .irq = irq,
> .bus = vms->bus,
> + .pci_native_hotplug = !vms->acpi_pcihp,
> };
>
> if (vms->highmem_mmio) {
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 1aa2d12026..f1ab30f3d5 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -204,6 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> + /* pxb bridges do not have ACPI PCI Hot-plug enabled */
> acpi_dsdt_add_host_bridge_methods(dev, true);
This is awkward but explains why my CXL cases weren't causing trouble.
A mixed config is counter to the recommendation in the PCI firmware spec
"It is recommended that a machine with multiple host bridge devices should
report the same capabilities for all host bridges of the same type and also
negotiate control of the features described in the Control Field in the
same way for all host bridges of the same type"
I guess if any OS isn't coping with the mix then they can request native
hotplug.
> }
>
> @@ -279,7 +280,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_host_bridge_methods(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
2025-05-30 10:14 ` Jonathan Cameron via
(?)
@ 2025-05-30 12:11 ` Igor Mammedov
-1 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-30 12:11 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 30 May 2025 11:14:13 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Tue, 27 May 2025 09:40:08 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > Propagate the type of pci hotplug mode downto the gpex
> > acpi code. In case machine acpi_pcihp is unset we configure
> > pci native hotplug on pci0. For expander bridges we keep
> > legacy pci native hotplug, as done on x86 q35.
> >
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> > ---
> > include/hw/pci-host/gpex.h | 1 +
> > hw/arm/virt-acpi-build.c | 1 +
> > hw/pci-host/gpex-acpi.c | 3 ++-
> > 3 files changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
> > index 84471533af..feaf827474 100644
> > --- a/include/hw/pci-host/gpex.h
> > +++ b/include/hw/pci-host/gpex.h
> > @@ -45,6 +45,7 @@ struct GPEXConfig {
> > MemMapEntry pio;
> > int irq;
> > PCIBus *bus;
> > + bool pci_native_hotplug;
> > };
> >
> > typedef struct GPEXIrq GPEXIrq;
> > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > index 7e8e0f0298..be5e00a56e 100644
> > --- a/hw/arm/virt-acpi-build.c
> > +++ b/hw/arm/virt-acpi-build.c
> > @@ -129,6 +129,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> > .ecam = memmap[ecam_id],
> > .irq = irq,
> > .bus = vms->bus,
> > + .pci_native_hotplug = !vms->acpi_pcihp,
> > };
> >
> > if (vms->highmem_mmio) {
> > diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> > index 1aa2d12026..f1ab30f3d5 100644
> > --- a/hw/pci-host/gpex-acpi.c
> > +++ b/hw/pci-host/gpex-acpi.c
> > @@ -204,6 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> > if (is_cxl) {
> > build_cxl_osc_method(dev);
> > } else {
> > + /* pxb bridges do not have ACPI PCI Hot-plug enabled */
> > acpi_dsdt_add_host_bridge_methods(dev, true);
>
> This is awkward but explains why my CXL cases weren't causing trouble.
> A mixed config is counter to the recommendation in the PCI firmware spec
>
> "It is recommended that a machine with multiple host bridge devices should
> report the same capabilities for all host bridges of the same type and also
> negotiate control of the features described in the Control Field in the
> same way for all host bridges of the same type"
>
> I guess if any OS isn't coping with the mix then they can request native
> hotplug.
guest should be able to cope with mixed configs,
ACPI pcihp is a crutch and works only for coldplugged bridges,
while hotplugged bridges are handled by native hotplug.
>
>
>
> > }
> >
> > @@ -279,7 +280,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> > }
> > aml_append(dev, aml_name_decl("_CRS", rbuf));
> >
> > - acpi_dsdt_add_host_bridge_methods(dev, true);
> > + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
> >
> > Aml *dev_res0 = aml_device("%s", "RES0");
> > aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
2025-05-30 10:14 ` Jonathan Cameron via
(?)
(?)
@ 2025-06-11 9:13 ` Eric Auger
-1 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-06-11 9:13 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan,
On 5/30/25 12:14 PM, Jonathan Cameron wrote:
> On Tue, 27 May 2025 09:40:08 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Propagate the type of pci hotplug mode downto the gpex
>> acpi code. In case machine acpi_pcihp is unset we configure
>> pci native hotplug on pci0. For expander bridges we keep
>> legacy pci native hotplug, as done on x86 q35.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>> ---
>> include/hw/pci-host/gpex.h | 1 +
>> hw/arm/virt-acpi-build.c | 1 +
>> hw/pci-host/gpex-acpi.c | 3 ++-
>> 3 files changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
>> index 84471533af..feaf827474 100644
>> --- a/include/hw/pci-host/gpex.h
>> +++ b/include/hw/pci-host/gpex.h
>> @@ -45,6 +45,7 @@ struct GPEXConfig {
>> MemMapEntry pio;
>> int irq;
>> PCIBus *bus;
>> + bool pci_native_hotplug;
>> };
>>
>> typedef struct GPEXIrq GPEXIrq;
>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>> index 7e8e0f0298..be5e00a56e 100644
>> --- a/hw/arm/virt-acpi-build.c
>> +++ b/hw/arm/virt-acpi-build.c
>> @@ -129,6 +129,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
>> .ecam = memmap[ecam_id],
>> .irq = irq,
>> .bus = vms->bus,
>> + .pci_native_hotplug = !vms->acpi_pcihp,
>> };
>>
>> if (vms->highmem_mmio) {
>> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
>> index 1aa2d12026..f1ab30f3d5 100644
>> --- a/hw/pci-host/gpex-acpi.c
>> +++ b/hw/pci-host/gpex-acpi.c
>> @@ -204,6 +204,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> if (is_cxl) {
>> build_cxl_osc_method(dev);
>> } else {
>> + /* pxb bridges do not have ACPI PCI Hot-plug enabled */
>> acpi_dsdt_add_host_bridge_methods(dev, true);
> This is awkward but explains why my CXL cases weren't causing trouble.
> A mixed config is counter to the recommendation in the PCI firmware spec
>
> "It is recommended that a machine with multiple host bridge devices should
> report the same capabilities for all host bridges of the same type and also
> negotiate control of the features described in the Control Field in the
> same way for all host bridges of the same type"
Thank for pointing to this spec excerpt.
Maybe the nuance relates to "host bridges of the same type", ie. gpex
versus pxb?
refering to Igor's following reply i will leave it as is. This is
inherited from existing x86 code in
hw/i386/acpi-build.c build_dsdt():
/* Expander bridges do not have ACPI PCI Hot-plug enabled */
aml_append(dev, build_q35_osc_method(true));
Eric
>
> I guess if any OS isn't coping with the mix then they can request native
> hotplug.
>
>
>
>> }
>>
>> @@ -279,7 +280,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
>> }
>> aml_append(dev, aml_name_decl("_CRS", rbuf));
>>
>> - acpi_dsdt_add_host_bridge_methods(dev, true);
>> + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
>>
>> Aml *dev_res0 = aml_device("%s", "RES0");
>> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 07/25] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (5 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 06/25] hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 12:35 ` Igor Mammedov
2025-05-27 7:40 ` [PATCH v2 08/25] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Eric Auger
` (17 subsequent siblings)
24 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
GPEX acpi_dsdt_add_pci_osc() does basically the same as
build_q35_osc_method().
Rename build_q35_osc_method() into build_pci_host_bridge_osc_method()
and move it into hw/acpi/aml-build.c. In a subsequent patch we will
use this later in place of acpi_dsdt_add_pci_osc().
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
include/hw/acpi/aml-build.h | 2 ++
hw/acpi/aml-build.c | 50 ++++++++++++++++++++++++++++++++++
hw/i386/acpi-build.c | 54 ++-----------------------------------
3 files changed, 54 insertions(+), 52 deletions(-)
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index c18f681342..177d60b414 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -508,4 +508,6 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
void build_spcr(GArray *table_data, BIOSLinker *linker,
const AcpiSpcrData *f, const uint8_t rev,
const char *oem_id, const char *oem_table_id, const char *name);
+
+Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug);
#endif
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index f8f93a9f66..ba1dfe0b52 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -2614,3 +2614,53 @@ Aml *aml_i2c_serial_bus_device(uint16_t address, const char *resource_source)
return var;
}
+
+Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug)
+{
+ Aml *if_ctx;
+ Aml *if_ctx2;
+ Aml *else_ctx;
+ Aml *method;
+ Aml *a_cwd1 = aml_name("CDW1");
+ Aml *a_ctrl = aml_local(0);
+
+ method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
+ aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
+
+ if_ctx = aml_if(aml_equal(
+ aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766")));
+ aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
+ aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
+
+ aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl));
+
+ /*
+ * Always allow native PME, AER (no dependencies)
+ * Allow SHPC (PCI bridges can have SHPC controller)
+ * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled.
+ */
+ aml_append(if_ctx, aml_and(a_ctrl,
+ aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl));
+
+ if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
+ /* Unknown revision */
+ aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1));
+ aml_append(if_ctx, if_ctx2);
+
+ if_ctx2 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl)));
+ /* Capabilities bits were masked */
+ aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1));
+ aml_append(if_ctx, if_ctx2);
+
+ /* Update DWORD3 in the buffer */
+ aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3")));
+ aml_append(method, if_ctx);
+
+ else_ctx = aml_else();
+ /* Unrecognized UUID */
+ aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1));
+ aml_append(method, else_ctx);
+
+ aml_append(method, aml_return(aml_arg(3)));
+ return method;
+}
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 4f8572eebe..91945f716c 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1111,56 +1111,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfgInfo *mcfg)
return dev;
}
-static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug)
-{
- Aml *if_ctx;
- Aml *if_ctx2;
- Aml *else_ctx;
- Aml *method;
- Aml *a_cwd1 = aml_name("CDW1");
- Aml *a_ctrl = aml_local(0);
-
- method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
- aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
-
- if_ctx = aml_if(aml_equal(
- aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766")));
- aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
- aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
-
- aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl));
-
- /*
- * Always allow native PME, AER (no dependencies)
- * Allow SHPC (PCI bridges can have SHPC controller)
- * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled.
- */
- aml_append(if_ctx, aml_and(a_ctrl,
- aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl));
-
- if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
- /* Unknown revision */
- aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1));
- aml_append(if_ctx, if_ctx2);
-
- if_ctx2 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl)));
- /* Capabilities bits were masked */
- aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1));
- aml_append(if_ctx, if_ctx2);
-
- /* Update DWORD3 in the buffer */
- aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3")));
- aml_append(method, if_ctx);
-
- else_ctx = aml_else();
- /* Unrecognized UUID */
- aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1));
- aml_append(method, else_ctx);
-
- aml_append(method, aml_return(aml_arg(3)));
- return method;
-}
-
static void build_acpi0017(Aml *table)
{
Aml *dev, *scope, *method;
@@ -1231,7 +1181,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
- aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en));
+ aml_append(dev, build_pci_host_bridge_osc_method(!pm->pcihp_bridge_en));
aml_append(dev, aml_pci_edsm());
aml_append(sb_scope, dev);
if (mcfg_valid) {
@@ -1353,7 +1303,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
/* Expander bridges do not have ACPI PCI Hot-plug enabled */
- aml_append(dev, build_q35_osc_method(true));
+ aml_append(dev, build_pci_host_bridge_osc_method(true));
} else {
aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
}
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 07/25] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
2025-05-27 7:40 ` [PATCH v2 07/25] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method Eric Auger
@ 2025-05-27 12:35 ` Igor Mammedov
0 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 12:35 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:09 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> GPEX acpi_dsdt_add_pci_osc() does basically the same as
> build_q35_osc_method().
>
> Rename build_q35_osc_method() into build_pci_host_bridge_osc_method()
> and move it into hw/acpi/aml-build.c. In a subsequent patch we will
> use this later in place of acpi_dsdt_add_pci_osc().
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> ---
> include/hw/acpi/aml-build.h | 2 ++
> hw/acpi/aml-build.c | 50 ++++++++++++++++++++++++++++++++++
> hw/i386/acpi-build.c | 54 ++-----------------------------------
> 3 files changed, 54 insertions(+), 52 deletions(-)
>
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index c18f681342..177d60b414 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -508,4 +508,6 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
> void build_spcr(GArray *table_data, BIOSLinker *linker,
> const AcpiSpcrData *f, const uint8_t rev,
> const char *oem_id, const char *oem_table_id, const char *name);
> +
> +Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug);
> #endif
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
I'd suggest to use hw/acpi/pci.c for PCI stuff instead of generic aml-build.c
> index f8f93a9f66..ba1dfe0b52 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -2614,3 +2614,53 @@ Aml *aml_i2c_serial_bus_device(uint16_t address, const char *resource_source)
>
> return var;
> }
> +
> +Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug)
> +{
> + Aml *if_ctx;
> + Aml *if_ctx2;
> + Aml *else_ctx;
> + Aml *method;
> + Aml *a_cwd1 = aml_name("CDW1");
> + Aml *a_ctrl = aml_local(0);
> +
> + method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> + aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> +
> + if_ctx = aml_if(aml_equal(
> + aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766")));
> + aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
> + aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> +
> + aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl));
> +
> + /*
> + * Always allow native PME, AER (no dependencies)
> + * Allow SHPC (PCI bridges can have SHPC controller)
> + * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled.
> + */
> + aml_append(if_ctx, aml_and(a_ctrl,
> + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl));
> +
> + if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
> + /* Unknown revision */
> + aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1));
> + aml_append(if_ctx, if_ctx2);
> +
> + if_ctx2 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl)));
> + /* Capabilities bits were masked */
> + aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1));
> + aml_append(if_ctx, if_ctx2);
> +
> + /* Update DWORD3 in the buffer */
> + aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3")));
> + aml_append(method, if_ctx);
> +
> + else_ctx = aml_else();
> + /* Unrecognized UUID */
> + aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1));
> + aml_append(method, else_ctx);
> +
> + aml_append(method, aml_return(aml_arg(3)));
> + return method;
> +}
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 4f8572eebe..91945f716c 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1111,56 +1111,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfgInfo *mcfg)
> return dev;
> }
>
> -static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug)
> -{
> - Aml *if_ctx;
> - Aml *if_ctx2;
> - Aml *else_ctx;
> - Aml *method;
> - Aml *a_cwd1 = aml_name("CDW1");
> - Aml *a_ctrl = aml_local(0);
> -
> - method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> - aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> -
> - if_ctx = aml_if(aml_equal(
> - aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766")));
> - aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
> - aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> -
> - aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl));
> -
> - /*
> - * Always allow native PME, AER (no dependencies)
> - * Allow SHPC (PCI bridges can have SHPC controller)
> - * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled.
> - */
> - aml_append(if_ctx, aml_and(a_ctrl,
> - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl));
> -
> - if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
> - /* Unknown revision */
> - aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1));
> - aml_append(if_ctx, if_ctx2);
> -
> - if_ctx2 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl)));
> - /* Capabilities bits were masked */
> - aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1));
> - aml_append(if_ctx, if_ctx2);
> -
> - /* Update DWORD3 in the buffer */
> - aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3")));
> - aml_append(method, if_ctx);
> -
> - else_ctx = aml_else();
> - /* Unrecognized UUID */
> - aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1));
> - aml_append(method, else_ctx);
> -
> - aml_append(method, aml_return(aml_arg(3)));
> - return method;
> -}
> -
> static void build_acpi0017(Aml *table)
> {
> Aml *dev, *scope, *method;
> @@ -1231,7 +1181,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
> aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
> aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
> - aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en));
> + aml_append(dev, build_pci_host_bridge_osc_method(!pm->pcihp_bridge_en));
> aml_append(dev, aml_pci_edsm());
> aml_append(sb_scope, dev);
> if (mcfg_valid) {
> @@ -1353,7 +1303,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
>
> /* Expander bridges do not have ACPI PCI Hot-plug enabled */
> - aml_append(dev, build_q35_osc_method(true));
> + aml_append(dev, build_pci_host_bridge_osc_method(true));
> } else {
> aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
> }
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 08/25] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (6 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 07/25] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 12:38 ` Igor Mammedov
2025-05-27 7:40 ` [PATCH v2 09/25] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Eric Auger
` (16 subsequent siblings)
24 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
From: Gustavo Romero <gustavo.romero@linaro.org>
This commit adds DSDT blobs to the whilelist in the prospect to
allow changes in the GPEX _OSC method.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..abe00ad4ee 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,6 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/aarch64/virt/DSDT",
+"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
+"tests/data/acpi/aarch64/virt/DSDT.memhp",
+"tests/data/acpi/aarch64/virt/DSDT.pxb",
+"tests/data/acpi/aarch64/virt/DSDT.topology",
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 08/25] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table
2025-05-27 7:40 ` [PATCH v2 08/25] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Eric Auger
@ 2025-05-27 12:38 ` Igor Mammedov
2025-05-27 13:03 ` Igor Mammedov
0 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 12:38 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:10 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> From: Gustavo Romero <gustavo.romero@linaro.org>
>
> This commit adds DSDT blobs to the whilelist in the prospect to
> allow changes in the GPEX _OSC method.
>
> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> index dfb8523c8b..abe00ad4ee 100644
> --- a/tests/qtest/bios-tables-test-allowed-diff.h
> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> @@ -1 +1,6 @@
> /* List of comma-separated changed AML files to ignore */
> +"tests/data/acpi/aarch64/virt/DSDT",
> +"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
> +"tests/data/acpi/aarch64/virt/DSDT.memhp",
> +"tests/data/acpi/aarch64/virt/DSDT.pxb",
> +"tests/data/acpi/aarch64/virt/DSDT.topology",
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 08/25] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table
2025-05-27 12:38 ` Igor Mammedov
@ 2025-05-27 13:03 ` Igor Mammedov
2025-06-02 5:45 ` Gustavo Romero
0 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 13:03 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 14:38:16 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> On Tue, 27 May 2025 09:40:10 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > From: Gustavo Romero <gustavo.romero@linaro.org>
> >
> > This commit adds DSDT blobs to the whilelist in the prospect to
> > allow changes in the GPEX _OSC method.
> >
> > Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
I take it back,
test with x86 enabled breaks on microvm,
so it's missing some DSTDs here
>
> > ---
> > tests/qtest/bios-tables-test-allowed-diff.h | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> > index dfb8523c8b..abe00ad4ee 100644
> > --- a/tests/qtest/bios-tables-test-allowed-diff.h
> > +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> > @@ -1 +1,6 @@
> > /* List of comma-separated changed AML files to ignore */
> > +"tests/data/acpi/aarch64/virt/DSDT",
> > +"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
> > +"tests/data/acpi/aarch64/virt/DSDT.memhp",
> > +"tests/data/acpi/aarch64/virt/DSDT.pxb",
> > +"tests/data/acpi/aarch64/virt/DSDT.topology",
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 08/25] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table
2025-05-27 13:03 ` Igor Mammedov
@ 2025-06-02 5:45 ` Gustavo Romero
2025-06-11 9:45 ` Eric Auger
0 siblings, 1 reply; 121+ messages in thread
From: Gustavo Romero @ 2025-06-02 5:45 UTC (permalink / raw)
To: Igor Mammedov, Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, anisinha,
mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Igor and Eric,
On 5/27/25 10:03, Igor Mammedov wrote:
> On Tue, 27 May 2025 14:38:16 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
>> On Tue, 27 May 2025 09:40:10 +0200
>> Eric Auger <eric.auger@redhat.com> wrote:
>>
>>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>>
>>> This commit adds DSDT blobs to the whilelist in the prospect to
>>> allow changes in the GPEX _OSC method.
>>>
>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>
>> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> I take it back,
>
> test with x86 enabled breaks on microvm,
> so it's missing some DSTDs here
It's fixed in the series I've just posted in 24/25 as we discuss it. Thanks.
Cheers,
Gustavo
>
>>
>>> ---
>>> tests/qtest/bios-tables-test-allowed-diff.h | 5 +++++
>>> 1 file changed, 5 insertions(+)
>>>
>>> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
>>> index dfb8523c8b..abe00ad4ee 100644
>>> --- a/tests/qtest/bios-tables-test-allowed-diff.h
>>> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
>>> @@ -1 +1,6 @@
>>> /* List of comma-separated changed AML files to ignore */
>>> +"tests/data/acpi/aarch64/virt/DSDT",
>>> +"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
>>> +"tests/data/acpi/aarch64/virt/DSDT.memhp",
>>> +"tests/data/acpi/aarch64/virt/DSDT.pxb",
>>> +"tests/data/acpi/aarch64/virt/DSDT.topology",
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 08/25] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table
2025-06-02 5:45 ` Gustavo Romero
@ 2025-06-11 9:45 ` Eric Auger
0 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-06-11 9:45 UTC (permalink / raw)
To: Gustavo Romero, Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, anisinha,
mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Gustavo,
On 6/2/25 7:45 AM, Gustavo Romero wrote:
> Hi Igor and Eric,
>
> On 5/27/25 10:03, Igor Mammedov wrote:
>> On Tue, 27 May 2025 14:38:16 +0200
>> Igor Mammedov <imammedo@redhat.com> wrote:
>>
>>> On Tue, 27 May 2025 09:40:10 +0200
>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>>>
>>>> This commit adds DSDT blobs to the whilelist in the prospect to
>>>> allow changes in the GPEX _OSC method.
>>>>
>>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>
>>> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>> I take it back,
>>
>> test with x86 enabled breaks on microvm,
>> so it's missing some DSTDs here
>
> It's fixed in the series I've just posted in 24/25 as we discuss it.
> Thanks.
thanks! picked up your modification
Eric
>
>
> Cheers,
> Gustavo
>
>>
>>>
>>>> ---
>>>> tests/qtest/bios-tables-test-allowed-diff.h | 5 +++++
>>>> 1 file changed, 5 insertions(+)
>>>>
>>>> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
>>>> b/tests/qtest/bios-tables-test-allowed-diff.h
>>>> index dfb8523c8b..abe00ad4ee 100644
>>>> --- a/tests/qtest/bios-tables-test-allowed-diff.h
>>>> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
>>>> @@ -1 +1,6 @@
>>>> /* List of comma-separated changed AML files to ignore */
>>>> +"tests/data/acpi/aarch64/virt/DSDT",
>>>> +"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
>>>> +"tests/data/acpi/aarch64/virt/DSDT.memhp",
>>>> +"tests/data/acpi/aarch64/virt/DSDT.pxb",
>>>> +"tests/data/acpi/aarch64/virt/DSDT.topology",
>>>
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 09/25] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (7 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 08/25] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 13:04 ` Igor Mammedov
2025-05-30 10:05 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 10/25] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Eric Auger
` (15 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
gpex build_host_bridge_osc() and x86 originated
build_pci_host_bridge_osc_method() are mostly identical.
In GPEX, SUPP is set to CDW2 but is not further used. CTRL
is same as Local0.
So let gpex code reuse build_pci_host_bridge_osc_method()
and remove build_host_bridge_osc().
The disassembled DSDT difference is given below:
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001A4F (6735)
+ * Length 0x00001A35 (6709)
* Revision 0x02
- * Checksum 0xBF
+ * Checksum 0xDD
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
@@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
- SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
- CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
- CTRL &= 0x1F
+ Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
+ Local0 &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
}
- If ((CDW3 != CTRL))
+ If ((CDW3 != Local0))
{
CDW1 |= 0x10
}
- CDW3 = CTRL /* \_SB_.PCI0.CTRL */
- Return (Arg3)
+ CDW3 = Local0
}
Else
{
CDW1 |= 0x04
- Return (Arg3)
}
+
+ Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v1 -> v2:
- move in the dsdt.dsl diff in the commit message and remove useless
info (Gustavi, Michael)
---
hw/pci-host/gpex-acpi.c | 60 +++--------------------------------------
1 file changed, 4 insertions(+), 56 deletions(-)
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index f1ab30f3d5..98c9868c3f 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -50,60 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
}
}
-static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
-{
- Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
-
- method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
- aml_append(method,
- aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
-
- /* PCI Firmware Specification 3.0
- * 4.5.1. _OSC Interface for PCI Host Bridge Devices
- * The _OSC interface for a PCI/PCI-X/PCI Express hierarchy is
- * identified by the Universal Unique IDentifier (UUID)
- * 33DB4D5B-1FF7-401C-9657-7441C03DD766
- */
- UUID = aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766");
- ifctx = aml_if(aml_equal(aml_arg(0), UUID));
- aml_append(ifctx,
- aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
- aml_append(ifctx,
- aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
- aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
- aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
-
- /*
- * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
- * and PCIeHotplug depending on enable_native_pcie_hotplug
- */
- aml_append(ifctx, aml_and(aml_name("CTRL"),
- aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
- aml_name("CTRL")));
-
- ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
- aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
- aml_name("CDW1")));
- aml_append(ifctx, ifctx1);
-
- ifctx1 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL"))));
- aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10),
- aml_name("CDW1")));
- aml_append(ifctx, ifctx1);
-
- aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3")));
- aml_append(ifctx, aml_return(aml_arg(3)));
- aml_append(method, ifctx);
-
- elsectx = aml_else();
- aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4),
- aml_name("CDW1")));
- aml_append(elsectx, aml_return(aml_arg(3)));
- aml_append(method, elsectx);
- return method;
-}
-
-static Aml *build_host_bridge_dsm(void)
+static Aml *build_pci_host_bridge_dsm_method(void)
{
Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
Aml *UUID, *ifctx, *ifctx1, *buf;
@@ -134,8 +81,9 @@ static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
/* Declare an _OSC (OS Control Handoff) method */
- aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
- aml_append(dev, build_host_bridge_dsm());
+ aml_append(dev,
+ build_pci_host_bridge_osc_method(enable_native_pcie_hotplug));
+ aml_append(dev, build_pci_host_bridge_dsm_method());
}
void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 09/25] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method
2025-05-27 7:40 ` [PATCH v2 09/25] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Eric Auger
@ 2025-05-27 13:04 ` Igor Mammedov
2025-05-30 10:05 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 13:04 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:11 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> gpex build_host_bridge_osc() and x86 originated
> build_pci_host_bridge_osc_method() are mostly identical.
>
> In GPEX, SUPP is set to CDW2 but is not further used. CTRL
> is same as Local0.
>
> So let gpex code reuse build_pci_host_bridge_osc_method()
> and remove build_host_bridge_osc().
>
> The disassembled DSDT difference is given below:
>
> * Original Table Header:
> * Signature "DSDT"
> - * Length 0x00001A4F (6735)
> + * Length 0x00001A35 (6709)
> * Revision 0x02
> - * Checksum 0xBF
> + * Checksum 0xDD
> * OEM ID "BOCHS "
> * OEM Table ID "BXPC "
> * OEM Revision 0x00000001 (1)
> @@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
> {
> CreateDWordField (Arg3, 0x04, CDW2)
> CreateDWordField (Arg3, 0x08, CDW3)
> - SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
> - CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> - CTRL &= 0x1F
> + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> + Local0 &= 0x1F
> If ((Arg1 != One))
> {
> CDW1 |= 0x08
> }
>
> - If ((CDW3 != CTRL))
> + If ((CDW3 != Local0))
> {
> CDW1 |= 0x10
> }
>
> - CDW3 = CTRL /* \_SB_.PCI0.CTRL */
> - Return (Arg3)
> + CDW3 = Local0
> }
> Else
> {
> CDW1 |= 0x04
> - Return (Arg3)
> }
> +
> + Return (Arg3)
> }
>
> Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> ---
>
> v1 -> v2:
> - move in the dsdt.dsl diff in the commit message and remove useless
> info (Gustavi, Michael)
> ---
> hw/pci-host/gpex-acpi.c | 60 +++--------------------------------------
> 1 file changed, 4 insertions(+), 56 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index f1ab30f3d5..98c9868c3f 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,60 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
> -{
> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
> -
> - method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> - aml_append(method,
> - aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> -
> - /* PCI Firmware Specification 3.0
> - * 4.5.1. _OSC Interface for PCI Host Bridge Devices
> - * The _OSC interface for a PCI/PCI-X/PCI Express hierarchy is
> - * identified by the Universal Unique IDentifier (UUID)
> - * 33DB4D5B-1FF7-401C-9657-7441C03DD766
> - */
> - UUID = aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766");
> - ifctx = aml_if(aml_equal(aml_arg(0), UUID));
> - aml_append(ifctx,
> - aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
> - aml_append(ifctx,
> - aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> - aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> - aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> -
> - /*
> - * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
> - * and PCIeHotplug depending on enable_native_pcie_hotplug
> - */
> - aml_append(ifctx, aml_and(aml_name("CTRL"),
> - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
> - aml_name("CTRL")));
> -
> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
> - aml_name("CDW1")));
> - aml_append(ifctx, ifctx1);
> -
> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL"))));
> - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10),
> - aml_name("CDW1")));
> - aml_append(ifctx, ifctx1);
> -
> - aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3")));
> - aml_append(ifctx, aml_return(aml_arg(3)));
> - aml_append(method, ifctx);
> -
> - elsectx = aml_else();
> - aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4),
> - aml_name("CDW1")));
> - aml_append(elsectx, aml_return(aml_arg(3)));
> - aml_append(method, elsectx);
> - return method;
> -}
> -
> -static Aml *build_host_bridge_dsm(void)
> +static Aml *build_pci_host_bridge_dsm_method(void)
> {
> Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> Aml *UUID, *ifctx, *ifctx1, *buf;
> @@ -134,8 +81,9 @@ static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> /* Declare an _OSC (OS Control Handoff) method */
> - aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
> - aml_append(dev, build_host_bridge_dsm());
> + aml_append(dev,
> + build_pci_host_bridge_osc_method(enable_native_pcie_hotplug));
> + aml_append(dev, build_pci_host_bridge_dsm_method());
> }
>
> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 09/25] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method
2025-05-27 7:40 ` [PATCH v2 09/25] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Eric Auger
@ 2025-05-30 10:05 ` Jonathan Cameron via
2025-05-30 10:05 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 10:05 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:11 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> gpex build_host_bridge_osc() and x86 originated
> build_pci_host_bridge_osc_method() are mostly identical.
>
> In GPEX, SUPP is set to CDW2 but is not further used. CTRL
> is same as Local0.
>
> So let gpex code reuse build_pci_host_bridge_osc_method()
> and remove build_host_bridge_osc().
>
> The disassembled DSDT difference is given below:
>
> * Original Table Header:
> * Signature "DSDT"
> - * Length 0x00001A4F (6735)
> + * Length 0x00001A35 (6709)
> * Revision 0x02
> - * Checksum 0xBF
> + * Checksum 0xDD
> * OEM ID "BOCHS "
> * OEM Table ID "BXPC "
> * OEM Revision 0x00000001 (1)
> @@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
> {
> CreateDWordField (Arg3, 0x04, CDW2)
> CreateDWordField (Arg3, 0x08, CDW3)
> - SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
> - CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> - CTRL &= 0x1F
> + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> + Local0 &= 0x1F
> If ((Arg1 != One))
> {
> CDW1 |= 0x08
> }
>
> - If ((CDW3 != CTRL))
> + If ((CDW3 != Local0))
> {
> CDW1 |= 0x10
> }
>
> - CDW3 = CTRL /* \_SB_.PCI0.CTRL */
> - Return (Arg3)
> + CDW3 = Local0
> }
> Else
> {
> CDW1 |= 0x04
> - Return (Arg3)
> }
> +
> + Return (Arg3)
> }
>
> Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
>
> v1 -> v2:
> - move in the dsdt.dsl diff in the commit message and remove useless
> info (Gustavi, Michael)
> ---
> hw/pci-host/gpex-acpi.c | 60 +++--------------------------------------
> 1 file changed, 4 insertions(+), 56 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index f1ab30f3d5..98c9868c3f 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,60 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
> -{
> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
> -
> - method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> - aml_append(method,
> - aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> -
> - /* PCI Firmware Specification 3.0
> - * 4.5.1. _OSC Interface for PCI Host Bridge Devices
> - * The _OSC interface for a PCI/PCI-X/PCI Express hierarchy is
> - * identified by the Universal Unique IDentifier (UUID)
> - * 33DB4D5B-1FF7-401C-9657-7441C03DD766
> - */
> - UUID = aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766");
> - ifctx = aml_if(aml_equal(aml_arg(0), UUID));
> - aml_append(ifctx,
> - aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
> - aml_append(ifctx,
> - aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> - aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> - aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> -
> - /*
> - * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
> - * and PCIeHotplug depending on enable_native_pcie_hotplug
> - */
> - aml_append(ifctx, aml_and(aml_name("CTRL"),
> - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
> - aml_name("CTRL")));
> -
> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
> - aml_name("CDW1")));
> - aml_append(ifctx, ifctx1);
> -
> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL"))));
> - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10),
> - aml_name("CDW1")));
> - aml_append(ifctx, ifctx1);
> -
> - aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3")));
> - aml_append(ifctx, aml_return(aml_arg(3)));
> - aml_append(method, ifctx);
> -
> - elsectx = aml_else();
> - aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4),
> - aml_name("CDW1")));
> - aml_append(elsectx, aml_return(aml_arg(3)));
> - aml_append(method, elsectx);
> - return method;
> -}
> -
> -static Aml *build_host_bridge_dsm(void)
> +static Aml *build_pci_host_bridge_dsm_method(void)
> {
> Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> Aml *UUID, *ifctx, *ifctx1, *buf;
> @@ -134,8 +81,9 @@ static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
This is where they become unused I think...
> /* Declare an _OSC (OS Control Handoff) method */
> - aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
> - aml_append(dev, build_host_bridge_dsm());
> + aml_append(dev,
> + build_pci_host_bridge_osc_method(enable_native_pcie_hotplug));
> + aml_append(dev, build_pci_host_bridge_dsm_method());
> }
>
> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 09/25] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method
@ 2025-05-30 10:05 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 10:05 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:11 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> gpex build_host_bridge_osc() and x86 originated
> build_pci_host_bridge_osc_method() are mostly identical.
>
> In GPEX, SUPP is set to CDW2 but is not further used. CTRL
> is same as Local0.
>
> So let gpex code reuse build_pci_host_bridge_osc_method()
> and remove build_host_bridge_osc().
>
> The disassembled DSDT difference is given below:
>
> * Original Table Header:
> * Signature "DSDT"
> - * Length 0x00001A4F (6735)
> + * Length 0x00001A35 (6709)
> * Revision 0x02
> - * Checksum 0xBF
> + * Checksum 0xDD
> * OEM ID "BOCHS "
> * OEM Table ID "BXPC "
> * OEM Revision 0x00000001 (1)
> @@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
> {
> CreateDWordField (Arg3, 0x04, CDW2)
> CreateDWordField (Arg3, 0x08, CDW3)
> - SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
> - CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> - CTRL &= 0x1F
> + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> + Local0 &= 0x1F
> If ((Arg1 != One))
> {
> CDW1 |= 0x08
> }
>
> - If ((CDW3 != CTRL))
> + If ((CDW3 != Local0))
> {
> CDW1 |= 0x10
> }
>
> - CDW3 = CTRL /* \_SB_.PCI0.CTRL */
> - Return (Arg3)
> + CDW3 = Local0
> }
> Else
> {
> CDW1 |= 0x04
> - Return (Arg3)
> }
> +
> + Return (Arg3)
> }
>
> Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
>
> v1 -> v2:
> - move in the dsdt.dsl diff in the commit message and remove useless
> info (Gustavi, Michael)
> ---
> hw/pci-host/gpex-acpi.c | 60 +++--------------------------------------
> 1 file changed, 4 insertions(+), 56 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index f1ab30f3d5..98c9868c3f 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,60 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
> -{
> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
> -
> - method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> - aml_append(method,
> - aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> -
> - /* PCI Firmware Specification 3.0
> - * 4.5.1. _OSC Interface for PCI Host Bridge Devices
> - * The _OSC interface for a PCI/PCI-X/PCI Express hierarchy is
> - * identified by the Universal Unique IDentifier (UUID)
> - * 33DB4D5B-1FF7-401C-9657-7441C03DD766
> - */
> - UUID = aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766");
> - ifctx = aml_if(aml_equal(aml_arg(0), UUID));
> - aml_append(ifctx,
> - aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
> - aml_append(ifctx,
> - aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> - aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> - aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> -
> - /*
> - * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
> - * and PCIeHotplug depending on enable_native_pcie_hotplug
> - */
> - aml_append(ifctx, aml_and(aml_name("CTRL"),
> - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
> - aml_name("CTRL")));
> -
> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
> - aml_name("CDW1")));
> - aml_append(ifctx, ifctx1);
> -
> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL"))));
> - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10),
> - aml_name("CDW1")));
> - aml_append(ifctx, ifctx1);
> -
> - aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3")));
> - aml_append(ifctx, aml_return(aml_arg(3)));
> - aml_append(method, ifctx);
> -
> - elsectx = aml_else();
> - aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4),
> - aml_name("CDW1")));
> - aml_append(elsectx, aml_return(aml_arg(3)));
> - aml_append(method, elsectx);
> - return method;
> -}
> -
> -static Aml *build_host_bridge_dsm(void)
> +static Aml *build_pci_host_bridge_dsm_method(void)
> {
> Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> Aml *UUID, *ifctx, *ifctx1, *buf;
> @@ -134,8 +81,9 @@ static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
This is where they become unused I think...
> /* Declare an _OSC (OS Control Handoff) method */
> - aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
> - aml_append(dev, build_host_bridge_dsm());
> + aml_append(dev,
> + build_pci_host_bridge_osc_method(enable_native_pcie_hotplug));
> + aml_append(dev, build_pci_host_bridge_dsm_method());
> }
>
> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 09/25] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method
2025-05-30 10:05 ` Jonathan Cameron via
(?)
@ 2025-06-11 12:25 ` Eric Auger
-1 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-06-11 12:25 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On 5/30/25 12:05 PM, Jonathan Cameron wrote:
> On Tue, 27 May 2025 09:40:11 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> gpex build_host_bridge_osc() and x86 originated
>> build_pci_host_bridge_osc_method() are mostly identical.
>>
>> In GPEX, SUPP is set to CDW2 but is not further used. CTRL
>> is same as Local0.
>>
>> So let gpex code reuse build_pci_host_bridge_osc_method()
>> and remove build_host_bridge_osc().
>>
>> The disassembled DSDT difference is given below:
>>
>> * Original Table Header:
>> * Signature "DSDT"
>> - * Length 0x00001A4F (6735)
>> + * Length 0x00001A35 (6709)
>> * Revision 0x02
>> - * Checksum 0xBF
>> + * Checksum 0xDD
>> * OEM ID "BOCHS "
>> * OEM Table ID "BXPC "
>> * OEM Revision 0x00000001 (1)
>> @@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
>> {
>> CreateDWordField (Arg3, 0x04, CDW2)
>> CreateDWordField (Arg3, 0x08, CDW3)
>> - SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
>> - CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
>> - CTRL &= 0x1F
>> + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
>> + Local0 &= 0x1F
>> If ((Arg1 != One))
>> {
>> CDW1 |= 0x08
>> }
>>
>> - If ((CDW3 != CTRL))
>> + If ((CDW3 != Local0))
>> {
>> CDW1 |= 0x10
>> }
>>
>> - CDW3 = CTRL /* \_SB_.PCI0.CTRL */
>> - Return (Arg3)
>> + CDW3 = Local0
>> }
>> Else
>> {
>> CDW1 |= 0x04
>> - Return (Arg3)
>> }
>> +
>> + Return (Arg3)
>> }
>>
>> Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>
>> ---
>>
>> v1 -> v2:
>> - move in the dsdt.dsl diff in the commit message and remove useless
>> info (Gustavi, Michael)
>> ---
>> hw/pci-host/gpex-acpi.c | 60 +++--------------------------------------
>> 1 file changed, 4 insertions(+), 56 deletions(-)
>>
>> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
>> index f1ab30f3d5..98c9868c3f 100644
>> --- a/hw/pci-host/gpex-acpi.c
>> +++ b/hw/pci-host/gpex-acpi.c
>> @@ -50,60 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
>> }
>> }
>>
>> -static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
>> -{
>> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
>> -
>> - method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
>> - aml_append(method,
>> - aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
>> -
>> - /* PCI Firmware Specification 3.0
>> - * 4.5.1. _OSC Interface for PCI Host Bridge Devices
>> - * The _OSC interface for a PCI/PCI-X/PCI Express hierarchy is
>> - * identified by the Universal Unique IDentifier (UUID)
>> - * 33DB4D5B-1FF7-401C-9657-7441C03DD766
>> - */
>> - UUID = aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766");
>> - ifctx = aml_if(aml_equal(aml_arg(0), UUID));
>> - aml_append(ifctx,
>> - aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
>> - aml_append(ifctx,
>> - aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
>> - aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
>> - aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>> -
>> - /*
>> - * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
>> - * and PCIeHotplug depending on enable_native_pcie_hotplug
>> - */
>> - aml_append(ifctx, aml_and(aml_name("CTRL"),
>> - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
>> - aml_name("CTRL")));
>> -
>> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
>> - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
>> - aml_name("CDW1")));
>> - aml_append(ifctx, ifctx1);
>> -
>> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL"))));
>> - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10),
>> - aml_name("CDW1")));
>> - aml_append(ifctx, ifctx1);
>> -
>> - aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3")));
>> - aml_append(ifctx, aml_return(aml_arg(3)));
>> - aml_append(method, ifctx);
>> -
>> - elsectx = aml_else();
>> - aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4),
>> - aml_name("CDW1")));
>> - aml_append(elsectx, aml_return(aml_arg(3)));
>> - aml_append(method, elsectx);
>> - return method;
>> -}
>> -
>> -static Aml *build_host_bridge_dsm(void)
>> +static Aml *build_pci_host_bridge_dsm_method(void)
>> {
>> Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
>> Aml *UUID, *ifctx, *ifctx1, *buf;
>> @@ -134,8 +81,9 @@ static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
>> aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
>> aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> This is where they become unused I think...
Indeed.
This means that I need to regenerate the reference blobs accordingly
(for Gustavo's awarness).
Eric
>
>> /* Declare an _OSC (OS Control Handoff) method */
>> - aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
>> - aml_append(dev, build_host_bridge_dsm());
>> + aml_append(dev,
>> + build_pci_host_bridge_osc_method(enable_native_pcie_hotplug));
>> + aml_append(dev, build_pci_host_bridge_dsm_method());
>> }
>>
>> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 10/25] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (8 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 09/25] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 13:05 ` Igor Mammedov
2025-05-27 7:40 ` [PATCH v2 11/25] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper Eric Auger
` (14 subsequent siblings)
24 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
From: Gustavo Romero <gustavo.romero@linaro.org>
Update the reference DSDT blobs after GPEX _OSC change.
DSDT diff can be found below.
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of dsdt.dat, Mon Apr 7 05:33:06 2025
+ * Disassembly of dsdt.dat, Mon Apr 7 05:37:20 2025
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001A4F (6735)
+ * Length 0x00001A35 (6709)
* Revision 0x02
- * Checksum 0xBF
+ * Checksum 0xDD
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
@@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
- SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
- CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
- CTRL &= 0x1F
+ Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
+ Local0 &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
}
- If ((CDW3 != CTRL))
+ If ((CDW3 != Local0))
{
CDW1 |= 0x10
}
- CDW3 = CTRL /* \_SB_.PCI0.CTRL */
- Return (Arg3)
+ CDW3 = Local0
}
Else
{
CDW1 |= 0x04
- Return (Arg3)
}
+
+ Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
---
tests/qtest/bios-tables-test-allowed-diff.h | 5 -----
tests/data/acpi/aarch64/virt/DSDT | Bin 5196 -> 5170 bytes
.../data/acpi/aarch64/virt/DSDT.acpihmatvirt | Bin 5282 -> 5256 bytes
tests/data/acpi/aarch64/virt/DSDT.memhp | Bin 6557 -> 6531 bytes
tests/data/acpi/aarch64/virt/DSDT.pxb | Bin 7679 -> 7627 bytes
tests/data/acpi/aarch64/virt/DSDT.topology | Bin 5398 -> 5372 bytes
6 files changed, 5 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index abe00ad4ee..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,6 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/aarch64/virt/DSDT",
-"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
-"tests/data/acpi/aarch64/virt/DSDT.memhp",
-"tests/data/acpi/aarch64/virt/DSDT.pxb",
-"tests/data/acpi/aarch64/virt/DSDT.topology",
diff --git a/tests/data/acpi/aarch64/virt/DSDT b/tests/data/acpi/aarch64/virt/DSDT
index 36d3e5d5a5e47359b6dcb3706f98b4f225677591..21278dd23850f3714f82da4da37d8f6f0def7c41 100644
GIT binary patch
delta 113
zcmX@3u}Oo=CD<jzNQ8lbNoyjPG*hp`Ms+tXCb!9(^SP`!1bx`!{ezuZy0RIZUBV3)
z__0pjEu>{)oKT&>C7-ZBVAAAF##)dJ7YA5gc+zBNmvG|*h?oFKtRMj-vXE!9v9Kf~
E0NvLgQ~&?~
delta 139
zcmdm_aYlp7CD<jzM}&caNqQoeG*i3NMs+tXCWon;^SP`!1l>5}{ezuZy0RIZUBV3)
zc(702Eu`gV6dW25P~hwmZtNTq<WmhIxa2|P0)a`BGZ||^YPmSTI>aVThN*)H3xI?R
SK#D=)OR^X8ZI%?4WCQ?(sV7tb
diff --git a/tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt b/tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt
index e6154d0355f84fdcc51387b4db8f9ee63acae4e9..a29aa5d2ea83f00c543b58fe33ec7ce826e050be 100644
GIT binary patch
delta 113
zcmZ3a*`dkh66_MvA;Q4G^lc)SG*h$NM)f&dOm34mALX*<5cFY>_YZbv>B?qsb_q9J
z;Kw>yP*}^vIH5X$OFm(Nz@*8UjI|&cE)KA~@TAGkF5$)r5HSIeSV00vWFgPyPGLz#
E06pL!c>n+a
delta 139
zcmeCsT%^h666_MPNQ8lb>BdAZX{KKHjp}o_m>i~VKFVdyA?U^#?;q^U(v{8N>=JIc
zz=M6Vps<#oQE+HLK!LMMxUq9ckWV#;;F1TC3j`)j&Sb0wspaAT>kykX8Kw>*EC3QN
S04WBEFUelWw>e)}k`Vy<UnqG1
diff --git a/tests/data/acpi/aarch64/virt/DSDT.memhp b/tests/data/acpi/aarch64/virt/DSDT.memhp
index 33f011d6b635035a04c0b39ce9b4e219f7ae74b7..786466e58a7a81bf81fb7cadbb0630e803f19f28 100644
GIT binary patch
delta 113
zcmbPh+-%I{66_MvEXlyY<UNr~nyGK<Ms+tXCb!9(^SP`!1bx`!{ezuZy0RIZUBV3)
z__0pjEu>{)oKT&>C7-ZBVAAAF##)dJ7YA5gc+zBNmvG|*h?oFKtRMj-vXE!9v2Yd}
E01f0IF8}}l
delta 139
zcmZoRo@>nI66_K(SCWB&$z~##G*id)jp}Y(Ob$~w=W|(e2)c2``v*I-bY(L*yM!Aq
z@L-?3TS&{#C^$4ApupKB+}JrJ$fp`aaLI$n1p<>MXEN4;)N*lvb%;%x3{wXY761ts
SfE0tomt-&G+bk)Z#RdSwDJU-h
diff --git a/tests/data/acpi/aarch64/virt/DSDT.pxb b/tests/data/acpi/aarch64/virt/DSDT.pxb
index c0fdc6e9c1396cc2259dc4bc665ba023adcf4c9b..cdefdbb92f6b509b39413a3150d0d5d575c22df3 100644
GIT binary patch
delta 205
zcmexwecGDKCD<k8v@8Py)7FVx(oAi)HmbXEF?qIa&ga_8F6hG^?;q^U(v{8N>=JIc
zz>jruo{W}>aYA(hmwdtkfk~4y8EZi@TpVC|;YpL7UBZnMAYuX_v4RAU$U>gU&tz;j
Ze-hGTWOAFlSxLm2gNkNvekLQy2mmfWJ;DG0
delta 256
zcmX?Y{ok6)CD<k8zbpd-Q^!OuX{N5b8`a&on4CK{=X3347j)x{_YZbv>B?qsb_q9J
z;K4rGR!GawC^$4ApupKB+}JrJ$fp`aaLI$n1p<>MXEN4;)N*lvb%;%x3{wXY761ts
lfE0tomt-&G+dNw+n~}+3>ShiRYYw{DIC-{^?d10|cL0k$O`-q*
diff --git a/tests/data/acpi/aarch64/virt/DSDT.topology b/tests/data/acpi/aarch64/virt/DSDT.topology
index 029d03eecc4efddc001e5377e85ac8e831294362..8cb1d9ef7a6e5a0429e96bf4b6529bc814a936b0 100644
GIT binary patch
delta 113
zcmbQH^+%J-CD<k8j|c+;ll(+3X{L7Hjp_p2Om34mTXI`-2>P(c`v*I-bY(L*yM!Aq
z@ME3aDy(H<oKT&>C7-ZBVAAAF##)dJ7YA5gc+zBNmvG|*h?oFKtRMj-vXE!<Utvi`
E018GRTmS$7
delta 139
zcmeyPIZcbpCD<iIOq79viGL!OG*hGhMs)#hCWon;ExD~Z1l>5}{ezuZy0RIZUBV3)
zc(6}y71r`I3JwhjC~$TOH+BvQ@~H+9T=F1tfxx86nT)j{wOkxv9b%Iv!_+~91wg_D
SAjKf@CD{x4Ha`}YWCQ>=S0`Km
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 10/25] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change
2025-05-27 7:40 ` [PATCH v2 10/25] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Eric Auger
@ 2025-05-27 13:05 ` Igor Mammedov
0 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 13:05 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:12 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> From: Gustavo Romero <gustavo.romero@linaro.org>
>
> Update the reference DSDT blobs after GPEX _OSC change.
>
> DSDT diff can be found below.
this needs to be updated to take into account microvm
>
> *
> * Disassembling to symbolic ASL+ operators
> *
> - * Disassembly of dsdt.dat, Mon Apr 7 05:33:06 2025
> + * Disassembly of dsdt.dat, Mon Apr 7 05:37:20 2025
> *
> * Original Table Header:
> * Signature "DSDT"
> - * Length 0x00001A4F (6735)
> + * Length 0x00001A35 (6709)
> * Revision 0x02
> - * Checksum 0xBF
> + * Checksum 0xDD
> * OEM ID "BOCHS "
> * OEM Table ID "BXPC "
> * OEM Revision 0x00000001 (1)
> @@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
> {
> CreateDWordField (Arg3, 0x04, CDW2)
> CreateDWordField (Arg3, 0x08, CDW3)
> - SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
> - CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> - CTRL &= 0x1F
> + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> + Local0 &= 0x1F
> If ((Arg1 != One))
> {
> CDW1 |= 0x08
> }
>
> - If ((CDW3 != CTRL))
> + If ((CDW3 != Local0))
> {
> CDW1 |= 0x10
> }
>
> - CDW3 = CTRL /* \_SB_.PCI0.CTRL */
> - Return (Arg3)
> + CDW3 = Local0
> }
> Else
> {
> CDW1 |= 0x04
> - Return (Arg3)
> }
> +
> + Return (Arg3)
> }
>
> Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 5 -----
> tests/data/acpi/aarch64/virt/DSDT | Bin 5196 -> 5170 bytes
> .../data/acpi/aarch64/virt/DSDT.acpihmatvirt | Bin 5282 -> 5256 bytes
> tests/data/acpi/aarch64/virt/DSDT.memhp | Bin 6557 -> 6531 bytes
> tests/data/acpi/aarch64/virt/DSDT.pxb | Bin 7679 -> 7627 bytes
> tests/data/acpi/aarch64/virt/DSDT.topology | Bin 5398 -> 5372 bytes
> 6 files changed, 5 deletions(-)
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> index abe00ad4ee..dfb8523c8b 100644
> --- a/tests/qtest/bios-tables-test-allowed-diff.h
> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> @@ -1,6 +1 @@
> /* List of comma-separated changed AML files to ignore */
> -"tests/data/acpi/aarch64/virt/DSDT",
> -"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
> -"tests/data/acpi/aarch64/virt/DSDT.memhp",
> -"tests/data/acpi/aarch64/virt/DSDT.pxb",
> -"tests/data/acpi/aarch64/virt/DSDT.topology",
> diff --git a/tests/data/acpi/aarch64/virt/DSDT b/tests/data/acpi/aarch64/virt/DSDT
> index 36d3e5d5a5e47359b6dcb3706f98b4f225677591..21278dd23850f3714f82da4da37d8f6f0def7c41 100644
> GIT binary patch
> delta 113
> zcmX@3u}Oo=CD<jzNQ8lbNoyjPG*hp`Ms+tXCb!9(^SP`!1bx`!{ezuZy0RIZUBV3)
> z__0pjEu>{)oKT&>C7-ZBVAAAF##)dJ7YA5gc+zBNmvG|*h?oFKtRMj-vXE!9v9Kf~
> E0NvLgQ~&?~
>
> delta 139
> zcmdm_aYlp7CD<jzM}&caNqQoeG*i3NMs+tXCWon;^SP`!1l>5}{ezuZy0RIZUBV3)
> zc(702Eu`gV6dW25P~hwmZtNTq<WmhIxa2|P0)a`BGZ||^YPmSTI>aVThN*)H3xI?R
> SK#D=)OR^X8ZI%?4WCQ?(sV7tb
>
> diff --git a/tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt b/tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt
> index e6154d0355f84fdcc51387b4db8f9ee63acae4e9..a29aa5d2ea83f00c543b58fe33ec7ce826e050be 100644
> GIT binary patch
> delta 113
> zcmZ3a*`dkh66_MvA;Q4G^lc)SG*h$NM)f&dOm34mALX*<5cFY>_YZbv>B?qsb_q9J
> z;Kw>yP*}^vIH5X$OFm(Nz@*8UjI|&cE)KA~@TAGkF5$)r5HSIeSV00vWFgPyPGLz#
> E06pL!c>n+a
>
> delta 139
> zcmeCsT%^h666_MPNQ8lb>BdAZX{KKHjp}o_m>i~VKFVdyA?U^#?;q^U(v{8N>=JIc
> zz=M6Vps<#oQE+HLK!LMMxUq9ckWV#;;F1TC3j`)j&Sb0wspaAT>kykX8Kw>*EC3QN
> S04WBEFUelWw>e)}k`Vy<UnqG1
>
> diff --git a/tests/data/acpi/aarch64/virt/DSDT.memhp b/tests/data/acpi/aarch64/virt/DSDT.memhp
> index 33f011d6b635035a04c0b39ce9b4e219f7ae74b7..786466e58a7a81bf81fb7cadbb0630e803f19f28 100644
> GIT binary patch
> delta 113
> zcmbPh+-%I{66_MvEXlyY<UNr~nyGK<Ms+tXCb!9(^SP`!1bx`!{ezuZy0RIZUBV3)
> z__0pjEu>{)oKT&>C7-ZBVAAAF##)dJ7YA5gc+zBNmvG|*h?oFKtRMj-vXE!9v2Yd}
> E01f0IF8}}l
>
> delta 139
> zcmZoRo@>nI66_K(SCWB&$z~##G*id)jp}Y(Ob$~w=W|(e2)c2``v*I-bY(L*yM!Aq
> z@L-?3TS&{#C^$4ApupKB+}JrJ$fp`aaLI$n1p<>MXEN4;)N*lvb%;%x3{wXY761ts
> SfE0tomt-&G+bk)Z#RdSwDJU-h
>
> diff --git a/tests/data/acpi/aarch64/virt/DSDT.pxb b/tests/data/acpi/aarch64/virt/DSDT.pxb
> index c0fdc6e9c1396cc2259dc4bc665ba023adcf4c9b..cdefdbb92f6b509b39413a3150d0d5d575c22df3 100644
> GIT binary patch
> delta 205
> zcmexwecGDKCD<k8v@8Py)7FVx(oAi)HmbXEF?qIa&ga_8F6hG^?;q^U(v{8N>=JIc
> zz>jruo{W}>aYA(hmwdtkfk~4y8EZi@TpVC|;YpL7UBZnMAYuX_v4RAU$U>gU&tz;j
> Ze-hGTWOAFlSxLm2gNkNvekLQy2mmfWJ;DG0
>
> delta 256
> zcmX?Y{ok6)CD<k8zbpd-Q^!OuX{N5b8`a&on4CK{=X3347j)x{_YZbv>B?qsb_q9J
> z;K4rGR!GawC^$4ApupKB+}JrJ$fp`aaLI$n1p<>MXEN4;)N*lvb%;%x3{wXY761ts
> lfE0tomt-&G+dNw+n~}+3>ShiRYYw{DIC-{^?d10|cL0k$O`-q*
>
> diff --git a/tests/data/acpi/aarch64/virt/DSDT.topology b/tests/data/acpi/aarch64/virt/DSDT.topology
> index 029d03eecc4efddc001e5377e85ac8e831294362..8cb1d9ef7a6e5a0429e96bf4b6529bc814a936b0 100644
> GIT binary patch
> delta 113
> zcmbQH^+%J-CD<k8j|c+;ll(+3X{L7Hjp_p2Om34mTXI`-2>P(c`v*I-bY(L*yM!Aq
> z@ME3aDy(H<oKT&>C7-ZBVAAAF##)dJ7YA5gc+zBNmvG|*h?oFKtRMj-vXE!<Utvi`
> E018GRTmS$7
>
> delta 139
> zcmeyPIZcbpCD<iIOq79viGL!OG*hGhMs)#hCWon;ExD~Z1l>5}{ezuZy0RIZUBV3)
> zc(6}y71r`I3JwhjC~$TOH+BvQ@~H+9T=F1tfxx86nT)j{wOkxv9b%Iv!_+~91wg_D
> SAjKf@CD{x4Ha`}YWCQ>=S0`Km
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 11/25] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (9 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 10/25] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 13:09 ` Igor Mammedov
2025-05-30 10:17 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 12/25] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug Eric Auger
` (13 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Extract the code that reserves resources for ACPI PCI hotplug
into a new helper named build_append_pcihp_resources() and
move it to pcihp.c. We will reuse it on ARM.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
include/hw/acpi/pcihp.h | 2 ++
hw/acpi/pcihp.c | 20 ++++++++++++++++++++
hw/i386/acpi-build.c | 15 ++-------------
3 files changed, 24 insertions(+), 13 deletions(-)
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 971451e8ea..8a46a414cc 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -75,6 +75,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
+void build_append_pcihp_resources(Aml *table,
+ uint64_t io_addr, uint64_t io_len);
/* Called on reset */
void acpi_pcihp_reset(AcpiPciHpState *s);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index e0260f67e6..fb54c31f77 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -685,6 +685,26 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
aml_append(table, scope);
}
+/* Reserve PCIHP resources */
+void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */,
+ uint64_t io_addr, uint64_t io_len)
+{
+ Aml *dev, *crs;
+
+ dev = aml_device("PHPR");
+ aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
+ aml_append(dev,
+ aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
+ /* device present, functioning, decoding, not shown in UI */
+ aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
+ crs = aml_resource_template();
+ aml_append(crs,
+ aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len)
+ );
+ aml_append(dev, aml_name_decl("_CRS", crs));
+ aml_append(scope, dev);
+}
+
const VMStateDescription vmstate_acpi_pcihp_pci_status = {
.name = "acpi_pcihp_pci_status",
.version_id = 1,
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 91945f716c..52cef834ed 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1432,19 +1432,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
/* reserve PCIHP resources */
if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) {
- dev = aml_device("PHPR");
- aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
- aml_append(dev,
- aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
- /* device present, functioning, decoding, not shown in UI */
- aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
- crs = aml_resource_template();
- aml_append(crs,
- aml_io(AML_DECODE16, pm->pcihp_io_base, pm->pcihp_io_base, 1,
- pm->pcihp_io_len)
- );
- aml_append(dev, aml_name_decl("_CRS", crs));
- aml_append(scope, dev);
+ build_append_pcihp_resources(scope,
+ pm->pcihp_io_base, pm->pcihp_io_len);
}
aml_append(dsdt, scope);
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 11/25] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
2025-05-27 7:40 ` [PATCH v2 11/25] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper Eric Auger
@ 2025-05-27 13:09 ` Igor Mammedov
2025-05-30 10:17 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 13:09 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:13 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Extract the code that reserves resources for ACPI PCI hotplug
> into a new helper named build_append_pcihp_resources() and
> move it to pcihp.c. We will reuse it on ARM.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> include/hw/acpi/pcihp.h | 2 ++
> hw/acpi/pcihp.c | 20 ++++++++++++++++++++
> hw/i386/acpi-build.c | 15 ++-------------
> 3 files changed, 24 insertions(+), 13 deletions(-)
>
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index 971451e8ea..8a46a414cc 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -75,6 +75,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
>
> void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
> void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
> +void build_append_pcihp_resources(Aml *table,
> + uint64_t io_addr, uint64_t io_len);
>
> /* Called on reset */
> void acpi_pcihp_reset(AcpiPciHpState *s);
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index e0260f67e6..fb54c31f77 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -685,6 +685,26 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
> aml_append(table, scope);
> }
>
> +/* Reserve PCIHP resources */
> +void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */,
> + uint64_t io_addr, uint64_t io_len)
> +{
> + Aml *dev, *crs;
> +
> + dev = aml_device("PHPR");
> + aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
> + aml_append(dev,
> + aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
> + /* device present, functioning, decoding, not shown in UI */
> + aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
> + crs = aml_resource_template();
> + aml_append(crs,
> + aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len)
> + );
> + aml_append(dev, aml_name_decl("_CRS", crs));
> + aml_append(scope, dev);
> +}
> +
> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
> .name = "acpi_pcihp_pci_status",
> .version_id = 1,
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 91945f716c..52cef834ed 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1432,19 +1432,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
>
> /* reserve PCIHP resources */
> if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) {
> - dev = aml_device("PHPR");
> - aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
> - aml_append(dev,
> - aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
> - /* device present, functioning, decoding, not shown in UI */
> - aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
> - crs = aml_resource_template();
> - aml_append(crs,
> - aml_io(AML_DECODE16, pm->pcihp_io_base, pm->pcihp_io_base, 1,
> - pm->pcihp_io_len)
> - );
> - aml_append(dev, aml_name_decl("_CRS", crs));
> - aml_append(scope, dev);
> + build_append_pcihp_resources(scope,
> + pm->pcihp_io_base, pm->pcihp_io_len);
> }
> aml_append(dsdt, scope);
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 11/25] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
2025-05-27 7:40 ` [PATCH v2 11/25] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper Eric Auger
@ 2025-05-30 10:17 ` Jonathan Cameron via
2025-05-30 10:17 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 10:17 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:13 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Extract the code that reserves resources for ACPI PCI hotplug
> into a new helper named build_append_pcihp_resources() and
> move it to pcihp.c. We will reuse it on ARM.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Trivial comment inline.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> include/hw/acpi/pcihp.h | 2 ++
> hw/acpi/pcihp.c | 20 ++++++++++++++++++++
> hw/i386/acpi-build.c | 15 ++-------------
> 3 files changed, 24 insertions(+), 13 deletions(-)
>
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index 971451e8ea..8a46a414cc 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -75,6 +75,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
>
> void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
> void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
> +void build_append_pcihp_resources(Aml *table,
> + uint64_t io_addr, uint64_t io_len);
>
> /* Called on reset */
> void acpi_pcihp_reset(AcpiPciHpState *s);
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index e0260f67e6..fb54c31f77 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -685,6 +685,26 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
> aml_append(table, scope);
> }
>
> +/* Reserve PCIHP resources */
> +void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */,
> + uint64_t io_addr, uint64_t io_len)
> +{
> + Aml *dev, *crs;
> +
> + dev = aml_device("PHPR");
> + aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
> + aml_append(dev,
> + aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
> + /* device present, functioning, decoding, not shown in UI */
> + aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
> + crs = aml_resource_template();
> + aml_append(crs,
> + aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len)
> + );
Trivial but this doesn't match local style. It is even inconsistent with
the _UID line above.
> + aml_append(crs,
> + aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len));
maybe?
> + aml_append(dev, aml_name_decl("_CRS", crs));
> + aml_append(scope, dev);
> +}
> +
> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
> .name = "acpi_pcihp_pci_status",
> .version_id = 1,
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 91945f716c..52cef834ed 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1432,19 +1432,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
>
> /* reserve PCIHP resources */
> if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) {
> - dev = aml_device("PHPR");
> - aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
> - aml_append(dev,
> - aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
> - /* device present, functioning, decoding, not shown in UI */
> - aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
> - crs = aml_resource_template();
> - aml_append(crs,
> - aml_io(AML_DECODE16, pm->pcihp_io_base, pm->pcihp_io_base, 1,
> - pm->pcihp_io_len)
> - );
> - aml_append(dev, aml_name_decl("_CRS", crs));
> - aml_append(scope, dev);
> + build_append_pcihp_resources(scope,
> + pm->pcihp_io_base, pm->pcihp_io_len);
> }
> aml_append(dsdt, scope);
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 11/25] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
@ 2025-05-30 10:17 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 10:17 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:13 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Extract the code that reserves resources for ACPI PCI hotplug
> into a new helper named build_append_pcihp_resources() and
> move it to pcihp.c. We will reuse it on ARM.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Trivial comment inline.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> include/hw/acpi/pcihp.h | 2 ++
> hw/acpi/pcihp.c | 20 ++++++++++++++++++++
> hw/i386/acpi-build.c | 15 ++-------------
> 3 files changed, 24 insertions(+), 13 deletions(-)
>
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index 971451e8ea..8a46a414cc 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -75,6 +75,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
>
> void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
> void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
> +void build_append_pcihp_resources(Aml *table,
> + uint64_t io_addr, uint64_t io_len);
>
> /* Called on reset */
> void acpi_pcihp_reset(AcpiPciHpState *s);
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index e0260f67e6..fb54c31f77 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -685,6 +685,26 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
> aml_append(table, scope);
> }
>
> +/* Reserve PCIHP resources */
> +void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */,
> + uint64_t io_addr, uint64_t io_len)
> +{
> + Aml *dev, *crs;
> +
> + dev = aml_device("PHPR");
> + aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
> + aml_append(dev,
> + aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
> + /* device present, functioning, decoding, not shown in UI */
> + aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
> + crs = aml_resource_template();
> + aml_append(crs,
> + aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len)
> + );
Trivial but this doesn't match local style. It is even inconsistent with
the _UID line above.
> + aml_append(crs,
> + aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len));
maybe?
> + aml_append(dev, aml_name_decl("_CRS", crs));
> + aml_append(scope, dev);
> +}
> +
> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
> .name = "acpi_pcihp_pci_status",
> .version_id = 1,
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 91945f716c..52cef834ed 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1432,19 +1432,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
>
> /* reserve PCIHP resources */
> if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) {
> - dev = aml_device("PHPR");
> - aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
> - aml_append(dev,
> - aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
> - /* device present, functioning, decoding, not shown in UI */
> - aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
> - crs = aml_resource_template();
> - aml_append(crs,
> - aml_io(AML_DECODE16, pm->pcihp_io_base, pm->pcihp_io_base, 1,
> - pm->pcihp_io_len)
> - );
> - aml_append(dev, aml_name_decl("_CRS", crs));
> - aml_append(scope, dev);
> + build_append_pcihp_resources(scope,
> + pm->pcihp_io_base, pm->pcihp_io_len);
> }
> aml_append(dsdt, scope);
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 11/25] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
2025-05-30 10:17 ` Jonathan Cameron via
(?)
@ 2025-06-05 17:06 ` Eric Auger
-1 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-06-05 17:06 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan,
On 5/30/25 12:17 PM, Jonathan Cameron wrote:
> On Tue, 27 May 2025 09:40:13 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Extract the code that reserves resources for ACPI PCI hotplug
>> into a new helper named build_append_pcihp_resources() and
>> move it to pcihp.c. We will reuse it on ARM.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> Trivial comment inline.
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
>> ---
>> include/hw/acpi/pcihp.h | 2 ++
>> hw/acpi/pcihp.c | 20 ++++++++++++++++++++
>> hw/i386/acpi-build.c | 15 ++-------------
>> 3 files changed, 24 insertions(+), 13 deletions(-)
>>
>> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
>> index 971451e8ea..8a46a414cc 100644
>> --- a/include/hw/acpi/pcihp.h
>> +++ b/include/hw/acpi/pcihp.h
>> @@ -75,6 +75,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
>>
>> void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
>> void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
>> +void build_append_pcihp_resources(Aml *table,
>> + uint64_t io_addr, uint64_t io_len);
>>
>> /* Called on reset */
>> void acpi_pcihp_reset(AcpiPciHpState *s);
>> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
>> index e0260f67e6..fb54c31f77 100644
>> --- a/hw/acpi/pcihp.c
>> +++ b/hw/acpi/pcihp.c
>> @@ -685,6 +685,26 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
>> aml_append(table, scope);
>> }
>>
>> +/* Reserve PCIHP resources */
>> +void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */,
>> + uint64_t io_addr, uint64_t io_len)
>> +{
>> + Aml *dev, *crs;
>> +
>> + dev = aml_device("PHPR");
>> + aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
>> + aml_append(dev,
>> + aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
>> + /* device present, functioning, decoding, not shown in UI */
>> + aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
>> + crs = aml_resource_template();
>> + aml_append(crs,
>> + aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len)
>> + );
> Trivial but this doesn't match local style. It is even inconsistent with
> the _UID line above.
>> + aml_append(crs,
>> + aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len));
> maybe?
definivitely. Will be fixed in next version
Thanks!
Eric
>
>> + aml_append(dev, aml_name_decl("_CRS", crs));
>> + aml_append(scope, dev);
>> +}
>> +
>> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
>> .name = "acpi_pcihp_pci_status",
>> .version_id = 1,
>> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
>> index 91945f716c..52cef834ed 100644
>> --- a/hw/i386/acpi-build.c
>> +++ b/hw/i386/acpi-build.c
>> @@ -1432,19 +1432,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
>>
>> /* reserve PCIHP resources */
>> if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) {
>> - dev = aml_device("PHPR");
>> - aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
>> - aml_append(dev,
>> - aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
>> - /* device present, functioning, decoding, not shown in UI */
>> - aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
>> - crs = aml_resource_template();
>> - aml_append(crs,
>> - aml_io(AML_DECODE16, pm->pcihp_io_base, pm->pcihp_io_base, 1,
>> - pm->pcihp_io_len)
>> - );
>> - aml_append(dev, aml_name_decl("_CRS", crs));
>> - aml_append(scope, dev);
>> + build_append_pcihp_resources(scope,
>> + pm->pcihp_io_base, pm->pcihp_io_len);
>> }
>> aml_append(dsdt, scope);
>>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 12/25] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (10 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 11/25] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 13:12 ` Igor Mammedov
2025-05-30 10:18 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 13/25] hw/i386/acpi-build: Move build_append_notification_callback to pcihp Eric Auger
` (12 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
On ARM we will put the operation regions in AML_SYSTEM_MEMORY.
So let's allow this configuration.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
include/hw/acpi/pcihp.h | 3 ++-
hw/acpi/pcihp.c | 8 ++++----
hw/i386/acpi-build.c | 4 ++--
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 8a46a414cc..253ac6e483 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -28,6 +28,7 @@
#define HW_ACPI_PCIHP_H
#include "hw/acpi/acpi.h"
+#include "hw/acpi/aml-build.h"
#include "hw/hotplug.h"
#define ACPI_PCIHP_IO_BASE_PROP "acpi-pcihp-io-base"
@@ -73,7 +74,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
AcpiPciHpState *s, DeviceState *dev,
Error **errp);
-void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
+void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_addr);
void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
void build_append_pcihp_resources(Aml *table,
uint64_t io_addr, uint64_t io_len);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index fb54c31f77..310a5c54bd 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -629,7 +629,7 @@ static Aml *aml_pci_pdsm(void)
return method;
}
-void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
+void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_addr)
{
Aml *scope;
Aml *field;
@@ -638,21 +638,21 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
scope = aml_scope("_SB.PCI0");
aml_append(scope,
- aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08));
+ aml_operation_region("PCST", rs, aml_int(pcihp_addr), 0x08));
field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
aml_append(field, aml_named_field("PCIU", 32));
aml_append(field, aml_named_field("PCID", 32));
aml_append(scope, field);
aml_append(scope,
- aml_operation_region("SEJ", AML_SYSTEM_IO,
+ aml_operation_region("SEJ", rs,
aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04));
field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
aml_append(field, aml_named_field("B0EJ", 32));
aml_append(scope, field);
aml_append(scope,
- aml_operation_region("BNMR", AML_SYSTEM_IO,
+ aml_operation_region("BNMR", rs,
aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08));
field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
aml_append(field, aml_named_field("BNUM", 32));
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 52cef834ed..6ca2b34ef8 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1172,7 +1172,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dsdt, sb_scope);
if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
- build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
+ build_acpi_pci_hotplug(dsdt, AML_SYSTEM_IO, pm->pcihp_io_base);
}
build_piix4_pci0_int(dsdt);
} else if (q35) {
@@ -1216,7 +1216,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dsdt, sb_scope);
if (pm->pcihp_bridge_en) {
- build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
+ build_acpi_pci_hotplug(dsdt, AML_SYSTEM_IO, pm->pcihp_io_base);
}
build_q35_pci0_int(dsdt);
}
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 12/25] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
2025-05-27 7:40 ` [PATCH v2 12/25] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug Eric Auger
@ 2025-05-27 13:12 ` Igor Mammedov
2025-05-30 10:18 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 13:12 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:14 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> On ARM we will put the operation regions in AML_SYSTEM_MEMORY.
> So let's allow this configuration.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> include/hw/acpi/pcihp.h | 3 ++-
> hw/acpi/pcihp.c | 8 ++++----
> hw/i386/acpi-build.c | 4 ++--
> 3 files changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index 8a46a414cc..253ac6e483 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -28,6 +28,7 @@
> #define HW_ACPI_PCIHP_H
>
> #include "hw/acpi/acpi.h"
> +#include "hw/acpi/aml-build.h"
> #include "hw/hotplug.h"
>
> #define ACPI_PCIHP_IO_BASE_PROP "acpi-pcihp-io-base"
> @@ -73,7 +74,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
> AcpiPciHpState *s, DeviceState *dev,
> Error **errp);
>
> -void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
> +void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_addr);
> void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
> void build_append_pcihp_resources(Aml *table,
> uint64_t io_addr, uint64_t io_len);
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index fb54c31f77..310a5c54bd 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -629,7 +629,7 @@ static Aml *aml_pci_pdsm(void)
> return method;
> }
>
> -void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
> +void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_addr)
> {
> Aml *scope;
> Aml *field;
> @@ -638,21 +638,21 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
> scope = aml_scope("_SB.PCI0");
>
> aml_append(scope,
> - aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08));
> + aml_operation_region("PCST", rs, aml_int(pcihp_addr), 0x08));
> field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("PCIU", 32));
> aml_append(field, aml_named_field("PCID", 32));
> aml_append(scope, field);
>
> aml_append(scope,
> - aml_operation_region("SEJ", AML_SYSTEM_IO,
> + aml_operation_region("SEJ", rs,
> aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04));
> field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("B0EJ", 32));
> aml_append(scope, field);
>
> aml_append(scope,
> - aml_operation_region("BNMR", AML_SYSTEM_IO,
> + aml_operation_region("BNMR", rs,
> aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08));
> field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
> aml_append(field, aml_named_field("BNUM", 32));
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 52cef834ed..6ca2b34ef8 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1172,7 +1172,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> aml_append(dsdt, sb_scope);
>
> if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
> - build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
> + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_IO, pm->pcihp_io_base);
> }
> build_piix4_pci0_int(dsdt);
> } else if (q35) {
> @@ -1216,7 +1216,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> aml_append(dsdt, sb_scope);
>
> if (pm->pcihp_bridge_en) {
> - build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
> + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_IO, pm->pcihp_io_base);
> }
> build_q35_pci0_int(dsdt);
> }
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 12/25] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
2025-05-27 7:40 ` [PATCH v2 12/25] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug Eric Auger
@ 2025-05-30 10:18 ` Jonathan Cameron via
2025-05-30 10:18 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 10:18 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:14 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> On ARM we will put the operation regions in AML_SYSTEM_MEMORY.
> So let's allow this configuration.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 12/25] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
@ 2025-05-30 10:18 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 10:18 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:14 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> On ARM we will put the operation regions in AML_SYSTEM_MEMORY.
> So let's allow this configuration.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 13/25] hw/i386/acpi-build: Move build_append_notification_callback to pcihp
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (11 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 12/25] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 13:37 ` Igor Mammedov
2025-05-30 10:19 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 14/25] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots " Eric Auger
` (11 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
We plan to reuse build_append_notification_callback() on ARM
so let's move it to pcihp.c.
No functional change intended.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
include/hw/acpi/pcihp.h | 1 +
hw/acpi/pcihp.c | 58 +++++++++++++++++++++++++++++++++++++++++
hw/i386/acpi-build.c | 58 -----------------------------------------
3 files changed, 59 insertions(+), 58 deletions(-)
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 253ac6e483..f4fd44cb32 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -78,6 +78,7 @@ void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_addr);
void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
void build_append_pcihp_resources(Aml *table,
uint64_t io_addr, uint64_t io_len);
+bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
/* Called on reset */
void acpi_pcihp_reset(AcpiPciHpState *s);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 310a5c54bd..907a08ac7f 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -39,6 +39,7 @@
#include "migration/vmstate.h"
#include "qapi/error.h"
#include "qom/qom-qobject.h"
+#include "qobject/qnum.h"
#include "trace.h"
#define ACPI_PCIHP_SIZE 0x0018
@@ -705,6 +706,63 @@ void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */,
aml_append(scope, dev);
}
+bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus)
+{
+ Aml *method;
+ PCIBus *sec;
+ QObject *bsel;
+ int nr_notifiers = 0;
+ GQueue *pcnt_bus_list = g_queue_new();
+
+ QLIST_FOREACH(sec, &bus->child, sibling) {
+ Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn);
+ if (pci_bus_is_root(sec)) {
+ continue;
+ }
+ nr_notifiers = nr_notifiers +
+ build_append_notification_callback(br_scope, sec);
+ /*
+ * add new child scope to parent
+ * and keep track of bus that have PCNT,
+ * bus list is used later to call children PCNTs from this level PCNT
+ */
+ if (nr_notifiers) {
+ g_queue_push_tail(pcnt_bus_list, sec);
+ aml_append(parent_scope, br_scope);
+ }
+ }
+
+ /*
+ * Append PCNT method to notify about events on local and child buses.
+ * ps: hostbridge might not have hotplug (bsel) enabled but might have
+ * child bridges that do have bsel.
+ */
+ method = aml_method("PCNT", 0, AML_NOTSERIALIZED);
+
+ /* If bus supports hotplug select it and notify about local events */
+ bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
+ if (bsel) {
+ uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
+
+ aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM")));
+ aml_append(method, aml_call2("DVNT", aml_name("PCIU"),
+ aml_int(1))); /* Device Check */
+ aml_append(method, aml_call2("DVNT", aml_name("PCID"),
+ aml_int(3))); /* Eject Request */
+ nr_notifiers++;
+ }
+
+ /* Notify about child bus events in any case */
+ while ((sec = g_queue_pop_head(pcnt_bus_list))) {
+ aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn));
+ }
+
+ aml_append(parent_scope, method);
+ qobject_unref(bsel);
+ g_queue_free(pcnt_bus_list);
+ return !!nr_notifiers;
+}
+
const VMStateDescription vmstate_acpi_pcihp_pci_status = {
.name = "acpi_pcihp_pci_status",
.version_id = 1,
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6ca2b34ef8..3275675e60 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -563,64 +563,6 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
}
}
-static bool build_append_notification_callback(Aml *parent_scope,
- const PCIBus *bus)
-{
- Aml *method;
- PCIBus *sec;
- QObject *bsel;
- int nr_notifiers = 0;
- GQueue *pcnt_bus_list = g_queue_new();
-
- QLIST_FOREACH(sec, &bus->child, sibling) {
- Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn);
- if (pci_bus_is_root(sec)) {
- continue;
- }
- nr_notifiers = nr_notifiers +
- build_append_notification_callback(br_scope, sec);
- /*
- * add new child scope to parent
- * and keep track of bus that have PCNT,
- * bus list is used later to call children PCNTs from this level PCNT
- */
- if (nr_notifiers) {
- g_queue_push_tail(pcnt_bus_list, sec);
- aml_append(parent_scope, br_scope);
- }
- }
-
- /*
- * Append PCNT method to notify about events on local and child buses.
- * ps: hostbridge might not have hotplug (bsel) enabled but might have
- * child bridges that do have bsel.
- */
- method = aml_method("PCNT", 0, AML_NOTSERIALIZED);
-
- /* If bus supports hotplug select it and notify about local events */
- bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
- if (bsel) {
- uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
-
- aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM")));
- aml_append(method, aml_call2("DVNT", aml_name("PCIU"),
- aml_int(1))); /* Device Check */
- aml_append(method, aml_call2("DVNT", aml_name("PCID"),
- aml_int(3))); /* Eject Request */
- nr_notifiers++;
- }
-
- /* Notify about child bus events in any case */
- while ((sec = g_queue_pop_head(pcnt_bus_list))) {
- aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn));
- }
-
- aml_append(parent_scope, method);
- qobject_unref(bsel);
- g_queue_free(pcnt_bus_list);
- return !!nr_notifiers;
-}
-
/*
* build_prt - Define interrupt routing rules
*
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 13/25] hw/i386/acpi-build: Move build_append_notification_callback to pcihp
2025-05-27 7:40 ` [PATCH v2 13/25] hw/i386/acpi-build: Move build_append_notification_callback to pcihp Eric Auger
@ 2025-05-27 13:37 ` Igor Mammedov
2025-05-30 10:19 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 13:37 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:15 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> We plan to reuse build_append_notification_callback() on ARM
> so let's move it to pcihp.c.
>
> No functional change intended.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> include/hw/acpi/pcihp.h | 1 +
> hw/acpi/pcihp.c | 58 +++++++++++++++++++++++++++++++++++++++++
> hw/i386/acpi-build.c | 58 -----------------------------------------
> 3 files changed, 59 insertions(+), 58 deletions(-)
>
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index 253ac6e483..f4fd44cb32 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -78,6 +78,7 @@ void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_addr);
> void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
> void build_append_pcihp_resources(Aml *table,
> uint64_t io_addr, uint64_t io_len);
> +bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
>
> /* Called on reset */
> void acpi_pcihp_reset(AcpiPciHpState *s);
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index 310a5c54bd..907a08ac7f 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -39,6 +39,7 @@
> #include "migration/vmstate.h"
> #include "qapi/error.h"
> #include "qom/qom-qobject.h"
> +#include "qobject/qnum.h"
> #include "trace.h"
>
> #define ACPI_PCIHP_SIZE 0x0018
> @@ -705,6 +706,63 @@ void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */,
> aml_append(scope, dev);
> }
>
> +bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus)
> +{
> + Aml *method;
> + PCIBus *sec;
> + QObject *bsel;
> + int nr_notifiers = 0;
> + GQueue *pcnt_bus_list = g_queue_new();
> +
> + QLIST_FOREACH(sec, &bus->child, sibling) {
> + Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn);
> + if (pci_bus_is_root(sec)) {
> + continue;
> + }
> + nr_notifiers = nr_notifiers +
> + build_append_notification_callback(br_scope, sec);
> + /*
> + * add new child scope to parent
> + * and keep track of bus that have PCNT,
> + * bus list is used later to call children PCNTs from this level PCNT
> + */
> + if (nr_notifiers) {
> + g_queue_push_tail(pcnt_bus_list, sec);
> + aml_append(parent_scope, br_scope);
> + }
> + }
> +
> + /*
> + * Append PCNT method to notify about events on local and child buses.
> + * ps: hostbridge might not have hotplug (bsel) enabled but might have
> + * child bridges that do have bsel.
> + */
> + method = aml_method("PCNT", 0, AML_NOTSERIALIZED);
> +
> + /* If bus supports hotplug select it and notify about local events */
> + bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
> + if (bsel) {
> + uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
> +
> + aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM")));
> + aml_append(method, aml_call2("DVNT", aml_name("PCIU"),
> + aml_int(1))); /* Device Check */
> + aml_append(method, aml_call2("DVNT", aml_name("PCID"),
> + aml_int(3))); /* Eject Request */
> + nr_notifiers++;
> + }
> +
> + /* Notify about child bus events in any case */
> + while ((sec = g_queue_pop_head(pcnt_bus_list))) {
> + aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn));
> + }
> +
> + aml_append(parent_scope, method);
> + qobject_unref(bsel);
> + g_queue_free(pcnt_bus_list);
> + return !!nr_notifiers;
> +}
> +
> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
> .name = "acpi_pcihp_pci_status",
> .version_id = 1,
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 6ca2b34ef8..3275675e60 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -563,64 +563,6 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
> }
> }
>
> -static bool build_append_notification_callback(Aml *parent_scope,
> - const PCIBus *bus)
> -{
> - Aml *method;
> - PCIBus *sec;
> - QObject *bsel;
> - int nr_notifiers = 0;
> - GQueue *pcnt_bus_list = g_queue_new();
> -
> - QLIST_FOREACH(sec, &bus->child, sibling) {
> - Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn);
> - if (pci_bus_is_root(sec)) {
> - continue;
> - }
> - nr_notifiers = nr_notifiers +
> - build_append_notification_callback(br_scope, sec);
> - /*
> - * add new child scope to parent
> - * and keep track of bus that have PCNT,
> - * bus list is used later to call children PCNTs from this level PCNT
> - */
> - if (nr_notifiers) {
> - g_queue_push_tail(pcnt_bus_list, sec);
> - aml_append(parent_scope, br_scope);
> - }
> - }
> -
> - /*
> - * Append PCNT method to notify about events on local and child buses.
> - * ps: hostbridge might not have hotplug (bsel) enabled but might have
> - * child bridges that do have bsel.
> - */
> - method = aml_method("PCNT", 0, AML_NOTSERIALIZED);
> -
> - /* If bus supports hotplug select it and notify about local events */
> - bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
> - if (bsel) {
> - uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
> -
> - aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM")));
> - aml_append(method, aml_call2("DVNT", aml_name("PCIU"),
> - aml_int(1))); /* Device Check */
> - aml_append(method, aml_call2("DVNT", aml_name("PCID"),
> - aml_int(3))); /* Eject Request */
> - nr_notifiers++;
> - }
> -
> - /* Notify about child bus events in any case */
> - while ((sec = g_queue_pop_head(pcnt_bus_list))) {
> - aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn));
> - }
> -
> - aml_append(parent_scope, method);
> - qobject_unref(bsel);
> - g_queue_free(pcnt_bus_list);
> - return !!nr_notifiers;
> -}
> -
> /*
> * build_prt - Define interrupt routing rules
> *
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 13/25] hw/i386/acpi-build: Move build_append_notification_callback to pcihp
2025-05-27 7:40 ` [PATCH v2 13/25] hw/i386/acpi-build: Move build_append_notification_callback to pcihp Eric Auger
@ 2025-05-30 10:19 ` Jonathan Cameron via
2025-05-30 10:19 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 10:19 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:15 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> We plan to reuse build_append_notification_callback() on ARM
> so let's move it to pcihp.c.
>
> No functional change intended.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
FWIW given it's just a move.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 13/25] hw/i386/acpi-build: Move build_append_notification_callback to pcihp
@ 2025-05-30 10:19 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 10:19 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:15 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> We plan to reuse build_append_notification_callback() on ARM
> so let's move it to pcihp.c.
>
> No functional change intended.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
FWIW given it's just a move.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 14/25] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (12 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 13/25] hw/i386/acpi-build: Move build_append_notification_callback to pcihp Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 13:43 ` Igor Mammedov
2025-05-30 10:24 ` Jonathan Cameron via
2025-05-27 7:40 ` [PATCH v2 15/25] hw/i386/acpi-build: Introduce and use acpi_get_pci_host Eric Auger
` (10 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
We intend to reuse build_append_pci_bus_devices and
build_append_pcihp_slots on ARM. So let's move them to
hw/acpi/pcihp.c as well as all static helpers they
use.
No functional change intended.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
include/hw/acpi/pci.h | 1 -
include/hw/acpi/pcihp.h | 2 +
hw/acpi/pcihp.c | 173 ++++++++++++++++++++++++++++++++++++++++
hw/i386/acpi-build.c | 172 ---------------------------------------
4 files changed, 175 insertions(+), 173 deletions(-)
diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
index ab0187a894..4dca22c0e2 100644
--- a/include/hw/acpi/pci.h
+++ b/include/hw/acpi/pci.h
@@ -37,7 +37,6 @@ typedef struct AcpiMcfgInfo {
void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
const char *oem_id, const char *oem_table_id);
-void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
void build_srat_generic_affinity_structures(GArray *table_data);
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index f4fd44cb32..5506a58862 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -80,6 +80,8 @@ void build_append_pcihp_resources(Aml *table,
uint64_t io_addr, uint64_t io_len);
bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
+void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
+
/* Called on reset */
void acpi_pcihp_reset(AcpiPciHpState *s);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 907a08ac7f..942669ea89 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -27,6 +27,7 @@
#include "qemu/osdep.h"
#include "hw/acpi/pcihp.h"
#include "hw/acpi/aml-build.h"
+#include "hw/acpi/acpi_aml_interface.h"
#include "hw/pci-host/i440fx.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_bridge.h"
@@ -763,6 +764,178 @@ bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus)
return !!nr_notifiers;
}
+static void build_append_pcihp_notify_entry(Aml *method, int slot)
+{
+ Aml *if_ctx;
+ int32_t devfn = PCI_DEVFN(slot, 0);
+
+ if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
+ aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
+ aml_append(method, if_ctx);
+}
+
+static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
+{
+ const PCIDevice *pdev = bus->devices[devfn];
+
+ if (PCI_FUNC(devfn)) {
+ if (IS_PCI_BRIDGE(pdev)) {
+ /*
+ * Ignore only hotplugged PCI bridges on !0 functions, but
+ * allow describing cold plugged bridges on all functions
+ */
+ if (DEVICE(pdev)->hotplugged) {
+ return true;
+ }
+ }
+ }
+ return false;
+}
+
+static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
+{
+ PCIDevice *pdev = bus->devices[devfn];
+ if (pdev) {
+ return is_devfn_ignored_generic(devfn, bus) ||
+ !DEVICE_GET_CLASS(pdev)->hotpluggable ||
+ /* Cold plugged bridges aren't themselves hot-pluggable */
+ (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
+ } else { /* non populated slots */
+ /*
+ * hotplug is supported only for non-multifunction device
+ * so generate device description only for function 0
+ */
+ if (PCI_FUNC(devfn) ||
+ (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
+ return true;
+ }
+ }
+ return false;
+}
+
+static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
+{
+ Aml *method;
+
+ g_assert(pdev->acpi_index != 0);
+ method = aml_method("_DSM", 4, AML_SERIALIZED);
+ {
+ Aml *params = aml_local(0);
+ Aml *pkg = aml_package(1);
+ aml_append(pkg, aml_int(pdev->acpi_index));
+ aml_append(method, aml_store(pkg, params));
+ aml_append(method,
+ aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
+ aml_arg(2), aml_arg(3), params))
+ );
+ }
+ return method;
+}
+
+static Aml *aml_pci_device_dsm(void)
+{
+ Aml *method;
+
+ method = aml_method("_DSM", 4, AML_SERIALIZED);
+ {
+ Aml *params = aml_local(0);
+ Aml *pkg = aml_package(2);
+ aml_append(pkg, aml_int(0));
+ aml_append(pkg, aml_int(0));
+ aml_append(method, aml_store(pkg, params));
+ aml_append(method,
+ aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
+ aml_append(method,
+ aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
+ aml_append(method,
+ aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
+ aml_arg(2), aml_arg(3), params))
+ );
+ }
+ return method;
+}
+
+void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
+{
+ int devfn;
+ Aml *dev, *notify_method = NULL, *method;
+ QObject *bsel = object_property_get_qobject(OBJECT(bus),
+ ACPI_PCIHP_PROP_BSEL, NULL);
+ uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
+ qobject_unref(bsel);
+
+ aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
+ notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
+
+ for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
+ int slot = PCI_SLOT(devfn);
+ int adr = slot << 16 | PCI_FUNC(devfn);
+
+ if (is_devfn_ignored_hotplug(devfn, bus)) {
+ continue;
+ }
+
+ if (bus->devices[devfn]) {
+ dev = aml_scope("S%.02X", devfn);
+ } else {
+ dev = aml_device("S%.02X", devfn);
+ aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
+ }
+
+ /*
+ * Can't declare _SUN here for every device as it changes 'slot'
+ * enumeration order in linux kernel, so use another variable for it
+ */
+ aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
+ aml_append(dev, aml_pci_device_dsm());
+
+ aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
+ /* add _EJ0 to make slot hotpluggable */
+ method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
+ aml_append(method,
+ aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
+ );
+ aml_append(dev, method);
+
+ build_append_pcihp_notify_entry(notify_method, slot);
+
+ /* device descriptor has been composed, add it into parent context */
+ aml_append(parent_scope, dev);
+ }
+ aml_append(parent_scope, notify_method);
+}
+
+void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
+{
+ int devfn;
+ Aml *dev;
+
+ for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
+ /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
+ int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
+ PCIDevice *pdev = bus->devices[devfn];
+
+ if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
+ continue;
+ }
+
+ /* start to compose PCI device descriptor */
+ dev = aml_device("S%.02X", devfn);
+ aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
+
+ call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
+ /* add _DSM if device has acpi-index set */
+ if (pdev->acpi_index &&
+ !object_property_get_bool(OBJECT(pdev), "hotpluggable",
+ &error_abort)) {
+ aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
+ }
+
+ /* device descriptor has been composed, add it into parent context */
+ aml_append(parent_scope, dev);
+ }
+}
+
const VMStateDescription vmstate_acpi_pcihp_pci_status = {
.name = "acpi_pcihp_pci_status",
.version_id = 1,
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 3275675e60..fe8bc62c03 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -338,29 +338,6 @@ build_facs(GArray *table_data)
g_array_append_vals(table_data, reserved, 40); /* Reserved */
}
-static Aml *aml_pci_device_dsm(void)
-{
- Aml *method;
-
- method = aml_method("_DSM", 4, AML_SERIALIZED);
- {
- Aml *params = aml_local(0);
- Aml *pkg = aml_package(2);
- aml_append(pkg, aml_int(0));
- aml_append(pkg, aml_int(0));
- aml_append(method, aml_store(pkg, params));
- aml_append(method,
- aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
- aml_append(method,
- aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
- aml_append(method,
- aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
- aml_arg(2), aml_arg(3), params))
- );
- }
- return method;
-}
-
static Aml *aml_pci_edsm(void)
{
Aml *method, *ifctx;
@@ -414,155 +391,6 @@ static Aml *aml_pci_edsm(void)
return method;
}
-static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
-{
- Aml *method;
-
- g_assert(pdev->acpi_index != 0);
- method = aml_method("_DSM", 4, AML_SERIALIZED);
- {
- Aml *params = aml_local(0);
- Aml *pkg = aml_package(1);
- aml_append(pkg, aml_int(pdev->acpi_index));
- aml_append(method, aml_store(pkg, params));
- aml_append(method,
- aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
- aml_arg(2), aml_arg(3), params))
- );
- }
- return method;
-}
-
-static void build_append_pcihp_notify_entry(Aml *method, int slot)
-{
- Aml *if_ctx;
- int32_t devfn = PCI_DEVFN(slot, 0);
-
- if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
- aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
- aml_append(method, if_ctx);
-}
-
-static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
-{
- const PCIDevice *pdev = bus->devices[devfn];
-
- if (PCI_FUNC(devfn)) {
- if (IS_PCI_BRIDGE(pdev)) {
- /*
- * Ignore only hotplugged PCI bridges on !0 functions, but
- * allow describing cold plugged bridges on all functions
- */
- if (DEVICE(pdev)->hotplugged) {
- return true;
- }
- }
- }
- return false;
-}
-
-static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
-{
- PCIDevice *pdev = bus->devices[devfn];
- if (pdev) {
- return is_devfn_ignored_generic(devfn, bus) ||
- !DEVICE_GET_CLASS(pdev)->hotpluggable ||
- /* Cold plugged bridges aren't themselves hot-pluggable */
- (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
- } else { /* non populated slots */
- /*
- * hotplug is supported only for non-multifunction device
- * so generate device description only for function 0
- */
- if (PCI_FUNC(devfn) ||
- (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
- return true;
- }
- }
- return false;
-}
-
-void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
-{
- int devfn;
- Aml *dev, *notify_method = NULL, *method;
- QObject *bsel = object_property_get_qobject(OBJECT(bus),
- ACPI_PCIHP_PROP_BSEL, NULL);
- uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
- qobject_unref(bsel);
-
- aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
- notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
-
- for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
- int slot = PCI_SLOT(devfn);
- int adr = slot << 16 | PCI_FUNC(devfn);
-
- if (is_devfn_ignored_hotplug(devfn, bus)) {
- continue;
- }
-
- if (bus->devices[devfn]) {
- dev = aml_scope("S%.02X", devfn);
- } else {
- dev = aml_device("S%.02X", devfn);
- aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
- }
-
- /*
- * Can't declare _SUN here for every device as it changes 'slot'
- * enumeration order in linux kernel, so use another variable for it
- */
- aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
- aml_append(dev, aml_pci_device_dsm());
-
- aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
- /* add _EJ0 to make slot hotpluggable */
- method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
- aml_append(method,
- aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
- );
- aml_append(dev, method);
-
- build_append_pcihp_notify_entry(notify_method, slot);
-
- /* device descriptor has been composed, add it into parent context */
- aml_append(parent_scope, dev);
- }
- aml_append(parent_scope, notify_method);
-}
-
-void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
-{
- int devfn;
- Aml *dev;
-
- for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
- /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
- int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
- PCIDevice *pdev = bus->devices[devfn];
-
- if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
- continue;
- }
-
- /* start to compose PCI device descriptor */
- dev = aml_device("S%.02X", devfn);
- aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
-
- call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
- /* add _DSM if device has acpi-index set */
- if (pdev->acpi_index &&
- !object_property_get_bool(OBJECT(pdev), "hotpluggable",
- &error_abort)) {
- aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
- }
-
- /* device descriptor has been composed, add it into parent context */
- aml_append(parent_scope, dev);
- }
-}
-
/*
* build_prt - Define interrupt routing rules
*
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 14/25] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
2025-05-27 7:40 ` [PATCH v2 14/25] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots " Eric Auger
@ 2025-05-27 13:43 ` Igor Mammedov
2025-05-30 10:24 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 13:43 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:16 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> We intend to reuse build_append_pci_bus_devices and
> build_append_pcihp_slots on ARM. So let's move them to
> hw/acpi/pcihp.c as well as all static helpers they
> use.
>
> No functional change intended.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> include/hw/acpi/pci.h | 1 -
> include/hw/acpi/pcihp.h | 2 +
> hw/acpi/pcihp.c | 173 ++++++++++++++++++++++++++++++++++++++++
> hw/i386/acpi-build.c | 172 ---------------------------------------
> 4 files changed, 175 insertions(+), 173 deletions(-)
>
> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> index ab0187a894..4dca22c0e2 100644
> --- a/include/hw/acpi/pci.h
> +++ b/include/hw/acpi/pci.h
> @@ -37,7 +37,6 @@ typedef struct AcpiMcfgInfo {
> void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
> const char *oem_id, const char *oem_table_id);
>
> -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
> void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
>
> void build_srat_generic_affinity_structures(GArray *table_data);
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index f4fd44cb32..5506a58862 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -80,6 +80,8 @@ void build_append_pcihp_resources(Aml *table,
> uint64_t io_addr, uint64_t io_len);
> bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
>
> +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
> +
> /* Called on reset */
> void acpi_pcihp_reset(AcpiPciHpState *s);
>
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index 907a08ac7f..942669ea89 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -27,6 +27,7 @@
> #include "qemu/osdep.h"
> #include "hw/acpi/pcihp.h"
> #include "hw/acpi/aml-build.h"
> +#include "hw/acpi/acpi_aml_interface.h"
> #include "hw/pci-host/i440fx.h"
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_bridge.h"
> @@ -763,6 +764,178 @@ bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus)
> return !!nr_notifiers;
> }
>
> +static void build_append_pcihp_notify_entry(Aml *method, int slot)
> +{
> + Aml *if_ctx;
> + int32_t devfn = PCI_DEVFN(slot, 0);
> +
> + if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
> + aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
> + aml_append(method, if_ctx);
> +}
> +
> +static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
> +{
> + const PCIDevice *pdev = bus->devices[devfn];
> +
> + if (PCI_FUNC(devfn)) {
> + if (IS_PCI_BRIDGE(pdev)) {
> + /*
> + * Ignore only hotplugged PCI bridges on !0 functions, but
> + * allow describing cold plugged bridges on all functions
> + */
> + if (DEVICE(pdev)->hotplugged) {
> + return true;
> + }
> + }
> + }
> + return false;
> +}
> +
> +static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
> +{
> + PCIDevice *pdev = bus->devices[devfn];
> + if (pdev) {
> + return is_devfn_ignored_generic(devfn, bus) ||
> + !DEVICE_GET_CLASS(pdev)->hotpluggable ||
> + /* Cold plugged bridges aren't themselves hot-pluggable */
> + (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
> + } else { /* non populated slots */
> + /*
> + * hotplug is supported only for non-multifunction device
> + * so generate device description only for function 0
> + */
> + if (PCI_FUNC(devfn) ||
> + (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
> + return true;
> + }
> + }
> + return false;
> +}
> +
> +static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
> +{
> + Aml *method;
> +
> + g_assert(pdev->acpi_index != 0);
> + method = aml_method("_DSM", 4, AML_SERIALIZED);
> + {
> + Aml *params = aml_local(0);
> + Aml *pkg = aml_package(1);
> + aml_append(pkg, aml_int(pdev->acpi_index));
> + aml_append(method, aml_store(pkg, params));
> + aml_append(method,
> + aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
> + aml_arg(2), aml_arg(3), params))
> + );
> + }
> + return method;
> +}
> +
> +static Aml *aml_pci_device_dsm(void)
> +{
> + Aml *method;
> +
> + method = aml_method("_DSM", 4, AML_SERIALIZED);
> + {
> + Aml *params = aml_local(0);
> + Aml *pkg = aml_package(2);
> + aml_append(pkg, aml_int(0));
> + aml_append(pkg, aml_int(0));
> + aml_append(method, aml_store(pkg, params));
> + aml_append(method,
> + aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
> + aml_append(method,
> + aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
> + aml_append(method,
> + aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
> + aml_arg(2), aml_arg(3), params))
> + );
> + }
> + return method;
> +}
> +
> +void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
> +{
> + int devfn;
> + Aml *dev, *notify_method = NULL, *method;
> + QObject *bsel = object_property_get_qobject(OBJECT(bus),
> + ACPI_PCIHP_PROP_BSEL, NULL);
> + uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
> + qobject_unref(bsel);
> +
> + aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
> + notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
> +
> + for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> + int slot = PCI_SLOT(devfn);
> + int adr = slot << 16 | PCI_FUNC(devfn);
> +
> + if (is_devfn_ignored_hotplug(devfn, bus)) {
> + continue;
> + }
> +
> + if (bus->devices[devfn]) {
> + dev = aml_scope("S%.02X", devfn);
> + } else {
> + dev = aml_device("S%.02X", devfn);
> + aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> + }
> +
> + /*
> + * Can't declare _SUN here for every device as it changes 'slot'
> + * enumeration order in linux kernel, so use another variable for it
> + */
> + aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
> + aml_append(dev, aml_pci_device_dsm());
> +
> + aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
> + /* add _EJ0 to make slot hotpluggable */
> + method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
> + aml_append(method,
> + aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
> + );
> + aml_append(dev, method);
> +
> + build_append_pcihp_notify_entry(notify_method, slot);
> +
> + /* device descriptor has been composed, add it into parent context */
> + aml_append(parent_scope, dev);
> + }
> + aml_append(parent_scope, notify_method);
> +}
> +
> +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
> +{
> + int devfn;
> + Aml *dev;
> +
> + for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> + /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
> + int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
> + PCIDevice *pdev = bus->devices[devfn];
> +
> + if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
> + continue;
> + }
> +
> + /* start to compose PCI device descriptor */
> + dev = aml_device("S%.02X", devfn);
> + aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> +
> + call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
> + /* add _DSM if device has acpi-index set */
> + if (pdev->acpi_index &&
> + !object_property_get_bool(OBJECT(pdev), "hotpluggable",
> + &error_abort)) {
> + aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
> + }
> +
> + /* device descriptor has been composed, add it into parent context */
> + aml_append(parent_scope, dev);
> + }
> +}
> +
> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
> .name = "acpi_pcihp_pci_status",
> .version_id = 1,
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 3275675e60..fe8bc62c03 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -338,29 +338,6 @@ build_facs(GArray *table_data)
> g_array_append_vals(table_data, reserved, 40); /* Reserved */
> }
>
> -static Aml *aml_pci_device_dsm(void)
> -{
> - Aml *method;
> -
> - method = aml_method("_DSM", 4, AML_SERIALIZED);
> - {
> - Aml *params = aml_local(0);
> - Aml *pkg = aml_package(2);
> - aml_append(pkg, aml_int(0));
> - aml_append(pkg, aml_int(0));
> - aml_append(method, aml_store(pkg, params));
> - aml_append(method,
> - aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
> - aml_append(method,
> - aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
> - aml_append(method,
> - aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
> - aml_arg(2), aml_arg(3), params))
> - );
> - }
> - return method;
> -}
> -
> static Aml *aml_pci_edsm(void)
> {
> Aml *method, *ifctx;
> @@ -414,155 +391,6 @@ static Aml *aml_pci_edsm(void)
> return method;
> }
>
> -static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
> -{
> - Aml *method;
> -
> - g_assert(pdev->acpi_index != 0);
> - method = aml_method("_DSM", 4, AML_SERIALIZED);
> - {
> - Aml *params = aml_local(0);
> - Aml *pkg = aml_package(1);
> - aml_append(pkg, aml_int(pdev->acpi_index));
> - aml_append(method, aml_store(pkg, params));
> - aml_append(method,
> - aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
> - aml_arg(2), aml_arg(3), params))
> - );
> - }
> - return method;
> -}
> -
> -static void build_append_pcihp_notify_entry(Aml *method, int slot)
> -{
> - Aml *if_ctx;
> - int32_t devfn = PCI_DEVFN(slot, 0);
> -
> - if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
> - aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
> - aml_append(method, if_ctx);
> -}
> -
> -static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
> -{
> - const PCIDevice *pdev = bus->devices[devfn];
> -
> - if (PCI_FUNC(devfn)) {
> - if (IS_PCI_BRIDGE(pdev)) {
> - /*
> - * Ignore only hotplugged PCI bridges on !0 functions, but
> - * allow describing cold plugged bridges on all functions
> - */
> - if (DEVICE(pdev)->hotplugged) {
> - return true;
> - }
> - }
> - }
> - return false;
> -}
> -
> -static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
> -{
> - PCIDevice *pdev = bus->devices[devfn];
> - if (pdev) {
> - return is_devfn_ignored_generic(devfn, bus) ||
> - !DEVICE_GET_CLASS(pdev)->hotpluggable ||
> - /* Cold plugged bridges aren't themselves hot-pluggable */
> - (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
> - } else { /* non populated slots */
> - /*
> - * hotplug is supported only for non-multifunction device
> - * so generate device description only for function 0
> - */
> - if (PCI_FUNC(devfn) ||
> - (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
> - return true;
> - }
> - }
> - return false;
> -}
> -
> -void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
> -{
> - int devfn;
> - Aml *dev, *notify_method = NULL, *method;
> - QObject *bsel = object_property_get_qobject(OBJECT(bus),
> - ACPI_PCIHP_PROP_BSEL, NULL);
> - uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
> - qobject_unref(bsel);
> -
> - aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
> - notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
> -
> - for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> - int slot = PCI_SLOT(devfn);
> - int adr = slot << 16 | PCI_FUNC(devfn);
> -
> - if (is_devfn_ignored_hotplug(devfn, bus)) {
> - continue;
> - }
> -
> - if (bus->devices[devfn]) {
> - dev = aml_scope("S%.02X", devfn);
> - } else {
> - dev = aml_device("S%.02X", devfn);
> - aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> - }
> -
> - /*
> - * Can't declare _SUN here for every device as it changes 'slot'
> - * enumeration order in linux kernel, so use another variable for it
> - */
> - aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
> - aml_append(dev, aml_pci_device_dsm());
> -
> - aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
> - /* add _EJ0 to make slot hotpluggable */
> - method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
> - aml_append(method,
> - aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
> - );
> - aml_append(dev, method);
> -
> - build_append_pcihp_notify_entry(notify_method, slot);
> -
> - /* device descriptor has been composed, add it into parent context */
> - aml_append(parent_scope, dev);
> - }
> - aml_append(parent_scope, notify_method);
> -}
> -
> -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
> -{
> - int devfn;
> - Aml *dev;
> -
> - for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> - /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
> - int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
> - PCIDevice *pdev = bus->devices[devfn];
> -
> - if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
> - continue;
> - }
> -
> - /* start to compose PCI device descriptor */
> - dev = aml_device("S%.02X", devfn);
> - aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> -
> - call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
> - /* add _DSM if device has acpi-index set */
> - if (pdev->acpi_index &&
> - !object_property_get_bool(OBJECT(pdev), "hotpluggable",
> - &error_abort)) {
> - aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
> - }
> -
> - /* device descriptor has been composed, add it into parent context */
> - aml_append(parent_scope, dev);
> - }
> -}
> -
> /*
> * build_prt - Define interrupt routing rules
> *
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 14/25] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
2025-05-27 7:40 ` [PATCH v2 14/25] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots " Eric Auger
@ 2025-05-30 10:24 ` Jonathan Cameron via
2025-05-30 10:24 ` Jonathan Cameron via
1 sibling, 0 replies; 121+ messages in thread
From: Jonathan Cameron @ 2025-05-30 10:24 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:16 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> We intend to reuse build_append_pci_bus_devices and
> build_append_pcihp_slots on ARM. So let's move them to
> hw/acpi/pcihp.c as well as all static helpers they
> use.
Oddly short wrap. I guess it kind of looks prettier than ...
We intend to reuse build_append_pci_bus_devices and
build_append_pcihp_slots on ARM. So let's move them to hw/acpi/pcihp.c as
well as all static helpers they use.
... so I'm not that fussed.
I don't really mind, but maybe a short statement of why you
put the functions in a different order in the destination
would be a good thing to add to this description?
Either way
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> No functional change intended.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> ---
> include/hw/acpi/pci.h | 1 -
> include/hw/acpi/pcihp.h | 2 +
> hw/acpi/pcihp.c | 173 ++++++++++++++++++++++++++++++++++++++++
> hw/i386/acpi-build.c | 172 ---------------------------------------
> 4 files changed, 175 insertions(+), 173 deletions(-)
>
> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> index ab0187a894..4dca22c0e2 100644
> --- a/include/hw/acpi/pci.h
> +++ b/include/hw/acpi/pci.h
> @@ -37,7 +37,6 @@ typedef struct AcpiMcfgInfo {
> void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
> const char *oem_id, const char *oem_table_id);
>
> -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
> void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
>
> void build_srat_generic_affinity_structures(GArray *table_data);
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index f4fd44cb32..5506a58862 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -80,6 +80,8 @@ void build_append_pcihp_resources(Aml *table,
> uint64_t io_addr, uint64_t io_len);
> bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
>
> +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
> +
> /* Called on reset */
> void acpi_pcihp_reset(AcpiPciHpState *s);
>
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index 907a08ac7f..942669ea89 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -27,6 +27,7 @@
> #include "qemu/osdep.h"
> #include "hw/acpi/pcihp.h"
> #include "hw/acpi/aml-build.h"
> +#include "hw/acpi/acpi_aml_interface.h"
> #include "hw/pci-host/i440fx.h"
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_bridge.h"
> @@ -763,6 +764,178 @@ bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus)
> return !!nr_notifiers;
> }
>
> +static void build_append_pcihp_notify_entry(Aml *method, int slot)
> +{
> + Aml *if_ctx;
> + int32_t devfn = PCI_DEVFN(slot, 0);
> +
> + if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
> + aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
> + aml_append(method, if_ctx);
> +}
> +
> +static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
> +{
> + const PCIDevice *pdev = bus->devices[devfn];
> +
> + if (PCI_FUNC(devfn)) {
> + if (IS_PCI_BRIDGE(pdev)) {
> + /*
> + * Ignore only hotplugged PCI bridges on !0 functions, but
> + * allow describing cold plugged bridges on all functions
> + */
> + if (DEVICE(pdev)->hotplugged) {
> + return true;
> + }
> + }
> + }
> + return false;
> +}
> +
> +static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
> +{
> + PCIDevice *pdev = bus->devices[devfn];
> + if (pdev) {
> + return is_devfn_ignored_generic(devfn, bus) ||
> + !DEVICE_GET_CLASS(pdev)->hotpluggable ||
> + /* Cold plugged bridges aren't themselves hot-pluggable */
> + (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
> + } else { /* non populated slots */
> + /*
> + * hotplug is supported only for non-multifunction device
> + * so generate device description only for function 0
> + */
> + if (PCI_FUNC(devfn) ||
> + (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
> + return true;
> + }
> + }
> + return false;
> +}
> +
> +static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
> +{
> + Aml *method;
> +
> + g_assert(pdev->acpi_index != 0);
> + method = aml_method("_DSM", 4, AML_SERIALIZED);
> + {
> + Aml *params = aml_local(0);
> + Aml *pkg = aml_package(1);
> + aml_append(pkg, aml_int(pdev->acpi_index));
> + aml_append(method, aml_store(pkg, params));
> + aml_append(method,
> + aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
> + aml_arg(2), aml_arg(3), params))
> + );
> + }
> + return method;
> +}
> +
> +static Aml *aml_pci_device_dsm(void)
> +{
> + Aml *method;
> +
> + method = aml_method("_DSM", 4, AML_SERIALIZED);
> + {
> + Aml *params = aml_local(0);
> + Aml *pkg = aml_package(2);
> + aml_append(pkg, aml_int(0));
> + aml_append(pkg, aml_int(0));
> + aml_append(method, aml_store(pkg, params));
> + aml_append(method,
> + aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
> + aml_append(method,
> + aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
> + aml_append(method,
> + aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
> + aml_arg(2), aml_arg(3), params))
> + );
> + }
> + return method;
> +}
> +
> +void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
> +{
> + int devfn;
> + Aml *dev, *notify_method = NULL, *method;
> + QObject *bsel = object_property_get_qobject(OBJECT(bus),
> + ACPI_PCIHP_PROP_BSEL, NULL);
> + uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
> + qobject_unref(bsel);
> +
> + aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
> + notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
> +
> + for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> + int slot = PCI_SLOT(devfn);
> + int adr = slot << 16 | PCI_FUNC(devfn);
> +
> + if (is_devfn_ignored_hotplug(devfn, bus)) {
> + continue;
> + }
> +
> + if (bus->devices[devfn]) {
> + dev = aml_scope("S%.02X", devfn);
> + } else {
> + dev = aml_device("S%.02X", devfn);
> + aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> + }
> +
> + /*
> + * Can't declare _SUN here for every device as it changes 'slot'
> + * enumeration order in linux kernel, so use another variable for it
> + */
> + aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
> + aml_append(dev, aml_pci_device_dsm());
> +
> + aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
> + /* add _EJ0 to make slot hotpluggable */
> + method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
> + aml_append(method,
> + aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
> + );
> + aml_append(dev, method);
> +
> + build_append_pcihp_notify_entry(notify_method, slot);
> +
> + /* device descriptor has been composed, add it into parent context */
> + aml_append(parent_scope, dev);
> + }
> + aml_append(parent_scope, notify_method);
> +}
> +
> +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
> +{
> + int devfn;
> + Aml *dev;
> +
> + for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> + /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
> + int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
> + PCIDevice *pdev = bus->devices[devfn];
> +
> + if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
> + continue;
> + }
> +
> + /* start to compose PCI device descriptor */
> + dev = aml_device("S%.02X", devfn);
> + aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> +
> + call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
> + /* add _DSM if device has acpi-index set */
> + if (pdev->acpi_index &&
> + !object_property_get_bool(OBJECT(pdev), "hotpluggable",
> + &error_abort)) {
> + aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
> + }
> +
> + /* device descriptor has been composed, add it into parent context */
> + aml_append(parent_scope, dev);
> + }
> +}
> +
> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
> .name = "acpi_pcihp_pci_status",
> .version_id = 1,
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 3275675e60..fe8bc62c03 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -338,29 +338,6 @@ build_facs(GArray *table_data)
> g_array_append_vals(table_data, reserved, 40); /* Reserved */
> }
>
> -static Aml *aml_pci_device_dsm(void)
> -{
> - Aml *method;
> -
> - method = aml_method("_DSM", 4, AML_SERIALIZED);
> - {
> - Aml *params = aml_local(0);
> - Aml *pkg = aml_package(2);
> - aml_append(pkg, aml_int(0));
> - aml_append(pkg, aml_int(0));
> - aml_append(method, aml_store(pkg, params));
> - aml_append(method,
> - aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
> - aml_append(method,
> - aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
> - aml_append(method,
> - aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
> - aml_arg(2), aml_arg(3), params))
> - );
> - }
> - return method;
> -}
> -
> static Aml *aml_pci_edsm(void)
> {
> Aml *method, *ifctx;
> @@ -414,155 +391,6 @@ static Aml *aml_pci_edsm(void)
> return method;
> }
>
> -static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
> -{
> - Aml *method;
> -
> - g_assert(pdev->acpi_index != 0);
> - method = aml_method("_DSM", 4, AML_SERIALIZED);
> - {
> - Aml *params = aml_local(0);
> - Aml *pkg = aml_package(1);
> - aml_append(pkg, aml_int(pdev->acpi_index));
> - aml_append(method, aml_store(pkg, params));
> - aml_append(method,
> - aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
> - aml_arg(2), aml_arg(3), params))
> - );
> - }
> - return method;
> -}
> -
> -static void build_append_pcihp_notify_entry(Aml *method, int slot)
> -{
> - Aml *if_ctx;
> - int32_t devfn = PCI_DEVFN(slot, 0);
> -
> - if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
> - aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
> - aml_append(method, if_ctx);
> -}
> -
> -static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
> -{
> - const PCIDevice *pdev = bus->devices[devfn];
> -
> - if (PCI_FUNC(devfn)) {
> - if (IS_PCI_BRIDGE(pdev)) {
> - /*
> - * Ignore only hotplugged PCI bridges on !0 functions, but
> - * allow describing cold plugged bridges on all functions
> - */
> - if (DEVICE(pdev)->hotplugged) {
> - return true;
> - }
> - }
> - }
> - return false;
> -}
> -
> -static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
> -{
> - PCIDevice *pdev = bus->devices[devfn];
> - if (pdev) {
> - return is_devfn_ignored_generic(devfn, bus) ||
> - !DEVICE_GET_CLASS(pdev)->hotpluggable ||
> - /* Cold plugged bridges aren't themselves hot-pluggable */
> - (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
> - } else { /* non populated slots */
> - /*
> - * hotplug is supported only for non-multifunction device
> - * so generate device description only for function 0
> - */
> - if (PCI_FUNC(devfn) ||
> - (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
> - return true;
> - }
> - }
> - return false;
> -}
> -
> -void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
> -{
> - int devfn;
> - Aml *dev, *notify_method = NULL, *method;
> - QObject *bsel = object_property_get_qobject(OBJECT(bus),
> - ACPI_PCIHP_PROP_BSEL, NULL);
> - uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
> - qobject_unref(bsel);
> -
> - aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
> - notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
> -
> - for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> - int slot = PCI_SLOT(devfn);
> - int adr = slot << 16 | PCI_FUNC(devfn);
> -
> - if (is_devfn_ignored_hotplug(devfn, bus)) {
> - continue;
> - }
> -
> - if (bus->devices[devfn]) {
> - dev = aml_scope("S%.02X", devfn);
> - } else {
> - dev = aml_device("S%.02X", devfn);
> - aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> - }
> -
> - /*
> - * Can't declare _SUN here for every device as it changes 'slot'
> - * enumeration order in linux kernel, so use another variable for it
> - */
> - aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
> - aml_append(dev, aml_pci_device_dsm());
> -
> - aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
> - /* add _EJ0 to make slot hotpluggable */
> - method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
> - aml_append(method,
> - aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
> - );
> - aml_append(dev, method);
> -
> - build_append_pcihp_notify_entry(notify_method, slot);
> -
> - /* device descriptor has been composed, add it into parent context */
> - aml_append(parent_scope, dev);
> - }
> - aml_append(parent_scope, notify_method);
> -}
> -
> -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
> -{
> - int devfn;
> - Aml *dev;
> -
> - for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> - /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
> - int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
> - PCIDevice *pdev = bus->devices[devfn];
> -
> - if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
> - continue;
> - }
> -
> - /* start to compose PCI device descriptor */
> - dev = aml_device("S%.02X", devfn);
> - aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> -
> - call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
> - /* add _DSM if device has acpi-index set */
> - if (pdev->acpi_index &&
> - !object_property_get_bool(OBJECT(pdev), "hotpluggable",
> - &error_abort)) {
> - aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
> - }
> -
> - /* device descriptor has been composed, add it into parent context */
> - aml_append(parent_scope, dev);
> - }
> -}
> -
> /*
> * build_prt - Define interrupt routing rules
> *
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 14/25] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
@ 2025-05-30 10:24 ` Jonathan Cameron via
0 siblings, 0 replies; 121+ messages in thread
From: Jonathan Cameron via @ 2025-05-30 10:24 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Tue, 27 May 2025 09:40:16 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> We intend to reuse build_append_pci_bus_devices and
> build_append_pcihp_slots on ARM. So let's move them to
> hw/acpi/pcihp.c as well as all static helpers they
> use.
Oddly short wrap. I guess it kind of looks prettier than ...
We intend to reuse build_append_pci_bus_devices and
build_append_pcihp_slots on ARM. So let's move them to hw/acpi/pcihp.c as
well as all static helpers they use.
... so I'm not that fussed.
I don't really mind, but maybe a short statement of why you
put the functions in a different order in the destination
would be a good thing to add to this description?
Either way
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> No functional change intended.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> ---
> include/hw/acpi/pci.h | 1 -
> include/hw/acpi/pcihp.h | 2 +
> hw/acpi/pcihp.c | 173 ++++++++++++++++++++++++++++++++++++++++
> hw/i386/acpi-build.c | 172 ---------------------------------------
> 4 files changed, 175 insertions(+), 173 deletions(-)
>
> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> index ab0187a894..4dca22c0e2 100644
> --- a/include/hw/acpi/pci.h
> +++ b/include/hw/acpi/pci.h
> @@ -37,7 +37,6 @@ typedef struct AcpiMcfgInfo {
> void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
> const char *oem_id, const char *oem_table_id);
>
> -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
> void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
>
> void build_srat_generic_affinity_structures(GArray *table_data);
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index f4fd44cb32..5506a58862 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -80,6 +80,8 @@ void build_append_pcihp_resources(Aml *table,
> uint64_t io_addr, uint64_t io_len);
> bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
>
> +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
> +
> /* Called on reset */
> void acpi_pcihp_reset(AcpiPciHpState *s);
>
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index 907a08ac7f..942669ea89 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -27,6 +27,7 @@
> #include "qemu/osdep.h"
> #include "hw/acpi/pcihp.h"
> #include "hw/acpi/aml-build.h"
> +#include "hw/acpi/acpi_aml_interface.h"
> #include "hw/pci-host/i440fx.h"
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_bridge.h"
> @@ -763,6 +764,178 @@ bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus)
> return !!nr_notifiers;
> }
>
> +static void build_append_pcihp_notify_entry(Aml *method, int slot)
> +{
> + Aml *if_ctx;
> + int32_t devfn = PCI_DEVFN(slot, 0);
> +
> + if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
> + aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
> + aml_append(method, if_ctx);
> +}
> +
> +static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
> +{
> + const PCIDevice *pdev = bus->devices[devfn];
> +
> + if (PCI_FUNC(devfn)) {
> + if (IS_PCI_BRIDGE(pdev)) {
> + /*
> + * Ignore only hotplugged PCI bridges on !0 functions, but
> + * allow describing cold plugged bridges on all functions
> + */
> + if (DEVICE(pdev)->hotplugged) {
> + return true;
> + }
> + }
> + }
> + return false;
> +}
> +
> +static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
> +{
> + PCIDevice *pdev = bus->devices[devfn];
> + if (pdev) {
> + return is_devfn_ignored_generic(devfn, bus) ||
> + !DEVICE_GET_CLASS(pdev)->hotpluggable ||
> + /* Cold plugged bridges aren't themselves hot-pluggable */
> + (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
> + } else { /* non populated slots */
> + /*
> + * hotplug is supported only for non-multifunction device
> + * so generate device description only for function 0
> + */
> + if (PCI_FUNC(devfn) ||
> + (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
> + return true;
> + }
> + }
> + return false;
> +}
> +
> +static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
> +{
> + Aml *method;
> +
> + g_assert(pdev->acpi_index != 0);
> + method = aml_method("_DSM", 4, AML_SERIALIZED);
> + {
> + Aml *params = aml_local(0);
> + Aml *pkg = aml_package(1);
> + aml_append(pkg, aml_int(pdev->acpi_index));
> + aml_append(method, aml_store(pkg, params));
> + aml_append(method,
> + aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
> + aml_arg(2), aml_arg(3), params))
> + );
> + }
> + return method;
> +}
> +
> +static Aml *aml_pci_device_dsm(void)
> +{
> + Aml *method;
> +
> + method = aml_method("_DSM", 4, AML_SERIALIZED);
> + {
> + Aml *params = aml_local(0);
> + Aml *pkg = aml_package(2);
> + aml_append(pkg, aml_int(0));
> + aml_append(pkg, aml_int(0));
> + aml_append(method, aml_store(pkg, params));
> + aml_append(method,
> + aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
> + aml_append(method,
> + aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
> + aml_append(method,
> + aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
> + aml_arg(2), aml_arg(3), params))
> + );
> + }
> + return method;
> +}
> +
> +void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
> +{
> + int devfn;
> + Aml *dev, *notify_method = NULL, *method;
> + QObject *bsel = object_property_get_qobject(OBJECT(bus),
> + ACPI_PCIHP_PROP_BSEL, NULL);
> + uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
> + qobject_unref(bsel);
> +
> + aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
> + notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
> +
> + for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> + int slot = PCI_SLOT(devfn);
> + int adr = slot << 16 | PCI_FUNC(devfn);
> +
> + if (is_devfn_ignored_hotplug(devfn, bus)) {
> + continue;
> + }
> +
> + if (bus->devices[devfn]) {
> + dev = aml_scope("S%.02X", devfn);
> + } else {
> + dev = aml_device("S%.02X", devfn);
> + aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> + }
> +
> + /*
> + * Can't declare _SUN here for every device as it changes 'slot'
> + * enumeration order in linux kernel, so use another variable for it
> + */
> + aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
> + aml_append(dev, aml_pci_device_dsm());
> +
> + aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
> + /* add _EJ0 to make slot hotpluggable */
> + method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
> + aml_append(method,
> + aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
> + );
> + aml_append(dev, method);
> +
> + build_append_pcihp_notify_entry(notify_method, slot);
> +
> + /* device descriptor has been composed, add it into parent context */
> + aml_append(parent_scope, dev);
> + }
> + aml_append(parent_scope, notify_method);
> +}
> +
> +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
> +{
> + int devfn;
> + Aml *dev;
> +
> + for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> + /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
> + int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
> + PCIDevice *pdev = bus->devices[devfn];
> +
> + if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
> + continue;
> + }
> +
> + /* start to compose PCI device descriptor */
> + dev = aml_device("S%.02X", devfn);
> + aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> +
> + call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
> + /* add _DSM if device has acpi-index set */
> + if (pdev->acpi_index &&
> + !object_property_get_bool(OBJECT(pdev), "hotpluggable",
> + &error_abort)) {
> + aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
> + }
> +
> + /* device descriptor has been composed, add it into parent context */
> + aml_append(parent_scope, dev);
> + }
> +}
> +
> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
> .name = "acpi_pcihp_pci_status",
> .version_id = 1,
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 3275675e60..fe8bc62c03 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -338,29 +338,6 @@ build_facs(GArray *table_data)
> g_array_append_vals(table_data, reserved, 40); /* Reserved */
> }
>
> -static Aml *aml_pci_device_dsm(void)
> -{
> - Aml *method;
> -
> - method = aml_method("_DSM", 4, AML_SERIALIZED);
> - {
> - Aml *params = aml_local(0);
> - Aml *pkg = aml_package(2);
> - aml_append(pkg, aml_int(0));
> - aml_append(pkg, aml_int(0));
> - aml_append(method, aml_store(pkg, params));
> - aml_append(method,
> - aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
> - aml_append(method,
> - aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
> - aml_append(method,
> - aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
> - aml_arg(2), aml_arg(3), params))
> - );
> - }
> - return method;
> -}
> -
> static Aml *aml_pci_edsm(void)
> {
> Aml *method, *ifctx;
> @@ -414,155 +391,6 @@ static Aml *aml_pci_edsm(void)
> return method;
> }
>
> -static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
> -{
> - Aml *method;
> -
> - g_assert(pdev->acpi_index != 0);
> - method = aml_method("_DSM", 4, AML_SERIALIZED);
> - {
> - Aml *params = aml_local(0);
> - Aml *pkg = aml_package(1);
> - aml_append(pkg, aml_int(pdev->acpi_index));
> - aml_append(method, aml_store(pkg, params));
> - aml_append(method,
> - aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
> - aml_arg(2), aml_arg(3), params))
> - );
> - }
> - return method;
> -}
> -
> -static void build_append_pcihp_notify_entry(Aml *method, int slot)
> -{
> - Aml *if_ctx;
> - int32_t devfn = PCI_DEVFN(slot, 0);
> -
> - if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
> - aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
> - aml_append(method, if_ctx);
> -}
> -
> -static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
> -{
> - const PCIDevice *pdev = bus->devices[devfn];
> -
> - if (PCI_FUNC(devfn)) {
> - if (IS_PCI_BRIDGE(pdev)) {
> - /*
> - * Ignore only hotplugged PCI bridges on !0 functions, but
> - * allow describing cold plugged bridges on all functions
> - */
> - if (DEVICE(pdev)->hotplugged) {
> - return true;
> - }
> - }
> - }
> - return false;
> -}
> -
> -static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
> -{
> - PCIDevice *pdev = bus->devices[devfn];
> - if (pdev) {
> - return is_devfn_ignored_generic(devfn, bus) ||
> - !DEVICE_GET_CLASS(pdev)->hotpluggable ||
> - /* Cold plugged bridges aren't themselves hot-pluggable */
> - (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
> - } else { /* non populated slots */
> - /*
> - * hotplug is supported only for non-multifunction device
> - * so generate device description only for function 0
> - */
> - if (PCI_FUNC(devfn) ||
> - (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
> - return true;
> - }
> - }
> - return false;
> -}
> -
> -void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
> -{
> - int devfn;
> - Aml *dev, *notify_method = NULL, *method;
> - QObject *bsel = object_property_get_qobject(OBJECT(bus),
> - ACPI_PCIHP_PROP_BSEL, NULL);
> - uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
> - qobject_unref(bsel);
> -
> - aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
> - notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
> -
> - for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> - int slot = PCI_SLOT(devfn);
> - int adr = slot << 16 | PCI_FUNC(devfn);
> -
> - if (is_devfn_ignored_hotplug(devfn, bus)) {
> - continue;
> - }
> -
> - if (bus->devices[devfn]) {
> - dev = aml_scope("S%.02X", devfn);
> - } else {
> - dev = aml_device("S%.02X", devfn);
> - aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> - }
> -
> - /*
> - * Can't declare _SUN here for every device as it changes 'slot'
> - * enumeration order in linux kernel, so use another variable for it
> - */
> - aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
> - aml_append(dev, aml_pci_device_dsm());
> -
> - aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
> - /* add _EJ0 to make slot hotpluggable */
> - method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
> - aml_append(method,
> - aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
> - );
> - aml_append(dev, method);
> -
> - build_append_pcihp_notify_entry(notify_method, slot);
> -
> - /* device descriptor has been composed, add it into parent context */
> - aml_append(parent_scope, dev);
> - }
> - aml_append(parent_scope, notify_method);
> -}
> -
> -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
> -{
> - int devfn;
> - Aml *dev;
> -
> - for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
> - /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
> - int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
> - PCIDevice *pdev = bus->devices[devfn];
> -
> - if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
> - continue;
> - }
> -
> - /* start to compose PCI device descriptor */
> - dev = aml_device("S%.02X", devfn);
> - aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
> -
> - call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
> - /* add _DSM if device has acpi-index set */
> - if (pdev->acpi_index &&
> - !object_property_get_bool(OBJECT(pdev), "hotpluggable",
> - &error_abort)) {
> - aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
> - }
> -
> - /* device descriptor has been composed, add it into parent context */
> - aml_append(parent_scope, dev);
> - }
> -}
> -
> /*
> * build_prt - Define interrupt routing rules
> *
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 14/25] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
2025-05-30 10:24 ` Jonathan Cameron via
(?)
@ 2025-06-05 16:03 ` Eric Auger
-1 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-06-05 16:03 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan,
On 5/30/25 12:24 PM, Jonathan Cameron wrote:
> On Tue, 27 May 2025 09:40:16 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> We intend to reuse build_append_pci_bus_devices and
>> build_append_pcihp_slots on ARM. So let's move them to
>> hw/acpi/pcihp.c as well as all static helpers they
>> use.
> Oddly short wrap. I guess it kind of looks prettier than ...
>
> We intend to reuse build_append_pci_bus_devices and
> build_append_pcihp_slots on ARM. So let's move them to hw/acpi/pcihp.c as
> well as all static helpers they use.
>
>
> ... so I'm not that fussed.
Effectively I can change this layout.
>
> I don't really mind, but maybe a short statement of why you
> put the functions in a different order in the destination
> would be a good thing to add to this description?
My bad, there is no need to change the order of functions when moving.
I guess I noticed incrementally which ones were needed and I did not pay
attention to their original order. Now fixed.
Thanks!
Eric
>
> Either way
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
>> No functional change intended.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>> ---
>> include/hw/acpi/pci.h | 1 -
>> include/hw/acpi/pcihp.h | 2 +
>> hw/acpi/pcihp.c | 173 ++++++++++++++++++++++++++++++++++++++++
>> hw/i386/acpi-build.c | 172 ---------------------------------------
>> 4 files changed, 175 insertions(+), 173 deletions(-)
>>
>> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
>> index ab0187a894..4dca22c0e2 100644
>> --- a/include/hw/acpi/pci.h
>> +++ b/include/hw/acpi/pci.h
>> @@ -37,7 +37,6 @@ typedef struct AcpiMcfgInfo {
>> void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
>> const char *oem_id, const char *oem_table_id);
>>
>> -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
>> void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
>>
>> void build_srat_generic_affinity_structures(GArray *table_data);
>> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
>> index f4fd44cb32..5506a58862 100644
>> --- a/include/hw/acpi/pcihp.h
>> +++ b/include/hw/acpi/pcihp.h
>> @@ -80,6 +80,8 @@ void build_append_pcihp_resources(Aml *table,
>> uint64_t io_addr, uint64_t io_len);
>> bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
>>
>> +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
>> +
>> /* Called on reset */
>> void acpi_pcihp_reset(AcpiPciHpState *s);
>>
>> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
>> index 907a08ac7f..942669ea89 100644
>> --- a/hw/acpi/pcihp.c
>> +++ b/hw/acpi/pcihp.c
>> @@ -27,6 +27,7 @@
>> #include "qemu/osdep.h"
>> #include "hw/acpi/pcihp.h"
>> #include "hw/acpi/aml-build.h"
>> +#include "hw/acpi/acpi_aml_interface.h"
>> #include "hw/pci-host/i440fx.h"
>> #include "hw/pci/pci.h"
>> #include "hw/pci/pci_bridge.h"
>> @@ -763,6 +764,178 @@ bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus)
>> return !!nr_notifiers;
>> }
>>
>> +static void build_append_pcihp_notify_entry(Aml *method, int slot)
>> +{
>> + Aml *if_ctx;
>> + int32_t devfn = PCI_DEVFN(slot, 0);
>> +
>> + if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
>> + aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
>> + aml_append(method, if_ctx);
>> +}
>> +
>> +static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
>> +{
>> + const PCIDevice *pdev = bus->devices[devfn];
>> +
>> + if (PCI_FUNC(devfn)) {
>> + if (IS_PCI_BRIDGE(pdev)) {
>> + /*
>> + * Ignore only hotplugged PCI bridges on !0 functions, but
>> + * allow describing cold plugged bridges on all functions
>> + */
>> + if (DEVICE(pdev)->hotplugged) {
>> + return true;
>> + }
>> + }
>> + }
>> + return false;
>> +}
>> +
>> +static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
>> +{
>> + PCIDevice *pdev = bus->devices[devfn];
>> + if (pdev) {
>> + return is_devfn_ignored_generic(devfn, bus) ||
>> + !DEVICE_GET_CLASS(pdev)->hotpluggable ||
>> + /* Cold plugged bridges aren't themselves hot-pluggable */
>> + (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
>> + } else { /* non populated slots */
>> + /*
>> + * hotplug is supported only for non-multifunction device
>> + * so generate device description only for function 0
>> + */
>> + if (PCI_FUNC(devfn) ||
>> + (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
>> + return true;
>> + }
>> + }
>> + return false;
>> +}
>> +
>> +static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
>> +{
>> + Aml *method;
>> +
>> + g_assert(pdev->acpi_index != 0);
>> + method = aml_method("_DSM", 4, AML_SERIALIZED);
>> + {
>> + Aml *params = aml_local(0);
>> + Aml *pkg = aml_package(1);
>> + aml_append(pkg, aml_int(pdev->acpi_index));
>> + aml_append(method, aml_store(pkg, params));
>> + aml_append(method,
>> + aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
>> + aml_arg(2), aml_arg(3), params))
>> + );
>> + }
>> + return method;
>> +}
>> +
>> +static Aml *aml_pci_device_dsm(void)
>> +{
>> + Aml *method;
>> +
>> + method = aml_method("_DSM", 4, AML_SERIALIZED);
>> + {
>> + Aml *params = aml_local(0);
>> + Aml *pkg = aml_package(2);
>> + aml_append(pkg, aml_int(0));
>> + aml_append(pkg, aml_int(0));
>> + aml_append(method, aml_store(pkg, params));
>> + aml_append(method,
>> + aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
>> + aml_append(method,
>> + aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
>> + aml_append(method,
>> + aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
>> + aml_arg(2), aml_arg(3), params))
>> + );
>> + }
>> + return method;
>> +}
>> +
>> +void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
>> +{
>> + int devfn;
>> + Aml *dev, *notify_method = NULL, *method;
>> + QObject *bsel = object_property_get_qobject(OBJECT(bus),
>> + ACPI_PCIHP_PROP_BSEL, NULL);
>> + uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
>> + qobject_unref(bsel);
>> +
>> + aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
>> + notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
>> +
>> + for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
>> + int slot = PCI_SLOT(devfn);
>> + int adr = slot << 16 | PCI_FUNC(devfn);
>> +
>> + if (is_devfn_ignored_hotplug(devfn, bus)) {
>> + continue;
>> + }
>> +
>> + if (bus->devices[devfn]) {
>> + dev = aml_scope("S%.02X", devfn);
>> + } else {
>> + dev = aml_device("S%.02X", devfn);
>> + aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
>> + }
>> +
>> + /*
>> + * Can't declare _SUN here for every device as it changes 'slot'
>> + * enumeration order in linux kernel, so use another variable for it
>> + */
>> + aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
>> + aml_append(dev, aml_pci_device_dsm());
>> +
>> + aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
>> + /* add _EJ0 to make slot hotpluggable */
>> + method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
>> + aml_append(method,
>> + aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
>> + );
>> + aml_append(dev, method);
>> +
>> + build_append_pcihp_notify_entry(notify_method, slot);
>> +
>> + /* device descriptor has been composed, add it into parent context */
>> + aml_append(parent_scope, dev);
>> + }
>> + aml_append(parent_scope, notify_method);
>> +}
>> +
>> +void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
>> +{
>> + int devfn;
>> + Aml *dev;
>> +
>> + for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
>> + /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
>> + int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
>> + PCIDevice *pdev = bus->devices[devfn];
>> +
>> + if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
>> + continue;
>> + }
>> +
>> + /* start to compose PCI device descriptor */
>> + dev = aml_device("S%.02X", devfn);
>> + aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
>> +
>> + call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
>> + /* add _DSM if device has acpi-index set */
>> + if (pdev->acpi_index &&
>> + !object_property_get_bool(OBJECT(pdev), "hotpluggable",
>> + &error_abort)) {
>> + aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
>> + }
>> +
>> + /* device descriptor has been composed, add it into parent context */
>> + aml_append(parent_scope, dev);
>> + }
>> +}
>> +
>> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
>> .name = "acpi_pcihp_pci_status",
>> .version_id = 1,
>> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
>> index 3275675e60..fe8bc62c03 100644
>> --- a/hw/i386/acpi-build.c
>> +++ b/hw/i386/acpi-build.c
>> @@ -338,29 +338,6 @@ build_facs(GArray *table_data)
>> g_array_append_vals(table_data, reserved, 40); /* Reserved */
>> }
>>
>> -static Aml *aml_pci_device_dsm(void)
>> -{
>> - Aml *method;
>> -
>> - method = aml_method("_DSM", 4, AML_SERIALIZED);
>> - {
>> - Aml *params = aml_local(0);
>> - Aml *pkg = aml_package(2);
>> - aml_append(pkg, aml_int(0));
>> - aml_append(pkg, aml_int(0));
>> - aml_append(method, aml_store(pkg, params));
>> - aml_append(method,
>> - aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
>> - aml_append(method,
>> - aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
>> - aml_append(method,
>> - aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
>> - aml_arg(2), aml_arg(3), params))
>> - );
>> - }
>> - return method;
>> -}
>> -
>> static Aml *aml_pci_edsm(void)
>> {
>> Aml *method, *ifctx;
>> @@ -414,155 +391,6 @@ static Aml *aml_pci_edsm(void)
>> return method;
>> }
>>
>> -static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
>> -{
>> - Aml *method;
>> -
>> - g_assert(pdev->acpi_index != 0);
>> - method = aml_method("_DSM", 4, AML_SERIALIZED);
>> - {
>> - Aml *params = aml_local(0);
>> - Aml *pkg = aml_package(1);
>> - aml_append(pkg, aml_int(pdev->acpi_index));
>> - aml_append(method, aml_store(pkg, params));
>> - aml_append(method,
>> - aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
>> - aml_arg(2), aml_arg(3), params))
>> - );
>> - }
>> - return method;
>> -}
>> -
>> -static void build_append_pcihp_notify_entry(Aml *method, int slot)
>> -{
>> - Aml *if_ctx;
>> - int32_t devfn = PCI_DEVFN(slot, 0);
>> -
>> - if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
>> - aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
>> - aml_append(method, if_ctx);
>> -}
>> -
>> -static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
>> -{
>> - const PCIDevice *pdev = bus->devices[devfn];
>> -
>> - if (PCI_FUNC(devfn)) {
>> - if (IS_PCI_BRIDGE(pdev)) {
>> - /*
>> - * Ignore only hotplugged PCI bridges on !0 functions, but
>> - * allow describing cold plugged bridges on all functions
>> - */
>> - if (DEVICE(pdev)->hotplugged) {
>> - return true;
>> - }
>> - }
>> - }
>> - return false;
>> -}
>> -
>> -static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
>> -{
>> - PCIDevice *pdev = bus->devices[devfn];
>> - if (pdev) {
>> - return is_devfn_ignored_generic(devfn, bus) ||
>> - !DEVICE_GET_CLASS(pdev)->hotpluggable ||
>> - /* Cold plugged bridges aren't themselves hot-pluggable */
>> - (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
>> - } else { /* non populated slots */
>> - /*
>> - * hotplug is supported only for non-multifunction device
>> - * so generate device description only for function 0
>> - */
>> - if (PCI_FUNC(devfn) ||
>> - (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
>> - return true;
>> - }
>> - }
>> - return false;
>> -}
>> -
>> -void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
>> -{
>> - int devfn;
>> - Aml *dev, *notify_method = NULL, *method;
>> - QObject *bsel = object_property_get_qobject(OBJECT(bus),
>> - ACPI_PCIHP_PROP_BSEL, NULL);
>> - uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
>> - qobject_unref(bsel);
>> -
>> - aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
>> - notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
>> -
>> - for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
>> - int slot = PCI_SLOT(devfn);
>> - int adr = slot << 16 | PCI_FUNC(devfn);
>> -
>> - if (is_devfn_ignored_hotplug(devfn, bus)) {
>> - continue;
>> - }
>> -
>> - if (bus->devices[devfn]) {
>> - dev = aml_scope("S%.02X", devfn);
>> - } else {
>> - dev = aml_device("S%.02X", devfn);
>> - aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
>> - }
>> -
>> - /*
>> - * Can't declare _SUN here for every device as it changes 'slot'
>> - * enumeration order in linux kernel, so use another variable for it
>> - */
>> - aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
>> - aml_append(dev, aml_pci_device_dsm());
>> -
>> - aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
>> - /* add _EJ0 to make slot hotpluggable */
>> - method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
>> - aml_append(method,
>> - aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
>> - );
>> - aml_append(dev, method);
>> -
>> - build_append_pcihp_notify_entry(notify_method, slot);
>> -
>> - /* device descriptor has been composed, add it into parent context */
>> - aml_append(parent_scope, dev);
>> - }
>> - aml_append(parent_scope, notify_method);
>> -}
>> -
>> -void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
>> -{
>> - int devfn;
>> - Aml *dev;
>> -
>> - for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
>> - /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
>> - int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
>> - PCIDevice *pdev = bus->devices[devfn];
>> -
>> - if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
>> - continue;
>> - }
>> -
>> - /* start to compose PCI device descriptor */
>> - dev = aml_device("S%.02X", devfn);
>> - aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
>> -
>> - call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
>> - /* add _DSM if device has acpi-index set */
>> - if (pdev->acpi_index &&
>> - !object_property_get_bool(OBJECT(pdev), "hotpluggable",
>> - &error_abort)) {
>> - aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
>> - }
>> -
>> - /* device descriptor has been composed, add it into parent context */
>> - aml_append(parent_scope, dev);
>> - }
>> -}
>> -
>> /*
>> * build_prt - Define interrupt routing rules
>> *
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 15/25] hw/i386/acpi-build: Introduce and use acpi_get_pci_host
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (13 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 14/25] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots " Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 13:58 ` Igor Mammedov
2025-05-27 7:40 ` [PATCH v2 16/25] hw/i386/acpi-build: Move aml_pci_edsm to a generic place Eric Auger
` (9 subsequent siblings)
24 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
pcihp acpi_set_pci_info() generic code currently uses
acpi_get_i386_pci_host() to retrieve the pci host bridge.
Let's rename acpi_get_i386_pci_host into acpi_get_pci_host and
move it in pci generic code.
The helper is augmented with the support of ARM GPEX.
Also instead of using the machine child property to retrieve
the PCI host bridge, we search for the actual object type using
object_resolve_type_unambiguous().
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
---
v1 -> v2
- described the fact we changed the implementation of
acpi_get_pci_host() in the commit msg.
---
include/hw/acpi/pci.h | 2 ++
hw/acpi/pci.c | 20 ++++++++++++++++++++
hw/acpi/pcihp.c | 3 ++-
hw/i386/acpi-build.c | 24 ++++--------------------
4 files changed, 28 insertions(+), 21 deletions(-)
diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
index 4dca22c0e2..310cbd02db 100644
--- a/include/hw/acpi/pci.h
+++ b/include/hw/acpi/pci.h
@@ -41,4 +41,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
void build_srat_generic_affinity_structures(GArray *table_data);
+Object *acpi_get_pci_host(void);
+
#endif
diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c
index d511a85029..4191886ebe 100644
--- a/hw/acpi/pci.c
+++ b/hw/acpi/pci.c
@@ -26,6 +26,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qom/object_interfaces.h"
+#include "qom/object.h"
#include "qapi/error.h"
#include "hw/boards.h"
#include "hw/acpi/aml-build.h"
@@ -33,6 +34,9 @@
#include "hw/pci/pci_bridge.h"
#include "hw/pci/pci_device.h"
#include "hw/pci/pcie_host.h"
+#include "hw/pci-host/i440fx.h"
+#include "hw/pci-host/q35.h"
+#include "hw/pci-host/gpex.h"
/*
* PCI Firmware Specification, Revision 3.0
@@ -301,3 +305,19 @@ void build_srat_generic_affinity_structures(GArray *table_data)
object_child_foreach_recursive(object_get_root(), build_acpi_generic_port,
table_data);
}
+
+Object *acpi_get_pci_host(void)
+{
+ Object *host;
+
+ host = object_resolve_type_unambiguous(TYPE_I440FX_PCI_HOST_BRIDGE, NULL);
+ if (host) {
+ return host;
+ }
+ host = object_resolve_type_unambiguous(TYPE_Q35_HOST_DEVICE, NULL);
+ if (host) {
+ return host;
+ }
+ host = object_resolve_type_unambiguous(TYPE_GPEX_HOST, NULL);
+ return host;
+}
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 942669ea89..d800371ddc 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -36,6 +36,7 @@
#include "hw/pci-bridge/xio3130_downstream.h"
#include "hw/i386/acpi-build.h"
#include "hw/acpi/acpi.h"
+#include "hw/acpi/pci.h"
#include "hw/pci/pci_bus.h"
#include "migration/vmstate.h"
#include "qapi/error.h"
@@ -102,7 +103,7 @@ static void *acpi_set_bsel(PCIBus *bus, void *opaque)
static void acpi_set_pci_info(bool has_bridge_hotplug)
{
static bool bsel_is_set;
- Object *host = acpi_get_i386_pci_host();
+ Object *host = acpi_get_pci_host();
PCIBus *bus;
BSELInfo info = { .bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT,
.has_bridge_hotplug = has_bridge_hotplug };
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index fe8bc62c03..6feb99e9eb 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -269,27 +269,11 @@ static void acpi_get_misc_info(AcpiMiscInfo *info)
#endif
}
-/*
- * Because of the PXB hosts we cannot simply query TYPE_PCI_HOST_BRIDGE.
- * On i386 arch we only have two pci hosts, so we can look only for them.
- */
-Object *acpi_get_i386_pci_host(void)
-{
- PCIHostState *host;
-
- host = PCI_HOST_BRIDGE(object_resolve_path("/machine/i440fx", NULL));
- if (!host) {
- host = PCI_HOST_BRIDGE(object_resolve_path("/machine/q35", NULL));
- }
-
- return OBJECT(host);
-}
-
static void acpi_get_pci_holes(Range *hole, Range *hole64)
{
Object *pci_host;
- pci_host = acpi_get_i386_pci_host();
+ pci_host = acpi_get_pci_host();
if (!pci_host) {
return;
@@ -1245,7 +1229,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
sb_scope = aml_scope("\\_SB");
{
- Object *pci_host = acpi_get_i386_pci_host();
+ Object *pci_host = acpi_get_pci_host();
if (pci_host) {
PCIBus *pbus = PCI_HOST_BRIDGE(pci_host)->bus;
@@ -1306,7 +1290,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
bool has_pcnt;
- Object *pci_host = acpi_get_i386_pci_host();
+ Object *pci_host = acpi_get_pci_host();
PCIBus *b = PCI_HOST_BRIDGE(pci_host)->bus;
scope = aml_scope("\\_SB.PCI0");
@@ -1946,7 +1930,7 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg)
Object *pci_host;
QObject *o;
- pci_host = acpi_get_i386_pci_host();
+ pci_host = acpi_get_pci_host();
if (!pci_host) {
return false;
}
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 15/25] hw/i386/acpi-build: Introduce and use acpi_get_pci_host
2025-05-27 7:40 ` [PATCH v2 15/25] hw/i386/acpi-build: Introduce and use acpi_get_pci_host Eric Auger
@ 2025-05-27 13:58 ` Igor Mammedov
0 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 13:58 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:17 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> pcihp acpi_set_pci_info() generic code currently uses
> acpi_get_i386_pci_host() to retrieve the pci host bridge.
>
> Let's rename acpi_get_i386_pci_host into acpi_get_pci_host and
> move it in pci generic code.
>
> The helper is augmented with the support of ARM GPEX.
>
> Also instead of using the machine child property to retrieve
> the PCI host bridge, we search for the actual object type using
> object_resolve_type_unambiguous().
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
>
> ---
>
> v1 -> v2
> - described the fact we changed the implementation of
> acpi_get_pci_host() in the commit msg.
> ---
> include/hw/acpi/pci.h | 2 ++
> hw/acpi/pci.c | 20 ++++++++++++++++++++
> hw/acpi/pcihp.c | 3 ++-
> hw/i386/acpi-build.c | 24 ++++--------------------
> 4 files changed, 28 insertions(+), 21 deletions(-)
>
> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> index 4dca22c0e2..310cbd02db 100644
> --- a/include/hw/acpi/pci.h
> +++ b/include/hw/acpi/pci.h
> @@ -41,4 +41,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
>
> void build_srat_generic_affinity_structures(GArray *table_data);
>
> +Object *acpi_get_pci_host(void);
> +
> #endif
> diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c
> index d511a85029..4191886ebe 100644
> --- a/hw/acpi/pci.c
> +++ b/hw/acpi/pci.c
> @@ -26,6 +26,7 @@
> #include "qemu/osdep.h"
> #include "qemu/error-report.h"
> #include "qom/object_interfaces.h"
> +#include "qom/object.h"
> #include "qapi/error.h"
> #include "hw/boards.h"
> #include "hw/acpi/aml-build.h"
> @@ -33,6 +34,9 @@
> #include "hw/pci/pci_bridge.h"
> #include "hw/pci/pci_device.h"
> #include "hw/pci/pcie_host.h"
> +#include "hw/pci-host/i440fx.h"
> +#include "hw/pci-host/q35.h"
> +#include "hw/pci-host/gpex.h"
>
> /*
> * PCI Firmware Specification, Revision 3.0
> @@ -301,3 +305,19 @@ void build_srat_generic_affinity_structures(GArray *table_data)
> object_child_foreach_recursive(object_get_root(), build_acpi_generic_port,
> table_data);
> }
> +
> +Object *acpi_get_pci_host(void)
> +{
> + Object *host;
> +
> + host = object_resolve_type_unambiguous(TYPE_I440FX_PCI_HOST_BRIDGE, NULL);
> + if (host) {
> + return host;
> + }
> + host = object_resolve_type_unambiguous(TYPE_Q35_HOST_DEVICE, NULL);
> + if (host) {
> + return host;
> + }
> + host = object_resolve_type_unambiguous(TYPE_GPEX_HOST, NULL);
> + return host;
while it will work, it's getting ridiculous.
(it's not likely to affect performance but if it can be helped,
I'd rather avoid searching)
Can we just reuse host bridge bus in stored in pcihp state?
aka we do pass root_bus to acpi_pcihp_init() and then there is
AcpiPciHpState::root
then there are other places that call acpi_get_i386_pci_host()
to get root bus, can't we just get it from machine state that
callers get and pass it down as an argument?
> +}
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index 942669ea89..d800371ddc 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -36,6 +36,7 @@
> #include "hw/pci-bridge/xio3130_downstream.h"
> #include "hw/i386/acpi-build.h"
> #include "hw/acpi/acpi.h"
> +#include "hw/acpi/pci.h"
> #include "hw/pci/pci_bus.h"
> #include "migration/vmstate.h"
> #include "qapi/error.h"
> @@ -102,7 +103,7 @@ static void *acpi_set_bsel(PCIBus *bus, void *opaque)
> static void acpi_set_pci_info(bool has_bridge_hotplug)
> {
> static bool bsel_is_set;
> - Object *host = acpi_get_i386_pci_host();
> + Object *host = acpi_get_pci_host();
> PCIBus *bus;
> BSELInfo info = { .bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT,
> .has_bridge_hotplug = has_bridge_hotplug };
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index fe8bc62c03..6feb99e9eb 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -269,27 +269,11 @@ static void acpi_get_misc_info(AcpiMiscInfo *info)
> #endif
> }
>
> -/*
> - * Because of the PXB hosts we cannot simply query TYPE_PCI_HOST_BRIDGE.
> - * On i386 arch we only have two pci hosts, so we can look only for them.
> - */
> -Object *acpi_get_i386_pci_host(void)
> -{
> - PCIHostState *host;
> -
> - host = PCI_HOST_BRIDGE(object_resolve_path("/machine/i440fx", NULL));
> - if (!host) {
> - host = PCI_HOST_BRIDGE(object_resolve_path("/machine/q35", NULL));
> - }
> -
> - return OBJECT(host);
> -}
> -
> static void acpi_get_pci_holes(Range *hole, Range *hole64)
> {
> Object *pci_host;
>
> - pci_host = acpi_get_i386_pci_host();
> + pci_host = acpi_get_pci_host();
>
> if (!pci_host) {
> return;
> @@ -1245,7 +1229,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
>
> sb_scope = aml_scope("\\_SB");
> {
> - Object *pci_host = acpi_get_i386_pci_host();
> + Object *pci_host = acpi_get_pci_host();
>
> if (pci_host) {
> PCIBus *pbus = PCI_HOST_BRIDGE(pci_host)->bus;
> @@ -1306,7 +1290,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
> bool has_pcnt;
>
> - Object *pci_host = acpi_get_i386_pci_host();
> + Object *pci_host = acpi_get_pci_host();
> PCIBus *b = PCI_HOST_BRIDGE(pci_host)->bus;
>
> scope = aml_scope("\\_SB.PCI0");
> @@ -1946,7 +1930,7 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg)
> Object *pci_host;
> QObject *o;
>
> - pci_host = acpi_get_i386_pci_host();
> + pci_host = acpi_get_pci_host();
> if (!pci_host) {
> return false;
> }
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 16/25] hw/i386/acpi-build: Move aml_pci_edsm to a generic place
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (14 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 15/25] hw/i386/acpi-build: Introduce and use acpi_get_pci_host Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 14:00 ` Igor Mammedov
2025-05-27 7:40 ` [PATCH v2 17/25] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug Eric Auger
` (8 subsequent siblings)
24 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Move aml_pci_edsm to pcihp since we want to reuse that for
ARM and acpi-index support.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
include/hw/acpi/pcihp.h | 2 ++
hw/acpi/pcihp.c | 53 +++++++++++++++++++++++++++++++++++++++++
hw/i386/acpi-build.c | 53 -----------------------------------------
3 files changed, 55 insertions(+), 53 deletions(-)
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 5506a58862..f2c3558654 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -82,6 +82,8 @@ bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
+Aml *aml_pci_edsm(void);
+
/* Called on reset */
void acpi_pcihp_reset(AcpiPciHpState *s);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index d800371ddc..57fe8938b1 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -937,6 +937,59 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
}
}
+Aml *aml_pci_edsm(void)
+{
+ Aml *method, *ifctx;
+ Aml *zero = aml_int(0);
+ Aml *func = aml_arg(2);
+ Aml *ret = aml_local(0);
+ Aml *aidx = aml_local(1);
+ Aml *params = aml_arg(4);
+
+ method = aml_method("EDSM", 5, AML_SERIALIZED);
+
+ /* get supported functions */
+ ifctx = aml_if(aml_equal(func, zero));
+ {
+ /* 1: have supported functions */
+ /* 7: support for function 7 */
+ const uint8_t caps = 1 | BIT(7);
+ build_append_pci_dsm_func0_common(ifctx, ret);
+ aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
+ aml_append(ifctx, aml_return(ret));
+ }
+ aml_append(method, ifctx);
+
+ /* handle specific functions requests */
+ /*
+ * PCI Firmware Specification 3.1
+ * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
+ * Operating Systems
+ */
+ ifctx = aml_if(aml_equal(func, aml_int(7)));
+ {
+ Aml *pkg = aml_package(2);
+ aml_append(pkg, zero);
+ /* optional, if not impl. should return null string */
+ aml_append(pkg, aml_string("%s", ""));
+ aml_append(ifctx, aml_store(pkg, ret));
+
+ /*
+ * IASL is fine when initializing Package with computational data,
+ * however it makes guest unhappy /it fails to process such AML/.
+ * So use runtime assignment to set acpi-index after initializer
+ * to make OSPM happy.
+ */
+ aml_append(ifctx,
+ aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
+ aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
+ aml_append(ifctx, aml_return(ret));
+ }
+ aml_append(method, ifctx);
+
+ return method;
+}
+
const VMStateDescription vmstate_acpi_pcihp_pci_status = {
.name = "acpi_pcihp_pci_status",
.version_id = 1,
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6feb99e9eb..e8ed335fdd 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -322,59 +322,6 @@ build_facs(GArray *table_data)
g_array_append_vals(table_data, reserved, 40); /* Reserved */
}
-static Aml *aml_pci_edsm(void)
-{
- Aml *method, *ifctx;
- Aml *zero = aml_int(0);
- Aml *func = aml_arg(2);
- Aml *ret = aml_local(0);
- Aml *aidx = aml_local(1);
- Aml *params = aml_arg(4);
-
- method = aml_method("EDSM", 5, AML_SERIALIZED);
-
- /* get supported functions */
- ifctx = aml_if(aml_equal(func, zero));
- {
- /* 1: have supported functions */
- /* 7: support for function 7 */
- const uint8_t caps = 1 | BIT(7);
- build_append_pci_dsm_func0_common(ifctx, ret);
- aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
- aml_append(ifctx, aml_return(ret));
- }
- aml_append(method, ifctx);
-
- /* handle specific functions requests */
- /*
- * PCI Firmware Specification 3.1
- * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
- * Operating Systems
- */
- ifctx = aml_if(aml_equal(func, aml_int(7)));
- {
- Aml *pkg = aml_package(2);
- aml_append(pkg, zero);
- /* optional, if not impl. should return null string */
- aml_append(pkg, aml_string("%s", ""));
- aml_append(ifctx, aml_store(pkg, ret));
-
- /*
- * IASL is fine when initializing Package with computational data,
- * however it makes guest unhappy /it fails to process such AML/.
- * So use runtime assignment to set acpi-index after initializer
- * to make OSPM happy.
- */
- aml_append(ifctx,
- aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
- aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
- aml_append(ifctx, aml_return(ret));
- }
- aml_append(method, ifctx);
-
- return method;
-}
-
/*
* build_prt - Define interrupt routing rules
*
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 16/25] hw/i386/acpi-build: Move aml_pci_edsm to a generic place
2025-05-27 7:40 ` [PATCH v2 16/25] hw/i386/acpi-build: Move aml_pci_edsm to a generic place Eric Auger
@ 2025-05-27 14:00 ` Igor Mammedov
2025-05-27 14:07 ` Igor Mammedov
0 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 14:00 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:18 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Move aml_pci_edsm to pcihp since we want to reuse that for
> ARM and acpi-index support.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> ---
> include/hw/acpi/pcihp.h | 2 ++
> hw/acpi/pcihp.c | 53 +++++++++++++++++++++++++++++++++++++++++
edsm is for un-pluggable ports,
a more suitable place for it would be hw/acpi/pci.c
> hw/i386/acpi-build.c | 53 -----------------------------------------
> 3 files changed, 55 insertions(+), 53 deletions(-)
>
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index 5506a58862..f2c3558654 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -82,6 +82,8 @@ bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
>
> void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
>
> +Aml *aml_pci_edsm(void);
> +
> /* Called on reset */
> void acpi_pcihp_reset(AcpiPciHpState *s);
>
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index d800371ddc..57fe8938b1 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -937,6 +937,59 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
> }
> }
>
> +Aml *aml_pci_edsm(void)
> +{
> + Aml *method, *ifctx;
> + Aml *zero = aml_int(0);
> + Aml *func = aml_arg(2);
> + Aml *ret = aml_local(0);
> + Aml *aidx = aml_local(1);
> + Aml *params = aml_arg(4);
> +
> + method = aml_method("EDSM", 5, AML_SERIALIZED);
> +
> + /* get supported functions */
> + ifctx = aml_if(aml_equal(func, zero));
> + {
> + /* 1: have supported functions */
> + /* 7: support for function 7 */
> + const uint8_t caps = 1 | BIT(7);
> + build_append_pci_dsm_func0_common(ifctx, ret);
> + aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
> + aml_append(ifctx, aml_return(ret));
> + }
> + aml_append(method, ifctx);
> +
> + /* handle specific functions requests */
> + /*
> + * PCI Firmware Specification 3.1
> + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> + * Operating Systems
> + */
> + ifctx = aml_if(aml_equal(func, aml_int(7)));
> + {
> + Aml *pkg = aml_package(2);
> + aml_append(pkg, zero);
> + /* optional, if not impl. should return null string */
> + aml_append(pkg, aml_string("%s", ""));
> + aml_append(ifctx, aml_store(pkg, ret));
> +
> + /*
> + * IASL is fine when initializing Package with computational data,
> + * however it makes guest unhappy /it fails to process such AML/.
> + * So use runtime assignment to set acpi-index after initializer
> + * to make OSPM happy.
> + */
> + aml_append(ifctx,
> + aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
> + aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
> + aml_append(ifctx, aml_return(ret));
> + }
> + aml_append(method, ifctx);
> +
> + return method;
> +}
> +
> const VMStateDescription vmstate_acpi_pcihp_pci_status = {
> .name = "acpi_pcihp_pci_status",
> .version_id = 1,
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 6feb99e9eb..e8ed335fdd 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -322,59 +322,6 @@ build_facs(GArray *table_data)
> g_array_append_vals(table_data, reserved, 40); /* Reserved */
> }
>
> -static Aml *aml_pci_edsm(void)
> -{
> - Aml *method, *ifctx;
> - Aml *zero = aml_int(0);
> - Aml *func = aml_arg(2);
> - Aml *ret = aml_local(0);
> - Aml *aidx = aml_local(1);
> - Aml *params = aml_arg(4);
> -
> - method = aml_method("EDSM", 5, AML_SERIALIZED);
> -
> - /* get supported functions */
> - ifctx = aml_if(aml_equal(func, zero));
> - {
> - /* 1: have supported functions */
> - /* 7: support for function 7 */
> - const uint8_t caps = 1 | BIT(7);
> - build_append_pci_dsm_func0_common(ifctx, ret);
> - aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
> - aml_append(ifctx, aml_return(ret));
> - }
> - aml_append(method, ifctx);
> -
> - /* handle specific functions requests */
> - /*
> - * PCI Firmware Specification 3.1
> - * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> - * Operating Systems
> - */
> - ifctx = aml_if(aml_equal(func, aml_int(7)));
> - {
> - Aml *pkg = aml_package(2);
> - aml_append(pkg, zero);
> - /* optional, if not impl. should return null string */
> - aml_append(pkg, aml_string("%s", ""));
> - aml_append(ifctx, aml_store(pkg, ret));
> -
> - /*
> - * IASL is fine when initializing Package with computational data,
> - * however it makes guest unhappy /it fails to process such AML/.
> - * So use runtime assignment to set acpi-index after initializer
> - * to make OSPM happy.
> - */
> - aml_append(ifctx,
> - aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
> - aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
> - aml_append(ifctx, aml_return(ret));
> - }
> - aml_append(method, ifctx);
> -
> - return method;
> -}
> -
> /*
> * build_prt - Define interrupt routing rules
> *
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 16/25] hw/i386/acpi-build: Move aml_pci_edsm to a generic place
2025-05-27 14:00 ` Igor Mammedov
@ 2025-05-27 14:07 ` Igor Mammedov
0 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 14:07 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 16:00:40 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> On Tue, 27 May 2025 09:40:18 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > Move aml_pci_edsm to pcihp since we want to reuse that for
> > ARM and acpi-index support.
> >
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > ---
> > include/hw/acpi/pcihp.h | 2 ++
> > hw/acpi/pcihp.c | 53 +++++++++++++++++++++++++++++++++++++++++
>
> edsm is for un-pluggable ports,
> a more suitable place for it would be hw/acpi/pci.c
or maybe hw/acpi/pci-bridge.c as its owner/call is a bridge
>
>
> > hw/i386/acpi-build.c | 53 -----------------------------------------
> > 3 files changed, 55 insertions(+), 53 deletions(-)
> >
> > diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> > index 5506a58862..f2c3558654 100644
> > --- a/include/hw/acpi/pcihp.h
> > +++ b/include/hw/acpi/pcihp.h
> > @@ -82,6 +82,8 @@ bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
> >
> > void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
> >
> > +Aml *aml_pci_edsm(void);
> > +
> > /* Called on reset */
> > void acpi_pcihp_reset(AcpiPciHpState *s);
> >
> > diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> > index d800371ddc..57fe8938b1 100644
> > --- a/hw/acpi/pcihp.c
> > +++ b/hw/acpi/pcihp.c
> > @@ -937,6 +937,59 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
> > }
> > }
> >
> > +Aml *aml_pci_edsm(void)
> > +{
> > + Aml *method, *ifctx;
> > + Aml *zero = aml_int(0);
> > + Aml *func = aml_arg(2);
> > + Aml *ret = aml_local(0);
> > + Aml *aidx = aml_local(1);
> > + Aml *params = aml_arg(4);
> > +
> > + method = aml_method("EDSM", 5, AML_SERIALIZED);
> > +
> > + /* get supported functions */
> > + ifctx = aml_if(aml_equal(func, zero));
> > + {
> > + /* 1: have supported functions */
> > + /* 7: support for function 7 */
> > + const uint8_t caps = 1 | BIT(7);
> > + build_append_pci_dsm_func0_common(ifctx, ret);
> > + aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
> > + aml_append(ifctx, aml_return(ret));
> > + }
> > + aml_append(method, ifctx);
> > +
> > + /* handle specific functions requests */
> > + /*
> > + * PCI Firmware Specification 3.1
> > + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> > + * Operating Systems
> > + */
> > + ifctx = aml_if(aml_equal(func, aml_int(7)));
> > + {
> > + Aml *pkg = aml_package(2);
> > + aml_append(pkg, zero);
> > + /* optional, if not impl. should return null string */
> > + aml_append(pkg, aml_string("%s", ""));
> > + aml_append(ifctx, aml_store(pkg, ret));
> > +
> > + /*
> > + * IASL is fine when initializing Package with computational data,
> > + * however it makes guest unhappy /it fails to process such AML/.
> > + * So use runtime assignment to set acpi-index after initializer
> > + * to make OSPM happy.
> > + */
> > + aml_append(ifctx,
> > + aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
> > + aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
> > + aml_append(ifctx, aml_return(ret));
> > + }
> > + aml_append(method, ifctx);
> > +
> > + return method;
> > +}
> > +
> > const VMStateDescription vmstate_acpi_pcihp_pci_status = {
> > .name = "acpi_pcihp_pci_status",
> > .version_id = 1,
> > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> > index 6feb99e9eb..e8ed335fdd 100644
> > --- a/hw/i386/acpi-build.c
> > +++ b/hw/i386/acpi-build.c
> > @@ -322,59 +322,6 @@ build_facs(GArray *table_data)
> > g_array_append_vals(table_data, reserved, 40); /* Reserved */
> > }
> >
> > -static Aml *aml_pci_edsm(void)
> > -{
> > - Aml *method, *ifctx;
> > - Aml *zero = aml_int(0);
> > - Aml *func = aml_arg(2);
> > - Aml *ret = aml_local(0);
> > - Aml *aidx = aml_local(1);
> > - Aml *params = aml_arg(4);
> > -
> > - method = aml_method("EDSM", 5, AML_SERIALIZED);
> > -
> > - /* get supported functions */
> > - ifctx = aml_if(aml_equal(func, zero));
> > - {
> > - /* 1: have supported functions */
> > - /* 7: support for function 7 */
> > - const uint8_t caps = 1 | BIT(7);
> > - build_append_pci_dsm_func0_common(ifctx, ret);
> > - aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
> > - aml_append(ifctx, aml_return(ret));
> > - }
> > - aml_append(method, ifctx);
> > -
> > - /* handle specific functions requests */
> > - /*
> > - * PCI Firmware Specification 3.1
> > - * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> > - * Operating Systems
> > - */
> > - ifctx = aml_if(aml_equal(func, aml_int(7)));
> > - {
> > - Aml *pkg = aml_package(2);
> > - aml_append(pkg, zero);
> > - /* optional, if not impl. should return null string */
> > - aml_append(pkg, aml_string("%s", ""));
> > - aml_append(ifctx, aml_store(pkg, ret));
> > -
> > - /*
> > - * IASL is fine when initializing Package with computational data,
> > - * however it makes guest unhappy /it fails to process such AML/.
> > - * So use runtime assignment to set acpi-index after initializer
> > - * to make OSPM happy.
> > - */
> > - aml_append(ifctx,
> > - aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
> > - aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
> > - aml_append(ifctx, aml_return(ret));
> > - }
> > - aml_append(method, ifctx);
> > -
> > - return method;
> > -}
> > -
> > /*
> > * build_prt - Define interrupt routing rules
> > *
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 17/25] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (15 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 16/25] hw/i386/acpi-build: Move aml_pci_edsm to a generic place Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 14:12 ` Igor Mammedov
2025-05-27 7:40 ` [PATCH v2 18/25] hw/acpi/ged: Prepare the device to react to PCI hotplug events Eric Auger
` (7 subsequent siblings)
24 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Modify the DSDT ACPI table to enable ACPI PCI hotplug.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
include/hw/arm/virt.h | 1 +
hw/arm/virt-acpi-build.c | 21 +++++++++++++++++++++
hw/arm/virt.c | 1 +
hw/arm/Kconfig | 2 ++
4 files changed, 25 insertions(+)
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 10ea581f06..1b2e2e1284 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -79,6 +79,7 @@ enum {
VIRT_ACPI_GED,
VIRT_NVDIMM_ACPI,
VIRT_PVTIME,
+ VIRT_ACPI_PCIHP,
VIRT_LOWMEMMAP_LAST,
};
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index be5e00a56e..9d88ffc318 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -34,6 +34,7 @@
#include "hw/core/cpu.h"
#include "hw/acpi/acpi-defs.h"
#include "hw/acpi/acpi.h"
+#include "hw/acpi/pcihp.h"
#include "hw/nvram/fw_cfg_acpi.h"
#include "hw/acpi/bios-linker-loader.h"
#include "hw/acpi/aml-build.h"
@@ -836,6 +837,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
(irqmap[VIRT_MMIO] + ARM_SPI_BASE),
0, NUM_VIRTIO_TRANSPORTS);
acpi_dsdt_add_pci(scope, memmap, irqmap[VIRT_PCIE] + ARM_SPI_BASE, vms);
+
if (vms->acpi_dev) {
build_ged_aml(scope, "\\_SB."GED_DEVICE,
HOTPLUG_HANDLER(vms->acpi_dev),
@@ -864,6 +866,25 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
aml_append(dsdt, scope);
+ if (vms->acpi_pcihp) {
+ Aml *pci0_scope = aml_scope("\\_SB.PCI0");
+
+ aml_append(pci0_scope, aml_pci_edsm());
+ build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY,
+ memmap[VIRT_ACPI_PCIHP].base);
+ build_append_pcihp_resources(pci0_scope,
+ memmap[VIRT_ACPI_PCIHP].base,
+ memmap[VIRT_ACPI_PCIHP].size);
+
+ /* Scan all PCI buses. Generate tables to support hotplug. */
+ build_append_pci_bus_devices(pci0_scope, vms->bus);
+ if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
+ build_append_pcihp_slots(pci0_scope, vms->bus);
+ }
+ build_append_notification_callback(pci0_scope, vms->bus);
+ aml_append(dsdt, pci0_scope);
+ }
+
/* copy AML table into ACPI tables blob */
g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a0deeaf2b3..4aa40c8e8b 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -183,6 +183,7 @@ static const MemMapEntry base_memmap[] = {
[VIRT_NVDIMM_ACPI] = { 0x09090000, NVDIMM_ACPI_IO_LEN},
[VIRT_PVTIME] = { 0x090a0000, 0x00010000 },
[VIRT_SECURE_GPIO] = { 0x090b0000, 0x00001000 },
+ [VIRT_ACPI_PCIHP] = { 0x090c0000, 0x00001000 },
[VIRT_MMIO] = { 0x0a000000, 0x00000200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index a55b44d7bd..572b4dabd5 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -34,6 +34,8 @@ config ARM_VIRT
select ACPI_HW_REDUCED
select ACPI_APEI
select ACPI_VIOT
+ select ACPI_PCIHP
+ select ACPI_PCI_BRIDGE
select VIRTIO_MEM_SUPPORTED
select ACPI_CXL
select ACPI_HMAT
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 17/25] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
2025-05-27 7:40 ` [PATCH v2 17/25] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug Eric Auger
@ 2025-05-27 14:12 ` Igor Mammedov
0 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 14:12 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:19 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Modify the DSDT ACPI table to enable ACPI PCI hotplug.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> ---
> include/hw/arm/virt.h | 1 +
> hw/arm/virt-acpi-build.c | 21 +++++++++++++++++++++
> hw/arm/virt.c | 1 +
> hw/arm/Kconfig | 2 ++
> 4 files changed, 25 insertions(+)
>
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 10ea581f06..1b2e2e1284 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -79,6 +79,7 @@ enum {
> VIRT_ACPI_GED,
> VIRT_NVDIMM_ACPI,
> VIRT_PVTIME,
> + VIRT_ACPI_PCIHP,
> VIRT_LOWMEMMAP_LAST,
> };
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index be5e00a56e..9d88ffc318 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -34,6 +34,7 @@
> #include "hw/core/cpu.h"
> #include "hw/acpi/acpi-defs.h"
> #include "hw/acpi/acpi.h"
> +#include "hw/acpi/pcihp.h"
> #include "hw/nvram/fw_cfg_acpi.h"
> #include "hw/acpi/bios-linker-loader.h"
> #include "hw/acpi/aml-build.h"
> @@ -836,6 +837,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> (irqmap[VIRT_MMIO] + ARM_SPI_BASE),
> 0, NUM_VIRTIO_TRANSPORTS);
> acpi_dsdt_add_pci(scope, memmap, irqmap[VIRT_PCIE] + ARM_SPI_BASE, vms);
> +
> if (vms->acpi_dev) {
> build_ged_aml(scope, "\\_SB."GED_DEVICE,
> HOTPLUG_HANDLER(vms->acpi_dev),
> @@ -864,6 +866,25 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>
> aml_append(dsdt, scope);
>
> + if (vms->acpi_pcihp) {
> + Aml *pci0_scope = aml_scope("\\_SB.PCI0");
> +
> + aml_append(pci0_scope, aml_pci_edsm());
> + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY,
> + memmap[VIRT_ACPI_PCIHP].base);
> + build_append_pcihp_resources(pci0_scope,
> + memmap[VIRT_ACPI_PCIHP].base,
> + memmap[VIRT_ACPI_PCIHP].size);
> +
> + /* Scan all PCI buses. Generate tables to support hotplug. */
> + build_append_pci_bus_devices(pci0_scope, vms->bus);
> + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
> + build_append_pcihp_slots(pci0_scope, vms->bus);
> + }
> + build_append_notification_callback(pci0_scope, vms->bus);
> + aml_append(dsdt, pci0_scope);
> + }
> +
> /* copy AML table into ACPI tables blob */
> g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index a0deeaf2b3..4aa40c8e8b 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -183,6 +183,7 @@ static const MemMapEntry base_memmap[] = {
> [VIRT_NVDIMM_ACPI] = { 0x09090000, NVDIMM_ACPI_IO_LEN},
> [VIRT_PVTIME] = { 0x090a0000, 0x00010000 },
> [VIRT_SECURE_GPIO] = { 0x090b0000, 0x00001000 },
> + [VIRT_ACPI_PCIHP] = { 0x090c0000, 0x00001000 },
^^^^^
why not use actual len define here?
> [VIRT_MMIO] = { 0x0a000000, 0x00000200 },
> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
> [VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index a55b44d7bd..572b4dabd5 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -34,6 +34,8 @@ config ARM_VIRT
> select ACPI_HW_REDUCED
> select ACPI_APEI
> select ACPI_VIOT
> + select ACPI_PCIHP
> + select ACPI_PCI_BRIDGE
> select VIRTIO_MEM_SUPPORTED
> select ACPI_CXL
> select ACPI_HMAT
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 18/25] hw/acpi/ged: Prepare the device to react to PCI hotplug events
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (16 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 17/25] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 7:40 ` [PATCH v2 19/25] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation Eric Auger
` (6 subsequent siblings)
24 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
QEMU will notify the OS about PCI hotplug/hotunplug events through
GED interrupts. Let the GED device handle a new PCI hotplug event.
On its occurrence it calls the \\_SB.PCI0.PCNT method with the BLCK
mutex held.
The GED device uses a dedicated MMIO region that will be mapped
by the machine code.
At this point the GED still does not support PCI device hotplug in
its TYPE_HOTPLUG_HANDLER implementation. This will come in a
subsequent patch.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v1 -> v2:
- Introduce ACPI_PCIHP_REGION_NAME
---
include/hw/acpi/generic_event_device.h | 7 +++++++
include/hw/acpi/pcihp.h | 2 ++
hw/acpi/generic_event_device.c | 14 ++++++++++++++
hw/acpi/pcihp.c | 1 -
4 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
index d2dac87b4a..9042448f77 100644
--- a/include/hw/acpi/generic_event_device.h
+++ b/include/hw/acpi/generic_event_device.h
@@ -63,6 +63,7 @@
#include "hw/acpi/memory_hotplug.h"
#include "hw/acpi/ghes.h"
#include "hw/acpi/cpu.h"
+#include "hw/acpi/pcihp.h"
#include "qom/object.h"
#define ACPI_POWER_BUTTON_DEVICE "PWRB"
@@ -101,6 +102,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(AcpiGedState, ACPI_GED)
#define ACPI_GED_PWR_DOWN_EVT 0x2
#define ACPI_GED_NVDIMM_HOTPLUG_EVT 0x4
#define ACPI_GED_CPU_HOTPLUG_EVT 0x8
+#define ACPI_GED_PCI_HOTPLUG_EVT 0x10
typedef struct GEDState {
MemoryRegion evt;
@@ -108,12 +110,17 @@ typedef struct GEDState {
uint32_t sel;
} GEDState;
+#define ACPI_PCIHP_REGION_NAME "pcihp container"
+
struct AcpiGedState {
SysBusDevice parent_obj;
MemHotplugState memhp_state;
MemoryRegion container_memhp;
CPUHotplugState cpuhp_state;
MemoryRegion container_cpuhp;
+ AcpiPciHpState pcihp_state;
+ MemoryRegion container_pcihp;
+
GEDState ged_state;
uint32_t ged_event_bitmap;
qemu_irq irq;
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index f2c3558654..6191b81ef2 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -38,6 +38,8 @@
#define ACPI_PCIHP_SEJ_BASE 0x8
#define ACPI_PCIHP_BNMR_BASE 0x10
+#define ACPI_PCIHP_SIZE 0x0018
+
typedef struct AcpiPciHpPciStatus {
uint32_t up;
uint32_t down;
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index 7a62f8d5bc..f84216a85f 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -12,6 +12,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/acpi/acpi.h"
+#include "hw/acpi/pcihp.h"
#include "hw/acpi/generic_event_device.h"
#include "hw/irq.h"
#include "hw/mem/pc-dimm.h"
@@ -26,6 +27,7 @@ static const uint32_t ged_supported_events[] = {
ACPI_GED_PWR_DOWN_EVT,
ACPI_GED_NVDIMM_HOTPLUG_EVT,
ACPI_GED_CPU_HOTPLUG_EVT,
+ ACPI_GED_PCI_HOTPLUG_EVT,
};
/*
@@ -121,6 +123,12 @@ void build_ged_aml(Aml *table, const char *name, HotplugHandler *hotplug_dev,
aml_notify(aml_name("\\_SB.NVDR"),
aml_int(0x80)));
break;
+ case ACPI_GED_PCI_HOTPLUG_EVT:
+ aml_append(if_ctx,
+ aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF));
+ aml_append(if_ctx, aml_call0("\\_SB.PCI0.PCNT"));
+ aml_append(if_ctx, aml_release(aml_name("\\_SB.PCI0.BLCK")));
+ break;
default:
/*
* Please make sure all the events in ged_supported_events[]
@@ -299,6 +307,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
sel = ACPI_GED_NVDIMM_HOTPLUG_EVT;
} else if (ev & ACPI_CPU_HOTPLUG_STATUS) {
sel = ACPI_GED_CPU_HOTPLUG_EVT;
+ } else if (ev & ACPI_PCI_HOTPLUG_STATUS) {
+ sel = ACPI_GED_PCI_HOTPLUG_EVT;
} else {
/* Unknown event. Return without generating interrupt. */
warn_report("GED: Unsupported event %d. No irq injected", ev);
@@ -428,6 +438,10 @@ static void acpi_ged_realize(DeviceState *dev, Error **errp)
cpu_hotplug_hw_init(&s->container_cpuhp, OBJECT(dev),
&s->cpuhp_state, 0);
break;
+ case ACPI_GED_PCI_HOTPLUG_EVT:
+ memory_region_init(&s->container_pcihp, OBJECT(dev),
+ ACPI_PCIHP_REGION_NAME, ACPI_PCIHP_SIZE);
+ sysbus_init_mmio(sbd, &s->container_pcihp);
}
ged_events--;
}
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 57fe8938b1..e87846a1fa 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -44,7 +44,6 @@
#include "qobject/qnum.h"
#include "trace.h"
-#define ACPI_PCIHP_SIZE 0x0018
#define PCI_UP_BASE 0x0000
#define PCI_DOWN_BASE 0x0004
#define PCI_EJ_BASE 0x0008
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* [PATCH v2 19/25] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (17 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 18/25] hw/acpi/ged: Prepare the device to react to PCI hotplug events Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 14:21 ` Igor Mammedov
2025-05-27 7:40 ` [PATCH v2 20/25] hw/acpi/ged: Support migration of AcpiPciHpState Eric Auger
` (5 subsequent siblings)
24 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Add PCI device related code in the TYPE_HOTPLUG_HANDLER
implementation.
For a PCI device hotplug/hotunplug event, the code routes to
acpi_pcihp_device callbacks (pre_plug_cb, plug_cb, unplug_request_cb,
unplug_cb).
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
hw/acpi/generic_event_device.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index f84216a85f..c0dbf9b358 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -17,6 +17,7 @@
#include "hw/irq.h"
#include "hw/mem/pc-dimm.h"
#include "hw/mem/nvdimm.h"
+#include "hw/pci/pci_device.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "qemu/error-report.h"
@@ -235,6 +236,17 @@ static const MemoryRegionOps ged_regs_ops = {
},
};
+static void acpi_ged_device_pre_plug_cb(HotplugHandler *hotplug_dev,
+ DeviceState *dev, Error **errp)
+{
+ if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp);
+ } else {
+ error_setg(errp, "virt: device pre plug request for unsupported device"
+ " type: %s", object_get_typename(OBJECT(dev)));
+ }
+}
+
static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp)
{
@@ -248,6 +260,8 @@ static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev,
}
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
+ } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ acpi_pcihp_device_plug_cb(hotplug_dev, &s->pcihp_state, dev, errp);
} else {
error_setg(errp, "virt: device plug request for unsupported device"
" type: %s", object_get_typename(OBJECT(dev)));
@@ -264,6 +278,9 @@ static void acpi_ged_unplug_request_cb(HotplugHandler *hotplug_dev,
acpi_memory_unplug_request_cb(hotplug_dev, &s->memhp_state, dev, errp);
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
+ } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->pcihp_state,
+ dev, errp);
} else {
error_setg(errp, "acpi: device unplug request for unsupported device"
" type: %s", object_get_typename(OBJECT(dev)));
@@ -279,6 +296,8 @@ static void acpi_ged_unplug_cb(HotplugHandler *hotplug_dev,
acpi_memory_unplug_cb(&s->memhp_state, dev, errp);
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp);
+ } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ acpi_pcihp_device_unplug_cb(hotplug_dev, &s->pcihp_state, dev, errp);
} else {
error_setg(errp, "acpi: device unplug for unsupported device"
" type: %s", object_get_typename(OBJECT(dev)));
@@ -494,6 +513,7 @@ static void acpi_ged_class_init(ObjectClass *class, const void *data)
dc->vmsd = &vmstate_acpi_ged;
dc->realize = acpi_ged_realize;
+ hc->pre_plug = acpi_ged_device_pre_plug_cb;
hc->plug = acpi_ged_device_plug_cb;
hc->unplug_request = acpi_ged_unplug_request_cb;
hc->unplug = acpi_ged_unplug_cb;
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 19/25] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
2025-05-27 7:40 ` [PATCH v2 19/25] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation Eric Auger
@ 2025-05-27 14:21 ` Igor Mammedov
0 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 14:21 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:21 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Add PCI device related code in the TYPE_HOTPLUG_HANDLER
> implementation.
>
> For a PCI device hotplug/hotunplug event, the code routes to
> acpi_pcihp_device callbacks (pre_plug_cb, plug_cb, unplug_request_cb,
> unplug_cb).
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> ---
> hw/acpi/generic_event_device.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
> index f84216a85f..c0dbf9b358 100644
> --- a/hw/acpi/generic_event_device.c
> +++ b/hw/acpi/generic_event_device.c
> @@ -17,6 +17,7 @@
> #include "hw/irq.h"
> #include "hw/mem/pc-dimm.h"
> #include "hw/mem/nvdimm.h"
> +#include "hw/pci/pci_device.h"
> #include "hw/qdev-properties.h"
> #include "migration/vmstate.h"
> #include "qemu/error-report.h"
> @@ -235,6 +236,17 @@ static const MemoryRegionOps ged_regs_ops = {
> },
> };
>
> +static void acpi_ged_device_pre_plug_cb(HotplugHandler *hotplug_dev,
> + DeviceState *dev, Error **errp)
> +{
> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp);
> + } else {
> + error_setg(errp, "virt: device pre plug request for unsupported device"
> + " type: %s", object_get_typename(OBJECT(dev)));
does memory hotplug still work after that?
why?
> + }
> +}
> +
> static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev,
> DeviceState *dev, Error **errp)
> {
> @@ -248,6 +260,8 @@ static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev,
> }
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
> acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
> + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + acpi_pcihp_device_plug_cb(hotplug_dev, &s->pcihp_state, dev, errp);
> } else {
> error_setg(errp, "virt: device plug request for unsupported device"
> " type: %s", object_get_typename(OBJECT(dev)));
> @@ -264,6 +278,9 @@ static void acpi_ged_unplug_request_cb(HotplugHandler *hotplug_dev,
> acpi_memory_unplug_request_cb(hotplug_dev, &s->memhp_state, dev, errp);
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
> acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
> + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->pcihp_state,
> + dev, errp);
> } else {
> error_setg(errp, "acpi: device unplug request for unsupported device"
> " type: %s", object_get_typename(OBJECT(dev)));
> @@ -279,6 +296,8 @@ static void acpi_ged_unplug_cb(HotplugHandler *hotplug_dev,
> acpi_memory_unplug_cb(&s->memhp_state, dev, errp);
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
> acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp);
> + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + acpi_pcihp_device_unplug_cb(hotplug_dev, &s->pcihp_state, dev, errp);
> } else {
> error_setg(errp, "acpi: device unplug for unsupported device"
> " type: %s", object_get_typename(OBJECT(dev)));
> @@ -494,6 +513,7 @@ static void acpi_ged_class_init(ObjectClass *class, const void *data)
> dc->vmsd = &vmstate_acpi_ged;
> dc->realize = acpi_ged_realize;
>
> + hc->pre_plug = acpi_ged_device_pre_plug_cb;
> hc->plug = acpi_ged_device_plug_cb;
> hc->unplug_request = acpi_ged_unplug_request_cb;
> hc->unplug = acpi_ged_unplug_cb;
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 20/25] hw/acpi/ged: Support migration of AcpiPciHpState
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (18 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 19/25] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 15:14 ` Igor Mammedov
2025-05-27 7:40 ` [PATCH v2 21/25] hw/core/sysbus: Introduce sysbus_mmio_map_name() helper Eric Auger
` (4 subsequent siblings)
24 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Add a subsection to migrate the AcpiPciHpState state.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
hw/acpi/generic_event_device.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index c0dbf9b358..9334249cf5 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -415,6 +415,25 @@ static const VMStateDescription vmstate_ghes_state = {
}
};
+static bool pcihp_needed(void *opaque)
+{
+ AcpiGedState *s = opaque;
+ return s->pcihp_state.use_acpi_hotplug_bridge;
+}
+
+static const VMStateDescription vmstate_pcihp_state = {
+ .name = "acpi-ged/pcihp",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = pcihp_needed,
+ .fields = (const VMStateField[]) {
+ VMSTATE_PCI_HOTPLUG(pcihp_state,
+ AcpiGedState,
+ NULL, NULL),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static const VMStateDescription vmstate_acpi_ged = {
.name = "acpi-ged",
.version_id = 1,
@@ -427,6 +446,7 @@ static const VMStateDescription vmstate_acpi_ged = {
&vmstate_memhp_state,
&vmstate_cpuhp_state,
&vmstate_ghes_state,
+ &vmstate_pcihp_state,
NULL
}
};
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 20/25] hw/acpi/ged: Support migration of AcpiPciHpState
2025-05-27 7:40 ` [PATCH v2 20/25] hw/acpi/ged: Support migration of AcpiPciHpState Eric Auger
@ 2025-05-27 15:14 ` Igor Mammedov
0 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 15:14 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:22 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Add a subsection to migrate the AcpiPciHpState state.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> hw/acpi/generic_event_device.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
> index c0dbf9b358..9334249cf5 100644
> --- a/hw/acpi/generic_event_device.c
> +++ b/hw/acpi/generic_event_device.c
> @@ -415,6 +415,25 @@ static const VMStateDescription vmstate_ghes_state = {
> }
> };
>
> +static bool pcihp_needed(void *opaque)
> +{
> + AcpiGedState *s = opaque;
> + return s->pcihp_state.use_acpi_hotplug_bridge;
> +}
> +
> +static const VMStateDescription vmstate_pcihp_state = {
> + .name = "acpi-ged/pcihp",
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .needed = pcihp_needed,
> + .fields = (const VMStateField[]) {
> + VMSTATE_PCI_HOTPLUG(pcihp_state,
> + AcpiGedState,
> + NULL, NULL),
> + VMSTATE_END_OF_LIST()
> + }
> +};
> +
> static const VMStateDescription vmstate_acpi_ged = {
> .name = "acpi-ged",
> .version_id = 1,
> @@ -427,6 +446,7 @@ static const VMStateDescription vmstate_acpi_ged = {
> &vmstate_memhp_state,
> &vmstate_cpuhp_state,
> &vmstate_ghes_state,
> + &vmstate_pcihp_state,
> NULL
> }
> };
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 21/25] hw/core/sysbus: Introduce sysbus_mmio_map_name() helper
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (19 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 20/25] hw/acpi/ged: Support migration of AcpiPciHpState Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 7:40 ` [PATCH v2 22/25] hw/arm/virt: Let virt support pci hotplug/unplug GED event Eric Auger
` (3 subsequent siblings)
24 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Some sysbus devices have conditionnal mmio regions. This
happens for instance with the hw/acpi/ged device. In that case
it becomes difficult to predict which index a specific MMIO
region corresponds to when one needs to mmio map the region.
Introduce a new helper that takes the name of the region instead
of its index. If the region is not found this returns -1.
Otherwise it maps the corresponding index and returns this latter.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
include/hw/sysbus.h | 1 +
hw/core/sysbus.c | 11 +++++++++++
2 files changed, 12 insertions(+)
diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h
index 7dc88aaa27..18fde8a7b4 100644
--- a/include/hw/sysbus.h
+++ b/include/hw/sysbus.h
@@ -82,6 +82,7 @@ void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq);
bool sysbus_is_irq_connected(SysBusDevice *dev, int n);
qemu_irq sysbus_get_connected_irq(SysBusDevice *dev, int n);
void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr);
+int sysbus_mmio_map_name(SysBusDevice *dev, const char*name, hwaddr addr);
void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr,
int priority);
diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
index e71367adfb..ec69e877a2 100644
--- a/hw/core/sysbus.c
+++ b/hw/core/sysbus.c
@@ -151,6 +151,17 @@ void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr)
sysbus_mmio_map_common(dev, n, addr, false, 0);
}
+int sysbus_mmio_map_name(SysBusDevice *dev, const char *name, hwaddr addr)
+{
+ for (int i = 0; i < dev->num_mmio; i++) {
+ if (!strcmp(dev->mmio[i].memory->name, name)) {
+ sysbus_mmio_map(dev, i, addr);
+ return i;
+ }
+ }
+ return -1;
+}
+
void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr,
int priority)
{
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* [PATCH v2 22/25] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (20 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 21/25] hw/core/sysbus: Introduce sysbus_mmio_map_name() helper Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 15:21 ` Philippe Mathieu-Daudé
2025-05-27 15:56 ` Igor Mammedov
2025-05-27 7:40 ` [PATCH v2 23/25] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks Eric Auger
` (2 subsequent siblings)
24 siblings, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Set up the IO registers used to communicate between QEMU
and ACPI.
Move the create_pcie() call after the creation of the acpi
ged device since hotplug callbacks will soon be called on gpex
realize and will require the acpi pcihp state to be initialized.
The hacky thing is the root bus has not yet been created on
acpi_pcihp_init() call so it is set later after the gpex realize.
How to fix this chicken & egg issue?
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v1 -> v2:
- use ACPI_PCIHP_REGION_NAME
---
include/hw/arm/virt.h | 1 +
hw/arm/virt-acpi-build.c | 1 +
hw/arm/virt.c | 42 +++++++++++++++++++++++++++++++++++-----
3 files changed, 39 insertions(+), 5 deletions(-)
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 1b2e2e1284..a4c4e3a67a 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -35,6 +35,7 @@
#include "hw/boards.h"
#include "hw/arm/boot.h"
#include "hw/arm/bsa.h"
+#include "hw/acpi/pcihp.h"
#include "hw/block/flash.h"
#include "system/kvm.h"
#include "hw/intc/arm_gicv3_common.h"
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 9d88ffc318..cd49f67d60 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -44,6 +44,7 @@
#include "hw/acpi/generic_event_device.h"
#include "hw/acpi/tpm.h"
#include "hw/acpi/hmat.h"
+#include "hw/acpi/pcihp.h"
#include "hw/pci/pcie_host.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_bus.h"
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 4aa40c8e8b..cdcff0a984 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -682,6 +682,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
{
DeviceState *dev;
MachineState *ms = MACHINE(vms);
+ SysBusDevice *sbdev;
+
int irq = vms->irqmap[VIRT_ACPI_GED];
uint32_t event = ACPI_GED_PWR_DOWN_EVT;
@@ -693,12 +695,28 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
event |= ACPI_GED_NVDIMM_HOTPLUG_EVT;
}
+ if (vms->acpi_pcihp) {
+ event |= ACPI_GED_PCI_HOTPLUG_EVT;
+ }
+
dev = qdev_new(TYPE_ACPI_GED);
qdev_prop_set_uint32(dev, "ged-event", event);
- sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+ sbdev = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(sbdev, &error_fatal);
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base);
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
+ sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
+ sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
+ if (vms->acpi_pcihp) {
+ AcpiGedState *acpi_ged_state = ACPI_GED(dev);
+ int i;
+
+ i = sysbus_mmio_map_name(sbdev, ACPI_PCIHP_REGION_NAME,
+ vms->memmap[VIRT_ACPI_PCIHP].base);
+ assert(i >= 0);
+ acpi_pcihp_init(OBJECT(dev), &acpi_ged_state->pcihp_state,
+ vms->bus, sysbus_mmio_get_region(sbdev, i), 0);
+ acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
+ }
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, irq));
return dev;
@@ -1758,6 +1776,13 @@ void virt_machine_done(Notifier *notifier, void *data)
pci_bus_add_fw_cfg_extra_pci_roots(vms->fw_cfg, vms->bus,
&error_abort);
+
+ if (vms->acpi_pcihp) {
+ AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
+
+ acpi_pcihp_reset(&acpi_ged_state->pcihp_state);
+ }
+
virt_acpi_setup(vms);
virt_build_smbios(vms);
}
@@ -2395,8 +2420,6 @@ static void machvirt_init(MachineState *machine)
create_rtc(vms);
- create_pcie(vms);
-
if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
vms->acpi_dev = create_acpi_ged(vms);
@@ -2405,6 +2428,15 @@ static void machvirt_init(MachineState *machine)
create_gpio_devices(vms, VIRT_GPIO, sysmem);
}
+ create_pcie(vms);
+
+ if (vms->acpi_dev) {
+ AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
+
+ acpi_ged_state = ACPI_GED(vms->acpi_dev);
+ acpi_ged_state->pcihp_state.root = vms->bus;
+ }
+
if (vms->secure && !vmc->no_secure_gpio) {
create_gpio_devices(vms, VIRT_SECURE_GPIO, secure_sysmem);
}
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 22/25] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-05-27 7:40 ` [PATCH v2 22/25] hw/arm/virt: Let virt support pci hotplug/unplug GED event Eric Auger
@ 2025-05-27 15:21 ` Philippe Mathieu-Daudé
2025-05-27 15:56 ` Igor Mammedov
1 sibling, 0 replies; 121+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-05-27 15:21 UTC (permalink / raw)
To: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl,
Bernhard Beschow, Mark Cave-Ayland
Cc: pbonzini, Jonathan.Cameron, alex.bennee
Hi Eric,
On 27/5/25 09:40, Eric Auger wrote:
> Set up the IO registers used to communicate between QEMU
> and ACPI.
>
> Move the create_pcie() call after the creation of the acpi
> ged device since hotplug callbacks will soon be called on gpex
> realize and will require the acpi pcihp state to be initialized.
>
> The hacky thing is the root bus has not yet been created on
> acpi_pcihp_init() call so it is set later after the gpex realize.
>
> How to fix this chicken & egg issue?
FYI I have this question tagged since v1, I will try to look at it in
some days...
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
>
> v1 -> v2:
> - use ACPI_PCIHP_REGION_NAME
> ---
> include/hw/arm/virt.h | 1 +
> hw/arm/virt-acpi-build.c | 1 +
> hw/arm/virt.c | 42 +++++++++++++++++++++++++++++++++++-----
> 3 files changed, 39 insertions(+), 5 deletions(-)
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 22/25] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-05-27 7:40 ` [PATCH v2 22/25] hw/arm/virt: Let virt support pci hotplug/unplug GED event Eric Auger
2025-05-27 15:21 ` Philippe Mathieu-Daudé
@ 2025-05-27 15:56 ` Igor Mammedov
2025-05-27 16:44 ` Gustavo Romero
1 sibling, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-05-27 15:56 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:24 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Set up the IO registers used to communicate between QEMU
> and ACPI.
> Move the create_pcie() call after the creation of the acpi
> ged device since hotplug callbacks will soon be called on gpex
> realize and will require the acpi pcihp state to be initialized.
>
> The hacky thing is the root bus has not yet been created on
> acpi_pcihp_init() call so it is set later after the gpex realize.
can you elaborate on this, preferably with call expected call flows?
> How to fix this chicken & egg issue?
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
>
> v1 -> v2:
> - use ACPI_PCIHP_REGION_NAME
> ---
> include/hw/arm/virt.h | 1 +
> hw/arm/virt-acpi-build.c | 1 +
> hw/arm/virt.c | 42 +++++++++++++++++++++++++++++++++++-----
> 3 files changed, 39 insertions(+), 5 deletions(-)
>
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 1b2e2e1284..a4c4e3a67a 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -35,6 +35,7 @@
> #include "hw/boards.h"
> #include "hw/arm/boot.h"
> #include "hw/arm/bsa.h"
> +#include "hw/acpi/pcihp.h"
> #include "hw/block/flash.h"
> #include "system/kvm.h"
> #include "hw/intc/arm_gicv3_common.h"
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 9d88ffc318..cd49f67d60 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -44,6 +44,7 @@
> #include "hw/acpi/generic_event_device.h"
> #include "hw/acpi/tpm.h"
> #include "hw/acpi/hmat.h"
> +#include "hw/acpi/pcihp.h"
> #include "hw/pci/pcie_host.h"
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_bus.h"
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 4aa40c8e8b..cdcff0a984 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -682,6 +682,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
> {
> DeviceState *dev;
> MachineState *ms = MACHINE(vms);
> + SysBusDevice *sbdev;
> +
> int irq = vms->irqmap[VIRT_ACPI_GED];
> uint32_t event = ACPI_GED_PWR_DOWN_EVT;
>
> @@ -693,12 +695,28 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
> event |= ACPI_GED_NVDIMM_HOTPLUG_EVT;
> }
>
> + if (vms->acpi_pcihp) {
> + event |= ACPI_GED_PCI_HOTPLUG_EVT;
> + }
> +
> dev = qdev_new(TYPE_ACPI_GED);
> qdev_prop_set_uint32(dev, "ged-event", event);
> - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
> + sbdev = SYS_BUS_DEVICE(dev);
> + sysbus_realize_and_unref(sbdev, &error_fatal);
>
> - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base);
> - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
> + sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
> + sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
Perhaps move out sbdev renaming into a separate patch, as it's not really related.
> + if (vms->acpi_pcihp) {
> + AcpiGedState *acpi_ged_state = ACPI_GED(dev);
> + int i;
> +
> + i = sysbus_mmio_map_name(sbdev, ACPI_PCIHP_REGION_NAME,
> + vms->memmap[VIRT_ACPI_PCIHP].base);
I don't like mix of old way (index based) above and new name based mapping,
can we use the same, please?
> + assert(i >= 0);
g_assert(sysbus_mmio_map_name...) to get more meaning-full crash
that is not compiled out.
> + acpi_pcihp_init(OBJECT(dev), &acpi_ged_state->pcihp_state,
> + vms->bus, sysbus_mmio_get_region(sbdev, i), 0);
hmm, looks broken..
region mapping must happen after acpi_pcihp_init().
if we after making sysbus_mmio_map() sane and easier to use
(which is a bit on tangent to this series).
We could feed sysbus owner device a memory map (ex: name based),
and then use [pre_]plug handlers on sysbus to map children
automatically.
That will alleviate need to do all mapping manually in every board.
(frankly speaking it deserves its own series, with tree wide cleanup).
As it is I'd use old index based approach like the rest.
(unless you feel adventurous about sysbus refactoring)
> + acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
> + }
> sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, irq));
>
> return dev;
> @@ -1758,6 +1776,13 @@ void virt_machine_done(Notifier *notifier, void *data)
> pci_bus_add_fw_cfg_extra_pci_roots(vms->fw_cfg, vms->bus,
> &error_abort);
> +
> + if (vms->acpi_pcihp) {
> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
> +
> + acpi_pcihp_reset(&acpi_ged_state->pcihp_state);
> + }
> +
> virt_acpi_setup(vms);
> virt_build_smbios(vms);
> }
> @@ -2395,8 +2420,6 @@ static void machvirt_init(MachineState *machine)
>
> create_rtc(vms);
>
> - create_pcie(vms);
> -
> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
> vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
> vms->acpi_dev = create_acpi_ged(vms);
> @@ -2405,6 +2428,15 @@ static void machvirt_init(MachineState *machine)
> create_gpio_devices(vms, VIRT_GPIO, sysmem);
> }
>
> + create_pcie(vms);
> +
> + if (vms->acpi_dev) {
> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
> +
> + acpi_ged_state = ACPI_GED(vms->acpi_dev);
> + acpi_ged_state->pcihp_state.root = vms->bus;
> + }
> +
> if (vms->secure && !vmc->no_secure_gpio) {
> create_gpio_devices(vms, VIRT_SECURE_GPIO, secure_sysmem);
> }
I don't like pulling acpi_pcihp_init()/reset (and issues it causes) into board code,
on x86 it's a part of host bridge device model.
The same should apply to GED device.
The only thing board has to do is map regions into IO space like we do
everywhere else.
with current code, may be add link<pci_bus> property to GED,
and set it before GED realize in create_acpi_ged(),
then just follow existing sysbus_mmio_map() pattern.
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 22/25] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-05-27 15:56 ` Igor Mammedov
@ 2025-05-27 16:44 ` Gustavo Romero
2025-05-27 19:16 ` Gustavo Romero
2025-05-28 10:15 ` Igor Mammedov
0 siblings, 2 replies; 121+ messages in thread
From: Gustavo Romero @ 2025-05-27 16:44 UTC (permalink / raw)
To: Igor Mammedov, Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, anisinha,
mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi folks,
On 5/27/25 12:56, Igor Mammedov wrote:
> On Tue, 27 May 2025 09:40:24 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Set up the IO registers used to communicate between QEMU
>> and ACPI.
>
>
>
>> Move the create_pcie() call after the creation of the acpi
>> ged device since hotplug callbacks will soon be called on gpex
>> realize and will require the acpi pcihp state to be initialized.
>>
>> The hacky thing is the root bus has not yet been created on
>> acpi_pcihp_init() call so it is set later after the gpex realize.
>
> can you elaborate on this, preferably with call expected call flows?
The way I'm understanding it is: because the GED and GPEX are created
in virt.c, so at the machine "level" (and so a machine hotplug handler is
used instead of a device hotplug handler, like it's done in PIIX4 and ICH9
controller in the x86 machines), and they need to be created in that
order because of dependecy of GPEX of GED, the flow is:
1) create_acpi_ged() -> calls acpi_pcihp_init(), which by its turn will inspect the root bus to generate the ACPI code
2) create_pcie() -> just in realize the root bus will be created
and the sequence has to be 1 -> 2, because GED will be used in the GPEX callbacks on hotplug.
So here we're following a different design from the current one in x86,
which handles the hotplug at the PCI controller "level".
Cheers,
Gustavo
>> How to fix this chicken & egg issue?
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>
>> ---
>>
>> v1 -> v2:
>> - use ACPI_PCIHP_REGION_NAME
>> ---
>> include/hw/arm/virt.h | 1 +
>> hw/arm/virt-acpi-build.c | 1 +
>> hw/arm/virt.c | 42 +++++++++++++++++++++++++++++++++++-----
>> 3 files changed, 39 insertions(+), 5 deletions(-)
>>
>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>> index 1b2e2e1284..a4c4e3a67a 100644
>> --- a/include/hw/arm/virt.h
>> +++ b/include/hw/arm/virt.h
>> @@ -35,6 +35,7 @@
>> #include "hw/boards.h"
>> #include "hw/arm/boot.h"
>> #include "hw/arm/bsa.h"
>> +#include "hw/acpi/pcihp.h"
>> #include "hw/block/flash.h"
>> #include "system/kvm.h"
>> #include "hw/intc/arm_gicv3_common.h"
>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>> index 9d88ffc318..cd49f67d60 100644
>> --- a/hw/arm/virt-acpi-build.c
>> +++ b/hw/arm/virt-acpi-build.c
>> @@ -44,6 +44,7 @@
>> #include "hw/acpi/generic_event_device.h"
>> #include "hw/acpi/tpm.h"
>> #include "hw/acpi/hmat.h"
>> +#include "hw/acpi/pcihp.h"
>> #include "hw/pci/pcie_host.h"
>> #include "hw/pci/pci.h"
>> #include "hw/pci/pci_bus.h"
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 4aa40c8e8b..cdcff0a984 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -682,6 +682,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
>> {
>> DeviceState *dev;
>> MachineState *ms = MACHINE(vms);
>> + SysBusDevice *sbdev;
>> +
>> int irq = vms->irqmap[VIRT_ACPI_GED];
>> uint32_t event = ACPI_GED_PWR_DOWN_EVT;
>>
>> @@ -693,12 +695,28 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
>> event |= ACPI_GED_NVDIMM_HOTPLUG_EVT;
>> }
>>
>> + if (vms->acpi_pcihp) {
>> + event |= ACPI_GED_PCI_HOTPLUG_EVT;
>> + }
>> +
>> dev = qdev_new(TYPE_ACPI_GED);
>> qdev_prop_set_uint32(dev, "ged-event", event);
>> - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
>> + sbdev = SYS_BUS_DEVICE(dev);
>> + sysbus_realize_and_unref(sbdev, &error_fatal);
>>
>> - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base);
>> - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
>> + sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
>> + sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
>
>
> Perhaps move out sbdev renaming into a separate patch, as it's not really related.
>
>> + if (vms->acpi_pcihp) {
>> + AcpiGedState *acpi_ged_state = ACPI_GED(dev);
>> + int i;
>> +
>> + i = sysbus_mmio_map_name(sbdev, ACPI_PCIHP_REGION_NAME,
>> + vms->memmap[VIRT_ACPI_PCIHP].base);
>
> I don't like mix of old way (index based) above and new name based mapping,
> can we use the same, please?
>
>> + assert(i >= 0);
> g_assert(sysbus_mmio_map_name...) to get more meaning-full crash
> that is not compiled out.
>
>> + acpi_pcihp_init(OBJECT(dev), &acpi_ged_state->pcihp_state,
>> + vms->bus, sysbus_mmio_get_region(sbdev, i), 0);
>
> hmm, looks broken..
> region mapping must happen after acpi_pcihp_init().
>
> if we after making sysbus_mmio_map() sane and easier to use
> (which is a bit on tangent to this series).
> We could feed sysbus owner device a memory map (ex: name based),
> and then use [pre_]plug handlers on sysbus to map children
> automatically.
> That will alleviate need to do all mapping manually in every board.
> (frankly speaking it deserves its own series, with tree wide cleanup).
>
> As it is I'd use old index based approach like the rest.
> (unless you feel adventurous about sysbus refactoring)
>
>
>> + acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
>> + }
>> sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, irq));
>>
>> return dev;
>> @@ -1758,6 +1776,13 @@ void virt_machine_done(Notifier *notifier, void *data)
>> pci_bus_add_fw_cfg_extra_pci_roots(vms->fw_cfg, vms->bus,
>> &error_abort);
>
>
>> +
>> + if (vms->acpi_pcihp) {
>> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
>> +
>> + acpi_pcihp_reset(&acpi_ged_state->pcihp_state);
>> + }
>> +
>> virt_acpi_setup(vms);
>> virt_build_smbios(vms);
>> }
>> @@ -2395,8 +2420,6 @@ static void machvirt_init(MachineState *machine)
>>
>> create_rtc(vms);
>>
>> - create_pcie(vms);
>> -
>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
>> vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
>> vms->acpi_dev = create_acpi_ged(vms);
>> @@ -2405,6 +2428,15 @@ static void machvirt_init(MachineState *machine)
>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>> }
>>
>> + create_pcie(vms);
>> +
>> + if (vms->acpi_dev) {
>> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
>> +
>> + acpi_ged_state = ACPI_GED(vms->acpi_dev);
>> + acpi_ged_state->pcihp_state.root = vms->bus;
>> + }
>> +
>> if (vms->secure && !vmc->no_secure_gpio) {
>> create_gpio_devices(vms, VIRT_SECURE_GPIO, secure_sysmem);
>> }
>
> I don't like pulling acpi_pcihp_init()/reset (and issues it causes) into board code,
> on x86 it's a part of host bridge device model.
> The same should apply to GED device.
>
> The only thing board has to do is map regions into IO space like we do
> everywhere else.
>
> with current code, may be add link<pci_bus> property to GED,
> and set it before GED realize in create_acpi_ged(),
> then just follow existing sysbus_mmio_map() pattern.
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 22/25] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-05-27 16:44 ` Gustavo Romero
@ 2025-05-27 19:16 ` Gustavo Romero
2025-05-28 10:15 ` Igor Mammedov
1 sibling, 0 replies; 121+ messages in thread
From: Gustavo Romero @ 2025-05-27 19:16 UTC (permalink / raw)
To: Igor Mammedov, Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, anisinha,
mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
On 5/27/25 13:44, Gustavo Romero wrote:
> Hi folks,
>
> On 5/27/25 12:56, Igor Mammedov wrote:
>> On Tue, 27 May 2025 09:40:24 +0200
>> Eric Auger <eric.auger@redhat.com> wrote:
>>
>>> Set up the IO registers used to communicate between QEMU
>>> and ACPI.
>>
>>
>>
>>> Move the create_pcie() call after the creation of the acpi
>>> ged device since hotplug callbacks will soon be called on gpex
>>> realize and will require the acpi pcihp state to be initialized.
>>>
>>> The hacky thing is the root bus has not yet been created on
>>> acpi_pcihp_init() call so it is set later after the gpex realize.
>>
>> can you elaborate on this, preferably with call expected call flows?
>
> The way I'm understanding it is: because the GED and GPEX are created
> in virt.c, so at the machine "level" (and so a machine hotplug handler is
> used instead of a device hotplug handler, like it's done in PIIX4 and ICH9
> controller in the x86 machines), and they need to be created in that
> order because of dependecy of GPEX of GED, the flow is:
>
> 1) create_acpi_ged() -> calls acpi_pcihp_init(), which by its turn will inspect the root bus to generate the ACPI code
> 2) create_pcie() -> just in realize the root bus will be created
>
> and the sequence has to be 1 -> 2, because GED will be used in the GPEX callbacks on hotplug.
>
> So here we're following a different design from the current one in x86,
> which handles the hotplug at the PCI controller "level".
... where this chicken & egg doesn't exist, I meant.
So one option would be follow the ICH9 design, i.e.,
the call to acpi_pcihp_init() would be from a gpex_root_class_realize() (to be created)
and set in gpex_root_class_init(), like k->realize = gpex_root_class_realize.
AcpiPciHpState would then be part of GPEXRootState struct. TYPE_GPEX_ROOT_DEVICE would
also define the interfaces TYPE_HOTPLUG_HANDLER and TYPE_ACPI_DEVICE_IF, and
gpex_root_class_init() will set callbacks on these interfaces, for instance:
hc->pre_plug = gpex_device_pre_plug_cb;
hc->plug = gpex_device_plug_cb;
hc->unplug_request = gpex_device_unplug_request_cb;
hc->unplug = gpex_device_unplug_cb;
hc->is_hotpluggable_bus = gpex_is_hotpluggable_bus;
adevc->send_event = gpex_root_acpi_send_event;
Cheers,
Gustavo
>
> Cheers,
> Gustavo
>
>>> How to fix this chicken & egg issue?
>>>
>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>
>>> ---
>>>
>>> v1 -> v2:
>>> - use ACPI_PCIHP_REGION_NAME
>>> ---
>>> include/hw/arm/virt.h | 1 +
>>> hw/arm/virt-acpi-build.c | 1 +
>>> hw/arm/virt.c | 42 +++++++++++++++++++++++++++++++++++-----
>>> 3 files changed, 39 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>> index 1b2e2e1284..a4c4e3a67a 100644
>>> --- a/include/hw/arm/virt.h
>>> +++ b/include/hw/arm/virt.h
>>> @@ -35,6 +35,7 @@
>>> #include "hw/boards.h"
>>> #include "hw/arm/boot.h"
>>> #include "hw/arm/bsa.h"
>>> +#include "hw/acpi/pcihp.h"
>>> #include "hw/block/flash.h"
>>> #include "system/kvm.h"
>>> #include "hw/intc/arm_gicv3_common.h"
>>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>>> index 9d88ffc318..cd49f67d60 100644
>>> --- a/hw/arm/virt-acpi-build.c
>>> +++ b/hw/arm/virt-acpi-build.c
>>> @@ -44,6 +44,7 @@
>>> #include "hw/acpi/generic_event_device.h"
>>> #include "hw/acpi/tpm.h"
>>> #include "hw/acpi/hmat.h"
>>> +#include "hw/acpi/pcihp.h"
>>> #include "hw/pci/pcie_host.h"
>>> #include "hw/pci/pci.h"
>>> #include "hw/pci/pci_bus.h"
>>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>>> index 4aa40c8e8b..cdcff0a984 100644
>>> --- a/hw/arm/virt.c
>>> +++ b/hw/arm/virt.c
>>> @@ -682,6 +682,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
>>> {
>>> DeviceState *dev;
>>> MachineState *ms = MACHINE(vms);
>>> + SysBusDevice *sbdev;
>>> +
>>> int irq = vms->irqmap[VIRT_ACPI_GED];
>>> uint32_t event = ACPI_GED_PWR_DOWN_EVT;
>>> @@ -693,12 +695,28 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
>>> event |= ACPI_GED_NVDIMM_HOTPLUG_EVT;
>>> }
>>> + if (vms->acpi_pcihp) {
>>> + event |= ACPI_GED_PCI_HOTPLUG_EVT;
>>> + }
>>> +
>>> dev = qdev_new(TYPE_ACPI_GED);
>>> qdev_prop_set_uint32(dev, "ged-event", event);
>>> - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
>>> + sbdev = SYS_BUS_DEVICE(dev);
>>> + sysbus_realize_and_unref(sbdev, &error_fatal);
>>> - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base);
>>> - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
>>> + sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
>>> + sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
>>
>>
>> Perhaps move out sbdev renaming into a separate patch, as it's not really related.
>>
>>> + if (vms->acpi_pcihp) {
>>> + AcpiGedState *acpi_ged_state = ACPI_GED(dev);
>>> + int i;
>>> +
>>> + i = sysbus_mmio_map_name(sbdev, ACPI_PCIHP_REGION_NAME,
>>> + vms->memmap[VIRT_ACPI_PCIHP].base);
>>
>> I don't like mix of old way (index based) above and new name based mapping,
>> can we use the same, please?
>>
>>> + assert(i >= 0);
>> g_assert(sysbus_mmio_map_name...) to get more meaning-full crash
>> that is not compiled out.
>>
>>> + acpi_pcihp_init(OBJECT(dev), &acpi_ged_state->pcihp_state,
>>> + vms->bus, sysbus_mmio_get_region(sbdev, i), 0);
>>
>> hmm, looks broken..
>> region mapping must happen after acpi_pcihp_init().
>>
>> if we after making sysbus_mmio_map() sane and easier to use
>> (which is a bit on tangent to this series).
>> We could feed sysbus owner device a memory map (ex: name based),
>> and then use [pre_]plug handlers on sysbus to map children
>> automatically.
>> That will alleviate need to do all mapping manually in every board.
>> (frankly speaking it deserves its own series, with tree wide cleanup).
>>
>> As it is I'd use old index based approach like the rest.
>> (unless you feel adventurous about sysbus refactoring)
>>
>>
>>> + acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
>>> + }
>>> sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, irq));
>>> return dev;
>>> @@ -1758,6 +1776,13 @@ void virt_machine_done(Notifier *notifier, void *data)
>>> pci_bus_add_fw_cfg_extra_pci_roots(vms->fw_cfg, vms->bus,
>>> &error_abort);
>>
>>
>>> +
>>> + if (vms->acpi_pcihp) {
>>> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
>>> +
>>> + acpi_pcihp_reset(&acpi_ged_state->pcihp_state);
>>> + }
>>> +
>>> virt_acpi_setup(vms);
>>> virt_build_smbios(vms);
>>> }
>>> @@ -2395,8 +2420,6 @@ static void machvirt_init(MachineState *machine)
>>> create_rtc(vms);
>>> - create_pcie(vms);
>>> -
>>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
>>> vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
>>> vms->acpi_dev = create_acpi_ged(vms);
>>> @@ -2405,6 +2428,15 @@ static void machvirt_init(MachineState *machine)
>>> create_gpio_devices(vms, VIRT_GPIO, sysmem);
>>> }
>>> + create_pcie(vms);
>>> +
>>> + if (vms->acpi_dev) {
>>> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
>>> +
>>> + acpi_ged_state = ACPI_GED(vms->acpi_dev);
>>> + acpi_ged_state->pcihp_state.root = vms->bus;
>>> + }
>>> +
>>> if (vms->secure && !vmc->no_secure_gpio) {
>>> create_gpio_devices(vms, VIRT_SECURE_GPIO, secure_sysmem);
>>> }
>>
>> I don't like pulling acpi_pcihp_init()/reset (and issues it causes) into board code,
>> on x86 it's a part of host bridge device model.
>> The same should apply to GED device.
>>
>> The only thing board has to do is map regions into IO space like we do
>> everywhere else.
>>
>> with current code, may be add link<pci_bus> property to GED,
>> and set it before GED realize in create_acpi_ged(),
>> then just follow existing sysbus_mmio_map() pattern.
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 22/25] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-05-27 16:44 ` Gustavo Romero
2025-05-27 19:16 ` Gustavo Romero
@ 2025-05-28 10:15 ` Igor Mammedov
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-28 10:15 UTC (permalink / raw)
To: Gustavo Romero
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
anisinha, mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
On Tue, 27 May 2025 13:44:35 -0300
Gustavo Romero <gustavo.romero@linaro.org> wrote:
> Hi folks,
>
> On 5/27/25 12:56, Igor Mammedov wrote:
> > On Tue, 27 May 2025 09:40:24 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> >> Set up the IO registers used to communicate between QEMU
> >> and ACPI.
> >
> >
> >
> >> Move the create_pcie() call after the creation of the acpi
> >> ged device since hotplug callbacks will soon be called on gpex
> >> realize and will require the acpi pcihp state to be initialized.
> >>
> >> The hacky thing is the root bus has not yet been created on
> >> acpi_pcihp_init() call so it is set later after the gpex realize.
> >
> > can you elaborate on this, preferably with call expected call flows?
>
> The way I'm understanding it is: because the GED and GPEX are created
> in virt.c, so at the machine "level" (and so a machine hotplug handler is
> used instead of a device hotplug handler, like it's done in PIIX4 and ICH9
> controller in the x86 machines), and they need to be created in that
> order because of dependecy of GPEX of GED, the flow is:
>
> 1) create_acpi_ged() -> calls acpi_pcihp_init(), which by its turn will inspect the root bus to generate the ACPI code
> 2) create_pcie() -> just in realize the root bus will be created
>
> and the sequence has to be 1 -> 2, because GED will be used in the GPEX callbacks on hotplug.
>
> So here we're following a different design from the current one in x86,
> which handles the hotplug at the PCI controller "level".
It should be fine to keep x86 design instead of making up a new one
(unless we have to).
The difference between x86 and ARM is that acpi device happens to part of
host bridge or its children. While in ARM virt, its separate devices
(GPEX & GED).
From quick glance at the code, It should be fine to keep pcihp hw as part
of GED. All it needs from host-bridge is root bus, the rest is paravirt
ACPI magic wand.
Also we typically handle hotplug for devices that have parent bus
we are using bus hotplug handler.
Only bus-less or complicated cases are orchestrated by machine.
That's what is not this series, it probably has been overlooked
since it's not in pcihp.c, so kinda not obvious.
for example see:
ich9_pm_init()
qbus_set_hotplug_handler()
where default native hotplug handler is overridden with ACPI one,
and then later on, all coldplug bridges are picked up by
acpi_pcihp_device_plug_cb() and got the same treatment.
So I'd suggest to try keeping current order with few changes
create pci
create ged (bus)
acpidev = object_new(GED)
object_property_set_link(acpidev, 'pci_root_bus', bus)
realize(acpidev)
and then in
ged_realize(dev)
acpi_pcihp_init()
qbus_set_hotplug_handler(root_bus, dev)
that's likely would do the job.
>
> Cheers,
> Gustavo
>
> >> How to fix this chicken & egg issue?
> >>
> >> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >>
> >> ---
> >>
> >> v1 -> v2:
> >> - use ACPI_PCIHP_REGION_NAME
> >> ---
> >> include/hw/arm/virt.h | 1 +
> >> hw/arm/virt-acpi-build.c | 1 +
> >> hw/arm/virt.c | 42 +++++++++++++++++++++++++++++++++++-----
> >> 3 files changed, 39 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> >> index 1b2e2e1284..a4c4e3a67a 100644
> >> --- a/include/hw/arm/virt.h
> >> +++ b/include/hw/arm/virt.h
> >> @@ -35,6 +35,7 @@
> >> #include "hw/boards.h"
> >> #include "hw/arm/boot.h"
> >> #include "hw/arm/bsa.h"
> >> +#include "hw/acpi/pcihp.h"
> >> #include "hw/block/flash.h"
> >> #include "system/kvm.h"
> >> #include "hw/intc/arm_gicv3_common.h"
> >> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> >> index 9d88ffc318..cd49f67d60 100644
> >> --- a/hw/arm/virt-acpi-build.c
> >> +++ b/hw/arm/virt-acpi-build.c
> >> @@ -44,6 +44,7 @@
> >> #include "hw/acpi/generic_event_device.h"
> >> #include "hw/acpi/tpm.h"
> >> #include "hw/acpi/hmat.h"
> >> +#include "hw/acpi/pcihp.h"
> >> #include "hw/pci/pcie_host.h"
> >> #include "hw/pci/pci.h"
> >> #include "hw/pci/pci_bus.h"
> >> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> >> index 4aa40c8e8b..cdcff0a984 100644
> >> --- a/hw/arm/virt.c
> >> +++ b/hw/arm/virt.c
> >> @@ -682,6 +682,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
> >> {
> >> DeviceState *dev;
> >> MachineState *ms = MACHINE(vms);
> >> + SysBusDevice *sbdev;
> >> +
> >> int irq = vms->irqmap[VIRT_ACPI_GED];
> >> uint32_t event = ACPI_GED_PWR_DOWN_EVT;
> >>
> >> @@ -693,12 +695,28 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
> >> event |= ACPI_GED_NVDIMM_HOTPLUG_EVT;
> >> }
> >>
> >> + if (vms->acpi_pcihp) {
> >> + event |= ACPI_GED_PCI_HOTPLUG_EVT;
> >> + }
> >> +
> >> dev = qdev_new(TYPE_ACPI_GED);
> >> qdev_prop_set_uint32(dev, "ged-event", event);
> >> - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
> >> + sbdev = SYS_BUS_DEVICE(dev);
> >> + sysbus_realize_and_unref(sbdev, &error_fatal);
> >>
> >> - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base);
> >> - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
> >> + sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
> >> + sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
> >
> >
> > Perhaps move out sbdev renaming into a separate patch, as it's not really related.
> >
> >> + if (vms->acpi_pcihp) {
> >> + AcpiGedState *acpi_ged_state = ACPI_GED(dev);
> >> + int i;
> >> +
> >> + i = sysbus_mmio_map_name(sbdev, ACPI_PCIHP_REGION_NAME,
> >> + vms->memmap[VIRT_ACPI_PCIHP].base);
> >
> > I don't like mix of old way (index based) above and new name based mapping,
> > can we use the same, please?
> >
> >> + assert(i >= 0);
> > g_assert(sysbus_mmio_map_name...) to get more meaning-full crash
> > that is not compiled out.
> >
> >> + acpi_pcihp_init(OBJECT(dev), &acpi_ged_state->pcihp_state,
> >> + vms->bus, sysbus_mmio_get_region(sbdev, i), 0);
> >
> > hmm, looks broken..
> > region mapping must happen after acpi_pcihp_init().
> >
> > if we after making sysbus_mmio_map() sane and easier to use
> > (which is a bit on tangent to this series).
> > We could feed sysbus owner device a memory map (ex: name based),
> > and then use [pre_]plug handlers on sysbus to map children
> > automatically.
> > That will alleviate need to do all mapping manually in every board.
> > (frankly speaking it deserves its own series, with tree wide cleanup).
> >
> > As it is I'd use old index based approach like the rest.
> > (unless you feel adventurous about sysbus refactoring)
> >
> >
> >> + acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
> >> + }
> >> sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, irq));
> >>
> >> return dev;
> >> @@ -1758,6 +1776,13 @@ void virt_machine_done(Notifier *notifier, void *data)
> >> pci_bus_add_fw_cfg_extra_pci_roots(vms->fw_cfg, vms->bus,
> >> &error_abort);
> >
> >
> >> +
> >> + if (vms->acpi_pcihp) {
> >> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
> >> +
> >> + acpi_pcihp_reset(&acpi_ged_state->pcihp_state);
> >> + }
> >> +
> >> virt_acpi_setup(vms);
> >> virt_build_smbios(vms);
> >> }
> >> @@ -2395,8 +2420,6 @@ static void machvirt_init(MachineState *machine)
> >>
> >> create_rtc(vms);
> >>
> >> - create_pcie(vms);
> >> -
> >> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
> >> vms->acpi_pcihp &= !vmc->no_acpi_pcihp;
> >> vms->acpi_dev = create_acpi_ged(vms);
> >> @@ -2405,6 +2428,15 @@ static void machvirt_init(MachineState *machine)
> >> create_gpio_devices(vms, VIRT_GPIO, sysmem);
> >> }
> >>
> >> + create_pcie(vms);
> >> +
> >> + if (vms->acpi_dev) {
> >> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
> >> +
> >> + acpi_ged_state = ACPI_GED(vms->acpi_dev);
> >> + acpi_ged_state->pcihp_state.root = vms->bus;
> >> + }
> >> +
> >> if (vms->secure && !vmc->no_secure_gpio) {
> >> create_gpio_devices(vms, VIRT_SECURE_GPIO, secure_sysmem);
> >> }
> >
> > I don't like pulling acpi_pcihp_init()/reset (and issues it causes) into board code,
> > on x86 it's a part of host bridge device model.
> > The same should apply to GED device.
> >
> > The only thing board has to do is map regions into IO space like we do
> > everywhere else.
> >
> > with current code, may be add link<pci_bus> property to GED,
> > and set it before GED realize in create_acpi_ged(),
> > then just follow existing sysbus_mmio_map() pattern.
> >
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 23/25] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (21 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 22/25] hw/arm/virt: Let virt support pci hotplug/unplug GED event Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-27 7:40 ` [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off Eric Auger
2025-05-27 7:40 ` [PATCH v2 25/25] hw/arm/virt: Use ACPI PCI hotplug by default Eric Auger
24 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
hw/arm/virt.c | 37 ++++++++++++++++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index cdcff0a984..adb9422e14 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -87,6 +87,7 @@
#include "hw/virtio/virtio-iommu.h"
#include "hw/char/pl011.h"
#include "qemu/guest-random.h"
+#include "hw/acpi/pcihp.h"
static GlobalProperty arm_virt_compat[] = {
{ TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "48" },
@@ -2973,6 +2974,11 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev,
qlist_append_str(reserved_regions, resv_prop_str);
qdev_prop_set_array(dev, "reserved-regions", reserved_regions);
g_free(resv_prop_str);
+ } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ if (vms->acpi_pcihp) {
+ acpi_pcihp_device_pre_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
+ dev, errp);
+ }
}
}
@@ -3002,6 +3008,14 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev,
vms->iommu = VIRT_IOMMU_VIRTIO;
vms->virtio_iommu_bdf = pci_get_bdf(pdev);
create_virtio_iommu_dt_bindings(vms);
+ } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
+ AcpiPciHpState *acpi_pci_hotplug = &acpi_ged_state->pcihp_state;
+
+ if (vms->acpi_pcihp) {
+ acpi_pcihp_device_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
+ acpi_pci_hotplug, dev, errp);
+ }
}
}
@@ -3051,6 +3065,15 @@ static void virt_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
} else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
virtio_md_pci_unplug_request(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev),
errp);
+ } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
+ AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
+ AcpiPciHpState *acpi_pci_hotplug = &acpi_ged_state->pcihp_state;
+
+ if (vms->acpi_pcihp) {
+ acpi_pcihp_device_unplug_request_cb(HOTPLUG_HANDLER(vms->acpi_dev),
+ acpi_pci_hotplug, dev, errp);
+ }
} else {
error_setg(errp, "device unplug request for unsupported device"
" type: %s", object_get_typename(OBJECT(dev)));
@@ -3064,6 +3087,15 @@ static void virt_machine_device_unplug_cb(HotplugHandler *hotplug_dev,
virt_dimm_unplug(hotplug_dev, dev, errp);
} else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
virtio_md_pci_unplug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), errp);
+ } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
+ AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
+ AcpiPciHpState *acpi_pci_hotplug = &acpi_ged_state->pcihp_state;
+
+ if (vms->acpi_pcihp) {
+ acpi_pcihp_device_unplug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
+ acpi_pci_hotplug, dev, errp);
+ }
} else {
error_setg(errp, "virt: device unplug for unsupported device"
" type: %s", object_get_typename(OBJECT(dev)));
@@ -3074,11 +3106,14 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine,
DeviceState *dev)
{
MachineClass *mc = MACHINE_GET_CLASS(machine);
+ VirtMachineState *vms = VIRT_MACHINE(machine);
if (device_is_dynamic_sysbus(mc, dev) ||
object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI) ||
- object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) {
+ object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) ||
+ (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE) &&
+ vms->acpi_pcihp)) {
return HOTPLUG_HANDLER(machine);
}
return NULL;
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (22 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 23/25] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
2025-05-28 9:38 ` Igor Mammedov
2025-05-27 7:40 ` [PATCH v2 25/25] hw/arm/virt: Use ACPI PCI hotplug by default Eric Auger
24 siblings, 1 reply; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
From: Gustavo Romero <gustavo.romero@linaro.org>
ACPI PCI hotplug is now turned on by default so we need to change the
existing tests to keep it off. However, even setting the ACPI PCI
hotplug off in the existing tests, there will be changes in the ACPI
tables because the _OSC method was modified, hence in the next patch of
this series the blobs are updated accordingly.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
[Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
---
tests/qtest/bios-tables-test.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 0a333ec435..6379dba714 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
};
data.variant = ".memhp";
- test_acpi_one(" -machine nvdimm=on"
+ test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
" -cpu cortex-a57"
" -m 256M,slots=3,maxmem=1G"
" -object memory-backend-ram,id=ram0,size=128M"
@@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
};
data.variant = ".numamem";
- test_acpi_one(" -cpu cortex-a57"
+ test_acpi_one(" -machine acpi-pcihp=off"
+ " -cpu cortex-a57"
" -object memory-backend-ram,id=ram0,size=128M"
" -numa node,memdev=ram0",
&data);
@@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
* to solve the conflicts.
*/
data.variant = ".pxb";
- test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
+ test_acpi_one(" -machine acpi-pcihp=off"
+ " -device pcie-root-port,chassis=1,id=pci.1"
" -device virtio-scsi-pci,id=scsi0,bus=pci.1"
" -drive file="
"tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
@@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
data.variant = ".acpihmatvirt";
- test_acpi_one(" -machine hmat=on"
+ test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
" -cpu cortex-a57"
" -smp 4,sockets=2"
" -m 384M"
@@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
data.smbios_cpu_max_speed = 2900;
data.smbios_cpu_curr_speed = 2700;
test_acpi_one("-cpu cortex-a57 "
+ "-machine acpi-pcihp=off "
"-smbios type=4,max-speed=2900,current-speed=2700", &data);
free_test_data(&data);
}
@@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
};
test_acpi_one("-cpu cortex-a57 "
+ "-machine acpi-pcihp=off "
"-smp sockets=1,clusters=2,cores=2,threads=2", &data);
free_test_data(&data);
}
@@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
};
test_acpi_one("-cpu cortex-a57 "
+ "-machine acpi-pcihp=off "
"-device virtio-iommu-pci", &data);
free_test_data(&data);
}
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-27 7:40 ` [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off Eric Auger
@ 2025-05-28 9:38 ` Igor Mammedov
2025-05-28 9:48 ` Eric Auger
2025-05-28 12:41 ` Gustavo Romero
0 siblings, 2 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-28 9:38 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Tue, 27 May 2025 09:40:26 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> From: Gustavo Romero <gustavo.romero@linaro.org>
>
> ACPI PCI hotplug is now turned on by default so we need to change the
> existing tests to keep it off. However, even setting the ACPI PCI
> hotplug off in the existing tests, there will be changes in the ACPI
> tables because the _OSC method was modified, hence in the next patch of
> this series the blobs are updated accordingly.
>
> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
it would be better to test whatever default we end up with.
(like x86)
>
> ---
>
> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
> ---
> tests/qtest/bios-tables-test.c | 13 +++++++++----
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> index 0a333ec435..6379dba714 100644
> --- a/tests/qtest/bios-tables-test.c
> +++ b/tests/qtest/bios-tables-test.c
> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
> };
>
> data.variant = ".memhp";
> - test_acpi_one(" -machine nvdimm=on"
> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
> " -cpu cortex-a57"
> " -m 256M,slots=3,maxmem=1G"
> " -object memory-backend-ram,id=ram0,size=128M"
> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
> };
>
> data.variant = ".numamem";
> - test_acpi_one(" -cpu cortex-a57"
> + test_acpi_one(" -machine acpi-pcihp=off"
> + " -cpu cortex-a57"
> " -object memory-backend-ram,id=ram0,size=128M"
> " -numa node,memdev=ram0",
> &data);
> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
> * to solve the conflicts.
> */
> data.variant = ".pxb";
> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
> + test_acpi_one(" -machine acpi-pcihp=off"
> + " -device pcie-root-port,chassis=1,id=pci.1"
> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
> " -drive file="
> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
>
> data.variant = ".acpihmatvirt";
>
> - test_acpi_one(" -machine hmat=on"
> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
> " -cpu cortex-a57"
> " -smp 4,sockets=2"
> " -m 384M"
> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
> data.smbios_cpu_max_speed = 2900;
> data.smbios_cpu_curr_speed = 2700;
> test_acpi_one("-cpu cortex-a57 "
> + "-machine acpi-pcihp=off "
> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
> free_test_data(&data);
> }
> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
> };
>
> test_acpi_one("-cpu cortex-a57 "
> + "-machine acpi-pcihp=off "
> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
> free_test_data(&data);
> }
> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
> };
>
> test_acpi_one("-cpu cortex-a57 "
> + "-machine acpi-pcihp=off "
> "-device virtio-iommu-pci", &data);
> free_test_data(&data);
> }
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-28 9:38 ` Igor Mammedov
@ 2025-05-28 9:48 ` Eric Auger
2025-05-28 10:49 ` Igor Mammedov
2025-06-02 6:16 ` Gustavo Romero
2025-05-28 12:41 ` Gustavo Romero
1 sibling, 2 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-28 9:48 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
Hi Igor,
On 5/28/25 11:38 AM, Igor Mammedov wrote:
> On Tue, 27 May 2025 09:40:26 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>
>> ACPI PCI hotplug is now turned on by default so we need to change the
>> existing tests to keep it off. However, even setting the ACPI PCI
>> hotplug off in the existing tests, there will be changes in the ACPI
>> tables because the _OSC method was modified, hence in the next patch of
>> this series the blobs are updated accordingly.
>>
>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> it would be better to test whatever default we end up with.
> (like x86)
See my question on patch 2's comment. We intended to have tests for both
modes (legacy and acpi pcihp). Gustavo added some new tests for the new
default, namely acpi pcihp. Now I did not really understand your point
about keeping legacy mode as a default.
Thanks
Eric
>
>> ---
>>
>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
>> ---
>> tests/qtest/bios-tables-test.c | 13 +++++++++----
>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>
>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
>> index 0a333ec435..6379dba714 100644
>> --- a/tests/qtest/bios-tables-test.c
>> +++ b/tests/qtest/bios-tables-test.c
>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>> };
>>
>> data.variant = ".memhp";
>> - test_acpi_one(" -machine nvdimm=on"
>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
>> " -cpu cortex-a57"
>> " -m 256M,slots=3,maxmem=1G"
>> " -object memory-backend-ram,id=ram0,size=128M"
>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
>> };
>>
>> data.variant = ".numamem";
>> - test_acpi_one(" -cpu cortex-a57"
>> + test_acpi_one(" -machine acpi-pcihp=off"
>> + " -cpu cortex-a57"
>> " -object memory-backend-ram,id=ram0,size=128M"
>> " -numa node,memdev=ram0",
>> &data);
>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
>> * to solve the conflicts.
>> */
>> data.variant = ".pxb";
>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
>> + test_acpi_one(" -machine acpi-pcihp=off"
>> + " -device pcie-root-port,chassis=1,id=pci.1"
>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
>> " -drive file="
>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
>>
>> data.variant = ".acpihmatvirt";
>>
>> - test_acpi_one(" -machine hmat=on"
>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
>> " -cpu cortex-a57"
>> " -smp 4,sockets=2"
>> " -m 384M"
>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
>> data.smbios_cpu_max_speed = 2900;
>> data.smbios_cpu_curr_speed = 2700;
>> test_acpi_one("-cpu cortex-a57 "
>> + "-machine acpi-pcihp=off "
>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
>> free_test_data(&data);
>> }
>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
>> };
>>
>> test_acpi_one("-cpu cortex-a57 "
>> + "-machine acpi-pcihp=off "
>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
>> free_test_data(&data);
>> }
>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
>> };
>>
>> test_acpi_one("-cpu cortex-a57 "
>> + "-machine acpi-pcihp=off "
>> "-device virtio-iommu-pci", &data);
>> free_test_data(&data);
>> }
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-28 9:48 ` Eric Auger
@ 2025-05-28 10:49 ` Igor Mammedov
2025-06-02 6:16 ` Gustavo Romero
1 sibling, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-28 10:49 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Wed, 28 May 2025 11:48:20 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Hi Igor,
>
> On 5/28/25 11:38 AM, Igor Mammedov wrote:
> > On Tue, 27 May 2025 09:40:26 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> >> From: Gustavo Romero <gustavo.romero@linaro.org>
> >>
> >> ACPI PCI hotplug is now turned on by default so we need to change the
> >> existing tests to keep it off. However, even setting the ACPI PCI
> >> hotplug off in the existing tests, there will be changes in the ACPI
> >> tables because the _OSC method was modified, hence in the next patch of
> >> this series the blobs are updated accordingly.
> >>
> >> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> >> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > it would be better to test whatever default we end up with.
> > (like x86)
>
> See my question on patch 2's comment. We intended to have tests for both
> modes (legacy and acpi pcihp). Gustavo added some new tests for the new
> default, namely acpi pcihp. Now I did not really understand your point
> about keeping legacy mode as a default.
default legacy wrt tests are orthogonal things.
Just decide what default should be in #2 and then make sure existing tests
work with that.
Default (majority) tests shouldn't include CLI option a for a feature 'acpi-pcihp',
only legacy tests should have it.
Given bios-tables-test is heavy load on CI for x86 we have only few
test cases to check no pcihp (legacy), the same should be done for ARM.
Then on top add a few acpi hotplug tests to snapshot DSDT with
hotplug hierarchy built in.
ex: test_acpi_piix4_tcg_bridge or test_acpi_piix4_no_acpi_pci_hotplug.
>
> Thanks
>
> Eric
> >
> >> ---
> >>
> >> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
> >> ---
> >> tests/qtest/bios-tables-test.c | 13 +++++++++----
> >> 1 file changed, 9 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> >> index 0a333ec435..6379dba714 100644
> >> --- a/tests/qtest/bios-tables-test.c
> >> +++ b/tests/qtest/bios-tables-test.c
> >> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
> >> };
> >>
> >> data.variant = ".memhp";
> >> - test_acpi_one(" -machine nvdimm=on"
> >> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
> >> " -cpu cortex-a57"
> >> " -m 256M,slots=3,maxmem=1G"
> >> " -object memory-backend-ram,id=ram0,size=128M"
> >> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
> >> };
> >>
> >> data.variant = ".numamem";
> >> - test_acpi_one(" -cpu cortex-a57"
> >> + test_acpi_one(" -machine acpi-pcihp=off"
> >> + " -cpu cortex-a57"
> >> " -object memory-backend-ram,id=ram0,size=128M"
> >> " -numa node,memdev=ram0",
> >> &data);
> >> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
> >> * to solve the conflicts.
> >> */
> >> data.variant = ".pxb";
> >> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
> >> + test_acpi_one(" -machine acpi-pcihp=off"
> >> + " -device pcie-root-port,chassis=1,id=pci.1"
> >> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
> >> " -drive file="
> >> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
> >> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
> >>
> >> data.variant = ".acpihmatvirt";
> >>
> >> - test_acpi_one(" -machine hmat=on"
> >> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
> >> " -cpu cortex-a57"
> >> " -smp 4,sockets=2"
> >> " -m 384M"
> >> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
> >> data.smbios_cpu_max_speed = 2900;
> >> data.smbios_cpu_curr_speed = 2700;
> >> test_acpi_one("-cpu cortex-a57 "
> >> + "-machine acpi-pcihp=off "
> >> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
> >> free_test_data(&data);
> >> }
> >> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
> >> };
> >>
> >> test_acpi_one("-cpu cortex-a57 "
> >> + "-machine acpi-pcihp=off "
> >> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
> >> free_test_data(&data);
> >> }
> >> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
> >> };
> >>
> >> test_acpi_one("-cpu cortex-a57 "
> >> + "-machine acpi-pcihp=off "
> >> "-device virtio-iommu-pci", &data);
> >> free_test_data(&data);
> >> }
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-28 9:48 ` Eric Auger
2025-05-28 10:49 ` Igor Mammedov
@ 2025-06-02 6:16 ` Gustavo Romero
1 sibling, 0 replies; 121+ messages in thread
From: Gustavo Romero @ 2025-06-02 6:16 UTC (permalink / raw)
To: eric.auger, Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, anisinha,
mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Eric,
On 5/28/25 06:48, Eric Auger wrote:
> Hi Igor,
>
> On 5/28/25 11:38 AM, Igor Mammedov wrote:
>> On Tue, 27 May 2025 09:40:26 +0200
>> Eric Auger <eric.auger@redhat.com> wrote:
>>
>>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>>
>>> ACPI PCI hotplug is now turned on by default so we need to change the
>>> existing tests to keep it off. However, even setting the ACPI PCI
>>> hotplug off in the existing tests, there will be changes in the ACPI
>>> tables because the _OSC method was modified, hence in the next patch of
>>> this series the blobs are updated accordingly.
>>>
>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> it would be better to test whatever default we end up with.
>> (like x86)
>
> See my question on patch 2's comment. We intended to have tests for both
> modes (legacy and acpi pcihp). Gustavo added some new tests for the new
> default, namely acpi pcihp. Now I did not really understand your point
> about keeping legacy mode as a default.
I _think_ I understood what Igor is suggesting. In a separate series, that
I've kept in a github branch to not add noise here, I removed the test for
acpi-pcihp=on and just added one for acpi-pcihp=off after we adjust the blobs
for the _OSC change. I added the test before acpi-pcihp=on becomes the default,
since if everything is ok the native test must continue to work after acpi-pcihp=on
becomes the default, as Igor said.
Anyways, please see my last reply to Igor in this thread (for some reason
I can't find the reply either in qemu-devel@ or qemu-arm@)... I'm pasting
below the main part just in case (the branch and the overview for the tests
location in the series):
https://github.com/gromero/qemu/commits/v2_20250527_eric_auger_redhat_com/
3c302f7222 tests/qtest/bios-tables-test: Update DSDT blobs #1c (update blob) \
671f15f470 hw/arm/virt: Use ACPI PCI hotplug by default #1b (modify default) | acpi-pcihp=on
9468f730e1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table #1a (whitelist) /
c9ec0e0226 hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
dc44749a34 hw/arm/virt: Let virt support pci hotplug/unplug GED event
f667079260 hw/core/sysbus: Introduce sysbus_mmio_map_name() helper
46731e563b hw/acpi/ged: Support migration of AcpiPciHpState
4fa7b0e0f6 hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
587b001876 hw/acpi/ged: Prepare the device to react to PCI hotplug events
b55183d128 hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
fe4c96b384 hw/i386/acpi-build: Move aml_pci_edsm to a generic place
010c50dbc7 hw/i386/acpi-build: Introduce and use acpi_get_pci_host
5a1be727e6 hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
14a172e192 hw/i386/acpi-build: Move build_append_notification_callback to pcihp
5110ae8874 hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
82c2aef672 hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
6372fe7eef qtest/bios-tables-test: Update DSDT 'noacpipcihp' variant blob #2 (blob update for test), part 2 of 2 (update blob) ] New PCIe native test
6fb29ba18d tests/qtest/bios-tables-test: Add aarch64 PCIe native hotplug test #2 (pcie native hp test), part 1 of 2 (whitelist) /
12c63a505e tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Patch 10/25 in this series (update blob) \
779bd47749 hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Patch 9/25 in this series (modify default) | _OSC change
f260fd59c1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Patch 8/25 in this series (whitelist) /
b000677fd9 hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
a72f87b634 hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
77a87b6ba3 hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
67e4dc2e7b hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
b89e69da54 hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
74f1080a74 hw/arm/virt: Introduce machine state acpi pcihp flags and props
1048082f33 hw/i386/acpi-build: Make aml_pci_device_dsm() static
Feel free to cherry-pick the tests and adjust them as you did before.
I'll be off this week returning on June 9.
Cheers,
Gustavo
> Thanks
>
> Eric
>>
>>> ---
>>>
>>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
>>> ---
>>> tests/qtest/bios-tables-test.c | 13 +++++++++----
>>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
>>> index 0a333ec435..6379dba714 100644
>>> --- a/tests/qtest/bios-tables-test.c
>>> +++ b/tests/qtest/bios-tables-test.c
>>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>>> };
>>>
>>> data.variant = ".memhp";
>>> - test_acpi_one(" -machine nvdimm=on"
>>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
>>> " -cpu cortex-a57"
>>> " -m 256M,slots=3,maxmem=1G"
>>> " -object memory-backend-ram,id=ram0,size=128M"
>>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
>>> };
>>>
>>> data.variant = ".numamem";
>>> - test_acpi_one(" -cpu cortex-a57"
>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>> + " -cpu cortex-a57"
>>> " -object memory-backend-ram,id=ram0,size=128M"
>>> " -numa node,memdev=ram0",
>>> &data);
>>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
>>> * to solve the conflicts.
>>> */
>>> data.variant = ".pxb";
>>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>> + " -device pcie-root-port,chassis=1,id=pci.1"
>>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
>>> " -drive file="
>>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
>>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
>>>
>>> data.variant = ".acpihmatvirt";
>>>
>>> - test_acpi_one(" -machine hmat=on"
>>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
>>> " -cpu cortex-a57"
>>> " -smp 4,sockets=2"
>>> " -m 384M"
>>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
>>> data.smbios_cpu_max_speed = 2900;
>>> data.smbios_cpu_curr_speed = 2700;
>>> test_acpi_one("-cpu cortex-a57 "
>>> + "-machine acpi-pcihp=off "
>>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
>>> free_test_data(&data);
>>> }
>>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
>>> };
>>>
>>> test_acpi_one("-cpu cortex-a57 "
>>> + "-machine acpi-pcihp=off "
>>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
>>> free_test_data(&data);
>>> }
>>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
>>> };
>>>
>>> test_acpi_one("-cpu cortex-a57 "
>>> + "-machine acpi-pcihp=off "
>>> "-device virtio-iommu-pci", &data);
>>> free_test_data(&data);
>>> }
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-28 9:38 ` Igor Mammedov
2025-05-28 9:48 ` Eric Auger
@ 2025-05-28 12:41 ` Gustavo Romero
2025-05-28 13:02 ` Igor Mammedov
1 sibling, 1 reply; 121+ messages in thread
From: Gustavo Romero @ 2025-05-28 12:41 UTC (permalink / raw)
To: Igor Mammedov, Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, anisinha,
mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Igor,
On 5/28/25 06:38, Igor Mammedov wrote:
> On Tue, 27 May 2025 09:40:26 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>
>> ACPI PCI hotplug is now turned on by default so we need to change the
>> existing tests to keep it off. However, even setting the ACPI PCI
>> hotplug off in the existing tests, there will be changes in the ACPI
>> tables because the _OSC method was modified, hence in the next patch of
>> this series the blobs are updated accordingly.
>>
>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> it would be better to test whatever default we end up with.
> (like x86)
hmm maybe there is a confusion here, Igor. We are actually planning what you
said. This patch and the other two in this series related to the bios-tables-test
(i.e., patches 8/25 and 10/25) are for actually making the current (legacy) test pass,
since the new default as per this series will be acpi-pcihp=on. That's why here we're
adapting the current test here to have acpi-pcihp=off.
The new test that will test for acpi-pcihp=on (the new default) is not in this series
and we decided to merge it separate. It's in the patch 4/5 and 5/5 of the follow series:
https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
Cheers,
Gustavo
>>
>> ---
>>
>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
>> ---
>> tests/qtest/bios-tables-test.c | 13 +++++++++----
>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>
>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
>> index 0a333ec435..6379dba714 100644
>> --- a/tests/qtest/bios-tables-test.c
>> +++ b/tests/qtest/bios-tables-test.c
>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>> };
>>
>> data.variant = ".memhp";
>> - test_acpi_one(" -machine nvdimm=on"
>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
>> " -cpu cortex-a57"
>> " -m 256M,slots=3,maxmem=1G"
>> " -object memory-backend-ram,id=ram0,size=128M"
>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
>> };
>>
>> data.variant = ".numamem";
>> - test_acpi_one(" -cpu cortex-a57"
>> + test_acpi_one(" -machine acpi-pcihp=off"
>> + " -cpu cortex-a57"
>> " -object memory-backend-ram,id=ram0,size=128M"
>> " -numa node,memdev=ram0",
>> &data);
>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
>> * to solve the conflicts.
>> */
>> data.variant = ".pxb";
>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
>> + test_acpi_one(" -machine acpi-pcihp=off"
>> + " -device pcie-root-port,chassis=1,id=pci.1"
>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
>> " -drive file="
>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
>>
>> data.variant = ".acpihmatvirt";
>>
>> - test_acpi_one(" -machine hmat=on"
>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
>> " -cpu cortex-a57"
>> " -smp 4,sockets=2"
>> " -m 384M"
>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
>> data.smbios_cpu_max_speed = 2900;
>> data.smbios_cpu_curr_speed = 2700;
>> test_acpi_one("-cpu cortex-a57 "
>> + "-machine acpi-pcihp=off "
>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
>> free_test_data(&data);
>> }
>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
>> };
>>
>> test_acpi_one("-cpu cortex-a57 "
>> + "-machine acpi-pcihp=off "
>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
>> free_test_data(&data);
>> }
>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
>> };
>>
>> test_acpi_one("-cpu cortex-a57 "
>> + "-machine acpi-pcihp=off "
>> "-device virtio-iommu-pci", &data);
>> free_test_data(&data);
>> }
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-28 12:41 ` Gustavo Romero
@ 2025-05-28 13:02 ` Igor Mammedov
2025-05-28 15:04 ` Gustavo Romero
0 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-05-28 13:02 UTC (permalink / raw)
To: Gustavo Romero
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
anisinha, mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
On Wed, 28 May 2025 09:41:15 -0300
Gustavo Romero <gustavo.romero@linaro.org> wrote:
> Hi Igor,
>
> On 5/28/25 06:38, Igor Mammedov wrote:
> > On Tue, 27 May 2025 09:40:26 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> >> From: Gustavo Romero <gustavo.romero@linaro.org>
> >>
> >> ACPI PCI hotplug is now turned on by default so we need to change the
> >> existing tests to keep it off. However, even setting the ACPI PCI
> >> hotplug off in the existing tests, there will be changes in the ACPI
> >> tables because the _OSC method was modified, hence in the next patch of
> >> this series the blobs are updated accordingly.
> >>
> >> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> >> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >
> > it would be better to test whatever default we end up with.
> > (like x86)
>
> hmm maybe there is a confusion here, Igor. We are actually planning what you
perhaps, see my reply to Eric about my expectations wrt tests.
(i.e. default tests shouldn't have any explicit CLI options,
instead it should follow whitelist blobs/set new default patch/update blobs pattern)
> said. This patch and the other two in this series related to the bios-tables-test
> (i.e., patches 8/25 and 10/25) are for actually making the current (legacy) test pass,
> since the new default as per this series will be acpi-pcihp=on. That's why here we're
> adapting the current test here to have acpi-pcihp=off.
>
> The new test that will test for acpi-pcihp=on (the new default) is not in this series
> and we decided to merge it separate. It's in the patch 4/5 and 5/5 of the follow series:
>
> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>
>
> Cheers,
> Gustavo
>
> >>
> >> ---
> >>
> >> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
> >> ---
> >> tests/qtest/bios-tables-test.c | 13 +++++++++----
> >> 1 file changed, 9 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> >> index 0a333ec435..6379dba714 100644
> >> --- a/tests/qtest/bios-tables-test.c
> >> +++ b/tests/qtest/bios-tables-test.c
> >> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
> >> };
> >>
> >> data.variant = ".memhp";
> >> - test_acpi_one(" -machine nvdimm=on"
> >> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
> >> " -cpu cortex-a57"
> >> " -m 256M,slots=3,maxmem=1G"
> >> " -object memory-backend-ram,id=ram0,size=128M"
> >> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
> >> };
> >>
> >> data.variant = ".numamem";
> >> - test_acpi_one(" -cpu cortex-a57"
> >> + test_acpi_one(" -machine acpi-pcihp=off"
> >> + " -cpu cortex-a57"
> >> " -object memory-backend-ram,id=ram0,size=128M"
> >> " -numa node,memdev=ram0",
> >> &data);
> >> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
> >> * to solve the conflicts.
> >> */
> >> data.variant = ".pxb";
> >> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
> >> + test_acpi_one(" -machine acpi-pcihp=off"
> >> + " -device pcie-root-port,chassis=1,id=pci.1"
> >> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
> >> " -drive file="
> >> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
> >> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
> >>
> >> data.variant = ".acpihmatvirt";
> >>
> >> - test_acpi_one(" -machine hmat=on"
> >> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
> >> " -cpu cortex-a57"
> >> " -smp 4,sockets=2"
> >> " -m 384M"
> >> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
> >> data.smbios_cpu_max_speed = 2900;
> >> data.smbios_cpu_curr_speed = 2700;
> >> test_acpi_one("-cpu cortex-a57 "
> >> + "-machine acpi-pcihp=off "
> >> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
> >> free_test_data(&data);
> >> }
> >> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
> >> };
> >>
> >> test_acpi_one("-cpu cortex-a57 "
> >> + "-machine acpi-pcihp=off "
> >> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
> >> free_test_data(&data);
> >> }
> >> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
> >> };
> >>
> >> test_acpi_one("-cpu cortex-a57 "
> >> + "-machine acpi-pcihp=off "
> >> "-device virtio-iommu-pci", &data);
> >> free_test_data(&data);
> >> }
> >
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-28 13:02 ` Igor Mammedov
@ 2025-05-28 15:04 ` Gustavo Romero
2025-05-30 11:51 ` Igor Mammedov
0 siblings, 1 reply; 121+ messages in thread
From: Gustavo Romero @ 2025-05-28 15:04 UTC (permalink / raw)
To: Igor Mammedov
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
anisinha, mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Igor,
On 5/28/25 10:02, Igor Mammedov wrote:
> On Wed, 28 May 2025 09:41:15 -0300
> Gustavo Romero <gustavo.romero@linaro.org> wrote:
>
>> Hi Igor,
>>
>> On 5/28/25 06:38, Igor Mammedov wrote:
>>> On Tue, 27 May 2025 09:40:26 +0200
>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>>>
>>>> ACPI PCI hotplug is now turned on by default so we need to change the
>>>> existing tests to keep it off. However, even setting the ACPI PCI
>>>> hotplug off in the existing tests, there will be changes in the ACPI
>>>> tables because the _OSC method was modified, hence in the next patch of
>>>> this series the blobs are updated accordingly.
>>>>
>>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>
>>> it would be better to test whatever default we end up with.
>>> (like x86)
>>
>> hmm maybe there is a confusion here, Igor. We are actually planning what you
>
> perhaps, see my reply to Eric about my expectations wrt tests.
Yip, I read it before my reply here.
> (i.e. default tests shouldn't have any explicit CLI options,
> instead it should follow whitelist blobs/set new default patch/update blobs pattern)
I see. I agree with that. But this patch is not about the new test. The new test is
_not_ in this series. Patches 8/25, 10/25, and 24/25 are _not_ about the new test but
about adapting the _legacy tests_ (native acpi) to the situation when ACPI HP becomes
the default, because this series makes acpi-pcihp=on the default, hence the CLI option
"acpi-pcihp=off" added to them. An update to the blobs are also necessary because of the
change in _OSC method, even when acpi-pcihp=off.
>> said. This patch and the other two in this series related to the bios-tables-test
>> (i.e., patches 8/25 and 10/25) are for actually making the current (legacy) test pass,
>> since the new default as per this series will be acpi-pcihp=on. That's why here we're
>> adapting the current test here to have acpi-pcihp=off.
>>
>> The new test that will test for acpi-pcihp=on (the new default) is not in this series
>> and we decided to merge it separate. It's in the patch 4/5 and 5/5 of the follow series:
We're doing the "blobs/set new default patch/update blobs pattern" in the new test, which
we can merge later, once this series is merged, no? The step "set new default" then will
not be necessary because the new test will be merged separate, after this series, so when
acpi-pcihp=on is already the default.
Please note that although we're using acpi-pcihp=on in the new test, it's not necessary,
we can dropped this option, making it implicit as you say, and it will work. This is the
new test:
>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
Thus, there are to "acts" of modifying the bios-tables-test:
1) Adapt the current tests to when acpi-pcihp=on becomes the default (hence the addition
to them of "acpi-pcihp=off". There is also the need to update the blobs, but it's because
of the _OSC method change in DSDT table, which will change anyways, even with "acpi-pcihp=off¨,
hence the need for patch 10/25 in this series. This is _done is this series_.
2) Add a new test for testing the default (i.e. acpi-pcihp-on). It follows what you're
saying above: "follow whitelist blobs/set new default patch/update blobs pattern",
because we can drop the acpi-pcihp-on option from the CLI in this test without any
prejudice to test. While the step "set new default patch" was actually done in 1).
Cheers,
Gustavo
>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>>
>>
>> Cheers,
>> Gustavo
>>
>>>>
>>>> ---
>>>>
>>>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
>>>> ---
>>>> tests/qtest/bios-tables-test.c | 13 +++++++++----
>>>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
>>>> index 0a333ec435..6379dba714 100644
>>>> --- a/tests/qtest/bios-tables-test.c
>>>> +++ b/tests/qtest/bios-tables-test.c
>>>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>>>> };
>>>>
>>>> data.variant = ".memhp";
>>>> - test_acpi_one(" -machine nvdimm=on"
>>>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
>>>> " -cpu cortex-a57"
>>>> " -m 256M,slots=3,maxmem=1G"
>>>> " -object memory-backend-ram,id=ram0,size=128M"
>>>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
>>>> };
>>>>
>>>> data.variant = ".numamem";
>>>> - test_acpi_one(" -cpu cortex-a57"
>>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>>> + " -cpu cortex-a57"
>>>> " -object memory-backend-ram,id=ram0,size=128M"
>>>> " -numa node,memdev=ram0",
>>>> &data);
>>>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
>>>> * to solve the conflicts.
>>>> */
>>>> data.variant = ".pxb";
>>>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
>>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>>> + " -device pcie-root-port,chassis=1,id=pci.1"
>>>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
>>>> " -drive file="
>>>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
>>>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
>>>>
>>>> data.variant = ".acpihmatvirt";
>>>>
>>>> - test_acpi_one(" -machine hmat=on"
>>>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
>>>> " -cpu cortex-a57"
>>>> " -smp 4,sockets=2"
>>>> " -m 384M"
>>>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
>>>> data.smbios_cpu_max_speed = 2900;
>>>> data.smbios_cpu_curr_speed = 2700;
>>>> test_acpi_one("-cpu cortex-a57 "
>>>> + "-machine acpi-pcihp=off "
>>>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
>>>> free_test_data(&data);
>>>> }
>>>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
>>>> };
>>>>
>>>> test_acpi_one("-cpu cortex-a57 "
>>>> + "-machine acpi-pcihp=off "
>>>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
>>>> free_test_data(&data);
>>>> }
>>>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
>>>> };
>>>>
>>>> test_acpi_one("-cpu cortex-a57 "
>>>> + "-machine acpi-pcihp=off "
>>>> "-device virtio-iommu-pci", &data);
>>>> free_test_data(&data);
>>>> }
>>>
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-28 15:04 ` Gustavo Romero
@ 2025-05-30 11:51 ` Igor Mammedov
2025-06-02 5:35 ` Gustavo Romero
2025-06-02 6:06 ` Gustavo Romero
0 siblings, 2 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-05-30 11:51 UTC (permalink / raw)
To: Gustavo Romero
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
anisinha, mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
On Wed, 28 May 2025 12:04:26 -0300
Gustavo Romero <gustavo.romero@linaro.org> wrote:
> Hi Igor,
>
> On 5/28/25 10:02, Igor Mammedov wrote:
> > On Wed, 28 May 2025 09:41:15 -0300
> > Gustavo Romero <gustavo.romero@linaro.org> wrote:
> >
> >> Hi Igor,
> >>
> >> On 5/28/25 06:38, Igor Mammedov wrote:
> >>> On Tue, 27 May 2025 09:40:26 +0200
> >>> Eric Auger <eric.auger@redhat.com> wrote:
> >>>
> >>>> From: Gustavo Romero <gustavo.romero@linaro.org>
> >>>>
> >>>> ACPI PCI hotplug is now turned on by default so we need to change the
> >>>> existing tests to keep it off. However, even setting the ACPI PCI
> >>>> hotplug off in the existing tests, there will be changes in the ACPI
> >>>> tables because the _OSC method was modified, hence in the next patch of
> >>>> this series the blobs are updated accordingly.
> >>>>
> >>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> >>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >>>
> >>> it would be better to test whatever default we end up with.
> >>> (like x86)
> >>
> >> hmm maybe there is a confusion here, Igor. We are actually planning what you
> >
> > perhaps, see my reply to Eric about my expectations wrt tests.
>
> Yip, I read it before my reply here.
>
>
> > (i.e. default tests shouldn't have any explicit CLI options,
> > instead it should follow whitelist blobs/set new default patch/update blobs pattern)
>
> I see. I agree with that. But this patch is not about the new test. The new test is
> _not_ in this series. Patches 8/25, 10/25, and 24/25 are _not_ about the new test but
> about adapting the _legacy tests_ (native acpi) to the situation when ACPI HP becomes
> the default, because this series makes acpi-pcihp=on the default, hence the CLI option
> "acpi-pcihp=off" added to them. An update to the blobs are also necessary because of the
> change in _OSC method, even when acpi-pcihp=off.
>
>
> >> said. This patch and the other two in this series related to the bios-tables-test
> >> (i.e., patches 8/25 and 10/25) are for actually making the current (legacy) test pass,
> >> since the new default as per this series will be acpi-pcihp=on. That's why here we're
> >> adapting the current test here to have acpi-pcihp=off.
> >>
> >> The new test that will test for acpi-pcihp=on (the new default) is not in this series
> >> and we decided to merge it separate. It's in the patch 4/5 and 5/5 of the follow series:
>
> We're doing the "blobs/set new default patch/update blobs pattern" in the new test, which
> we can merge later, once this series is merged, no? The step "set new default" then will
> not be necessary because the new test will be merged separate, after this series, so when
> acpi-pcihp=on is already the default.
>
> Please note that although we're using acpi-pcihp=on in the new test, it's not necessary,
> we can dropped this option, making it implicit as you say, and it will work. This is the
> new test:
>
> >> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
> >> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>
>
> Thus, there are to "acts" of modifying the bios-tables-test:
>
> 1) Adapt the current tests to when acpi-pcihp=on becomes the default (hence the addition
> to them of "acpi-pcihp=off".
that's what I disagree with.
1) Instead adapting majority of tests to legacy before switching defaults,
just do whitelist/modify default/update so all of tests run with new default.
and then
> There is also the need to update the blobs, but it's because
> of the _OSC method change in DSDT table, which will change anyways, even with "acpi-pcihp=off¨,
> hence the need for patch 10/25 in this series. This is _done is this series_.
> 2) Add a new test for testing the default (i.e. acpi-pcihp-on). It follows what you're
> saying above: "follow whitelist blobs/set new default patch/update blobs pattern",
> because we can drop the acpi-pcihp-on option from the CLI in this test without any
> prejudice to test. While the step "set new default patch" was actually done in 1).
2) add a separate test case for native pcie hoplug (preferably within this series)
3) even better would be to add #2 before #1 (right after 10/25),
this way will guarantee that old native hotplug tables stay
the same regardless of followup patches that add ACPI pcihp aml.
> Cheers,
> Gustavo
>
> >> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
> >> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
> >>
> >>
> >> Cheers,
> >> Gustavo
> >>
> >>>>
> >>>> ---
> >>>>
> >>>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
> >>>> ---
> >>>> tests/qtest/bios-tables-test.c | 13 +++++++++----
> >>>> 1 file changed, 9 insertions(+), 4 deletions(-)
> >>>>
> >>>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> >>>> index 0a333ec435..6379dba714 100644
> >>>> --- a/tests/qtest/bios-tables-test.c
> >>>> +++ b/tests/qtest/bios-tables-test.c
> >>>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
> >>>> };
> >>>>
> >>>> data.variant = ".memhp";
> >>>> - test_acpi_one(" -machine nvdimm=on"
> >>>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
> >>>> " -cpu cortex-a57"
> >>>> " -m 256M,slots=3,maxmem=1G"
> >>>> " -object memory-backend-ram,id=ram0,size=128M"
> >>>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
> >>>> };
> >>>>
> >>>> data.variant = ".numamem";
> >>>> - test_acpi_one(" -cpu cortex-a57"
> >>>> + test_acpi_one(" -machine acpi-pcihp=off"
> >>>> + " -cpu cortex-a57"
> >>>> " -object memory-backend-ram,id=ram0,size=128M"
> >>>> " -numa node,memdev=ram0",
> >>>> &data);
> >>>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
> >>>> * to solve the conflicts.
> >>>> */
> >>>> data.variant = ".pxb";
> >>>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
> >>>> + test_acpi_one(" -machine acpi-pcihp=off"
> >>>> + " -device pcie-root-port,chassis=1,id=pci.1"
> >>>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
> >>>> " -drive file="
> >>>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
> >>>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
> >>>>
> >>>> data.variant = ".acpihmatvirt";
> >>>>
> >>>> - test_acpi_one(" -machine hmat=on"
> >>>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
> >>>> " -cpu cortex-a57"
> >>>> " -smp 4,sockets=2"
> >>>> " -m 384M"
> >>>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
> >>>> data.smbios_cpu_max_speed = 2900;
> >>>> data.smbios_cpu_curr_speed = 2700;
> >>>> test_acpi_one("-cpu cortex-a57 "
> >>>> + "-machine acpi-pcihp=off "
> >>>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
> >>>> free_test_data(&data);
> >>>> }
> >>>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
> >>>> };
> >>>>
> >>>> test_acpi_one("-cpu cortex-a57 "
> >>>> + "-machine acpi-pcihp=off "
> >>>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
> >>>> free_test_data(&data);
> >>>> }
> >>>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
> >>>> };
> >>>>
> >>>> test_acpi_one("-cpu cortex-a57 "
> >>>> + "-machine acpi-pcihp=off "
> >>>> "-device virtio-iommu-pci", &data);
> >>>> free_test_data(&data);
> >>>> }
> >>>
> >>
> >
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-30 11:51 ` Igor Mammedov
@ 2025-06-02 5:35 ` Gustavo Romero
2025-06-02 6:06 ` Gustavo Romero
1 sibling, 0 replies; 121+ messages in thread
From: Gustavo Romero @ 2025-06-02 5:35 UTC (permalink / raw)
To: Igor Mammedov
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
anisinha, mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Igor and Eric,
On 5/30/25 08:51, Igor Mammedov wrote:
> On Wed, 28 May 2025 12:04:26 -0300
> Gustavo Romero <gustavo.romero@linaro.org> wrote:
>
>> Hi Igor,
>>
>> On 5/28/25 10:02, Igor Mammedov wrote:
>>> On Wed, 28 May 2025 09:41:15 -0300
>>> Gustavo Romero <gustavo.romero@linaro.org> wrote:
>>>
>>>> Hi Igor,
>>>>
>>>> On 5/28/25 06:38, Igor Mammedov wrote:
>>>>> On Tue, 27 May 2025 09:40:26 +0200
>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>
>>>>>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>>
>>>>>> ACPI PCI hotplug is now turned on by default so we need to change the
>>>>>> existing tests to keep it off. However, even setting the ACPI PCI
>>>>>> hotplug off in the existing tests, there will be changes in the ACPI
>>>>>> tables because the _OSC method was modified, hence in the next patch of
>>>>>> this series the blobs are updated accordingly.
>>>>>>
>>>>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>
>>>>> it would be better to test whatever default we end up with.
>>>>> (like x86)
>>>>
>>>> hmm maybe there is a confusion here, Igor. We are actually planning what you
>>>
>>> perhaps, see my reply to Eric about my expectations wrt tests.
>>
>> Yip, I read it before my reply here.
>>
>>
>>> (i.e. default tests shouldn't have any explicit CLI options,
>>> instead it should follow whitelist blobs/set new default patch/update blobs pattern)
>>
>> I see. I agree with that. But this patch is not about the new test. The new test is
>> _not_ in this series. Patches 8/25, 10/25, and 24/25 are _not_ about the new test but
>> about adapting the _legacy tests_ (native acpi) to the situation when ACPI HP becomes
>> the default, because this series makes acpi-pcihp=on the default, hence the CLI option
>> "acpi-pcihp=off" added to them. An update to the blobs are also necessary because of the
>> change in _OSC method, even when acpi-pcihp=off.
>>
>>
>>>> said. This patch and the other two in this series related to the bios-tables-test
>>>> (i.e., patches 8/25 and 10/25) are for actually making the current (legacy) test pass,
>>>> since the new default as per this series will be acpi-pcihp=on. That's why here we're
>>>> adapting the current test here to have acpi-pcihp=off.
>>>>
>>>> The new test that will test for acpi-pcihp=on (the new default) is not in this series
>>>> and we decided to merge it separate. It's in the patch 4/5 and 5/5 of the follow series:
>>
>> We're doing the "blobs/set new default patch/update blobs pattern" in the new test, which
>> we can merge later, once this series is merged, no? The step "set new default" then will
>> not be necessary because the new test will be merged separate, after this series, so when
>> acpi-pcihp=on is already the default.
>>
>> Please note that although we're using acpi-pcihp=on in the new test, it's not necessary,
>> we can dropped this option, making it implicit as you say, and it will work. This is the
>> new test:
>>
>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>>
>>
>> Thus, there are to "acts" of modifying the bios-tables-test:
>>
>> 1) Adapt the current tests to when acpi-pcihp=on becomes the default (hence the addition
>> to them of "acpi-pcihp=off".
>
>
> that's what I disagree with.
>
> 1) Instead adapting majority of tests to legacy before switching defaults,
> just do whitelist/modify default/update so all of tests run with new default.
>
> and then
>
>> There is also the need to update the blobs, but it's because
>> of the _OSC method change in DSDT table, which will change anyways, even with "acpi-pcihp=off¨,
>> hence the need for patch 10/25 in this series. This is _done is this series_.
>
>
>
>> 2) Add a new test for testing the default (i.e. acpi-pcihp-on). It follows what you're
>> saying above: "follow whitelist blobs/set new default patch/update blobs pattern",
>> because we can drop the acpi-pcihp-on option from the CLI in this test without any
>> prejudice to test. While the step "set new default patch" was actually done in 1).
>
> 2) add a separate test case for native pcie hoplug (preferably within this series)
>
> 3) even better would be to add #2 before #1 (right after 10/25),
> this way will guarantee that old native hotplug tables stay
> the same regardless of followup patches that add ACPI pcihp aml.
Got it now, hopefully... :)
OK, I'm trying to follow what you recommended in 3). I've pushed a series to:
https://github.com/gromero/qemu/commits/v2_20250527_eric_auger_redhat_com/
So, I understand we will need to add/update the blobs at three times,
2 times because of the changes in the DSDT generation (_OSC changes and when
acpi-pci=on) and an additional one because of the new PCIe native hotplug test.
I dropped this patch (Patch 24/25) from the series.
So the overview of the organization would be the following:
3c302f7222 tests/qtest/bios-tables-test: Update DSDT blobs #1c (update blob) \
671f15f470 hw/arm/virt: Use ACPI PCI hotplug by default #1b (modify default) |--- acpi-pcihp=on
9468f730e1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table #1a (whitelist) /
c9ec0e0226 hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
dc44749a34 hw/arm/virt: Let virt support pci hotplug/unplug GED event
f667079260 hw/core/sysbus: Introduce sysbus_mmio_map_name() helper
46731e563b hw/acpi/ged: Support migration of AcpiPciHpState
4fa7b0e0f6 hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
587b001876 hw/acpi/ged: Prepare the device to react to PCI hotplug events
b55183d128 hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
fe4c96b384 hw/i386/acpi-build: Move aml_pci_edsm to a generic place
010c50dbc7 hw/i386/acpi-build: Introduce and use acpi_get_pci_host
5a1be727e6 hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
14a172e192 hw/i386/acpi-build: Move build_append_notification_callback to pcihp
5110ae8874 hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
82c2aef672 hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
6372fe7eef qtest/bios-tables-test: Update DSDT 'noacpipcihp' variant blob #2 (blob update for test), part 2 of 2 (update blob) ]--- New PCIe native test
6fb29ba18d tests/qtest/bios-tables-test: Add aarch64 PCIe native hotplug test #2 (pcie native hp test), part 1 of 2 (whitelist) /
12c63a505e tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Patch 10/25 in this series (update blob) \
779bd47749 hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Patch 9/25 in this series (modify default) |--- _OSC change
f260fd59c1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Patch 8/25 in this series (whitelist) /
b000677fd9 hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
a72f87b634 hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
77a87b6ba3 hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
67e4dc2e7b hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
b89e69da54 hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
74f1080a74 hw/arm/virt: Introduce machine state acpi pcihp flags and props
1048082f33 hw/i386/acpi-build: Make aml_pci_device_dsm() static
See notes on the right for when the blobs are updated or added in the
series. The new test for PCIe native hotplug (I prefer not calling it legacy,
since it's not really legacy; it's just an alternative better in some scenarios,
specially in virtualization) is now in the series (#2), "right after 10/25".
Is something like that that you want?
Cheers,
Gustavo
>
>> Cheers,
>> Gustavo
>>
>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>>>>
>>>>
>>>> Cheers,
>>>> Gustavo
>>>>
>>>>>>
>>>>>> ---
>>>>>>
>>>>>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
>>>>>> ---
>>>>>> tests/qtest/bios-tables-test.c | 13 +++++++++----
>>>>>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>>>>>
>>>>>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
>>>>>> index 0a333ec435..6379dba714 100644
>>>>>> --- a/tests/qtest/bios-tables-test.c
>>>>>> +++ b/tests/qtest/bios-tables-test.c
>>>>>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>>>>>> };
>>>>>>
>>>>>> data.variant = ".memhp";
>>>>>> - test_acpi_one(" -machine nvdimm=on"
>>>>>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
>>>>>> " -cpu cortex-a57"
>>>>>> " -m 256M,slots=3,maxmem=1G"
>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
>>>>>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
>>>>>> };
>>>>>>
>>>>>> data.variant = ".numamem";
>>>>>> - test_acpi_one(" -cpu cortex-a57"
>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>>>>> + " -cpu cortex-a57"
>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
>>>>>> " -numa node,memdev=ram0",
>>>>>> &data);
>>>>>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
>>>>>> * to solve the conflicts.
>>>>>> */
>>>>>> data.variant = ".pxb";
>>>>>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>>>>> + " -device pcie-root-port,chassis=1,id=pci.1"
>>>>>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
>>>>>> " -drive file="
>>>>>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
>>>>>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
>>>>>>
>>>>>> data.variant = ".acpihmatvirt";
>>>>>>
>>>>>> - test_acpi_one(" -machine hmat=on"
>>>>>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
>>>>>> " -cpu cortex-a57"
>>>>>> " -smp 4,sockets=2"
>>>>>> " -m 384M"
>>>>>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
>>>>>> data.smbios_cpu_max_speed = 2900;
>>>>>> data.smbios_cpu_curr_speed = 2700;
>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>> + "-machine acpi-pcihp=off "
>>>>>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
>>>>>> free_test_data(&data);
>>>>>> }
>>>>>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
>>>>>> };
>>>>>>
>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>> + "-machine acpi-pcihp=off "
>>>>>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
>>>>>> free_test_data(&data);
>>>>>> }
>>>>>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
>>>>>> };
>>>>>>
>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>> + "-machine acpi-pcihp=off "
>>>>>> "-device virtio-iommu-pci", &data);
>>>>>> free_test_data(&data);
>>>>>> }
>>>>>
>>>>
>>>
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-05-30 11:51 ` Igor Mammedov
2025-06-02 5:35 ` Gustavo Romero
@ 2025-06-02 6:06 ` Gustavo Romero
2025-06-10 14:29 ` Gustavo Romero
1 sibling, 1 reply; 121+ messages in thread
From: Gustavo Romero @ 2025-06-02 6:06 UTC (permalink / raw)
To: Igor Mammedov
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
anisinha, mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Igor and Eric,
I'm sending again this to the mailing list since it seems the first one
got lost... I can't find it either in qemu-devel@ or in qemu-arm@ :(
On 5/30/25 08:51, Igor Mammedov wrote:
> On Wed, 28 May 2025 12:04:26 -0300
> Gustavo Romero <gustavo.romero@linaro.org> wrote:
>
>> Hi Igor,
>>
>> On 5/28/25 10:02, Igor Mammedov wrote:
>>> On Wed, 28 May 2025 09:41:15 -0300
>>> Gustavo Romero <gustavo.romero@linaro.org> wrote:
>>>
>>>> Hi Igor,
>>>>
>>>> On 5/28/25 06:38, Igor Mammedov wrote:
>>>>> On Tue, 27 May 2025 09:40:26 +0200
>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>
>>>>>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>>
>>>>>> ACPI PCI hotplug is now turned on by default so we need to change the
>>>>>> existing tests to keep it off. However, even setting the ACPI PCI
>>>>>> hotplug off in the existing tests, there will be changes in the ACPI
>>>>>> tables because the _OSC method was modified, hence in the next patch of
>>>>>> this series the blobs are updated accordingly.
>>>>>>
>>>>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>
>>>>> it would be better to test whatever default we end up with.
>>>>> (like x86)
>>>>
>>>> hmm maybe there is a confusion here, Igor. We are actually planning what you
>>>
>>> perhaps, see my reply to Eric about my expectations wrt tests.
>>
>> Yip, I read it before my reply here.
>>
>>
>>> (i.e. default tests shouldn't have any explicit CLI options,
>>> instead it should follow whitelist blobs/set new default patch/update blobs pattern)
>>
>> I see. I agree with that. But this patch is not about the new test. The new test is
>> _not_ in this series. Patches 8/25, 10/25, and 24/25 are _not_ about the new test but
>> about adapting the _legacy tests_ (native acpi) to the situation when ACPI HP becomes
>> the default, because this series makes acpi-pcihp=on the default, hence the CLI option
>> "acpi-pcihp=off" added to them. An update to the blobs are also necessary because of the
>> change in _OSC method, even when acpi-pcihp=off.
>>
>>
>>>> said. This patch and the other two in this series related to the bios-tables-test
>>>> (i.e., patches 8/25 and 10/25) are for actually making the current (legacy) test pass,
>>>> since the new default as per this series will be acpi-pcihp=on. That's why here we're
>>>> adapting the current test here to have acpi-pcihp=off.
>>>>
>>>> The new test that will test for acpi-pcihp=on (the new default) is not in this series
>>>> and we decided to merge it separate. It's in the patch 4/5 and 5/5 of the follow series:
>>
>> We're doing the "blobs/set new default patch/update blobs pattern" in the new test, which
>> we can merge later, once this series is merged, no? The step "set new default" then will
>> not be necessary because the new test will be merged separate, after this series, so when
>> acpi-pcihp=on is already the default.
>>
>> Please note that although we're using acpi-pcihp=on in the new test, it's not necessary,
>> we can dropped this option, making it implicit as you say, and it will work. This is the
>> new test:
>>
>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>>
>>
>> Thus, there are to "acts" of modifying the bios-tables-test:
>>
>> 1) Adapt the current tests to when acpi-pcihp=on becomes the default (hence the addition
>> to them of "acpi-pcihp=off".
>
>
> that's what I disagree with.
>
> 1) Instead adapting majority of tests to legacy before switching defaults,
> just do whitelist/modify default/update so all of tests run with new default.
>
> and then
>
>> There is also the need to update the blobs, but it's because
>> of the _OSC method change in DSDT table, which will change anyways, even with "acpi-pcihp=off¨,
>> hence the need for patch 10/25 in this series. This is _done is this series_.
>
>
>
>> 2) Add a new test for testing the default (i.e. acpi-pcihp-on). It follows what you're
>> saying above: "follow whitelist blobs/set new default patch/update blobs pattern",
>> because we can drop the acpi-pcihp-on option from the CLI in this test without any
>> prejudice to test. While the step "set new default patch" was actually done in 1).
>
> 2) add a separate test case for native pcie hoplug (preferably within this series)
>
> 3) even better would be to add #2 before #1 (right after 10/25),
> this way will guarantee that old native hotplug tables stay
> the same regardless of followup patches that add ACPI pcihp aml.
Got it now, hopefully... 🙂
OK, I'm trying to follow what you recommended in 3). I've pushed a series to:
https://github.com/gromero/qemu/commits/v2_20250527_eric_auger_redhat_com/
So, I understand we will need to add/update the blobs at three times,
2 times because of the changes in the DSDT generation (_OSC changes and when
acpi-pci=on) and an additional one because of the new PCIe native hotplug test.
I dropped this patch (Patch 24/25) from the series.
So the overview of the organization would be the following:
3c302f7222 tests/qtest/bios-tables-test: Update DSDT blobs #1c (update blob) \
671f15f470 hw/arm/virt: Use ACPI PCI hotplug by default #1b (modify default) |--- acpi-pcihp=on
9468f730e1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table #1a (whitelist) /
c9ec0e0226 hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
dc44749a34 hw/arm/virt: Let virt support pci hotplug/unplug GED event
f667079260 hw/core/sysbus: Introduce sysbus_mmio_map_name() helper
46731e563b hw/acpi/ged: Support migration of AcpiPciHpState
4fa7b0e0f6 hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
587b001876 hw/acpi/ged: Prepare the device to react to PCI hotplug events
b55183d128 hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
fe4c96b384 hw/i386/acpi-build: Move aml_pci_edsm to a generic place
010c50dbc7 hw/i386/acpi-build: Introduce and use acpi_get_pci_host
5a1be727e6 hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
14a172e192 hw/i386/acpi-build: Move build_append_notification_callback to pcihp
5110ae8874 hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
82c2aef672 hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
6372fe7eef qtest/bios-tables-test: Update DSDT 'noacpipcihp' variant blob #2 (blob update for test), part 2 of 2 (update blob) ]--- New PCIe native test
6fb29ba18d tests/qtest/bios-tables-test: Add aarch64 PCIe native hotplug test #2 (pcie native hp test), part 1 of 2 (whitelist) /
12c63a505e tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Patch 10/25 in this series (update blob) \
779bd47749 hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Patch 9/25 in this series (modify default) |--- _OSC change
f260fd59c1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Patch 8/25 in this series (whitelist) /
b000677fd9 hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
a72f87b634 hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
77a87b6ba3 hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
67e4dc2e7b hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
b89e69da54 hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
74f1080a74 hw/arm/virt: Introduce machine state acpi pcihp flags and props
1048082f33 hw/i386/acpi-build: Make aml_pci_device_dsm() static
See notes on the right for when the blobs are updated or added in the
series. The new test for PCIe native hotplug (I prefer not calling it legacy,
since it's not really legacy; it's just an alternative better in some scenarios,
specially in virtualization) is now in the series (#2), "right after 10/25".
Is something like that that you want?
Cheers,
Gustavo
>
>> Cheers,
>> Gustavo
>>
>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>>>>
>>>>
>>>> Cheers,
>>>> Gustavo
>>>>
>>>>>>
>>>>>> ---
>>>>>>
>>>>>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
>>>>>> ---
>>>>>> tests/qtest/bios-tables-test.c | 13 +++++++++----
>>>>>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>>>>>
>>>>>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
>>>>>> index 0a333ec435..6379dba714 100644
>>>>>> --- a/tests/qtest/bios-tables-test.c
>>>>>> +++ b/tests/qtest/bios-tables-test.c
>>>>>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>>>>>> };
>>>>>>
>>>>>> data.variant = ".memhp";
>>>>>> - test_acpi_one(" -machine nvdimm=on"
>>>>>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
>>>>>> " -cpu cortex-a57"
>>>>>> " -m 256M,slots=3,maxmem=1G"
>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
>>>>>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
>>>>>> };
>>>>>>
>>>>>> data.variant = ".numamem";
>>>>>> - test_acpi_one(" -cpu cortex-a57"
>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>>>>> + " -cpu cortex-a57"
>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
>>>>>> " -numa node,memdev=ram0",
>>>>>> &data);
>>>>>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
>>>>>> * to solve the conflicts.
>>>>>> */
>>>>>> data.variant = ".pxb";
>>>>>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>>>>> + " -device pcie-root-port,chassis=1,id=pci.1"
>>>>>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
>>>>>> " -drive file="
>>>>>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
>>>>>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
>>>>>>
>>>>>> data.variant = ".acpihmatvirt";
>>>>>>
>>>>>> - test_acpi_one(" -machine hmat=on"
>>>>>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
>>>>>> " -cpu cortex-a57"
>>>>>> " -smp 4,sockets=2"
>>>>>> " -m 384M"
>>>>>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
>>>>>> data.smbios_cpu_max_speed = 2900;
>>>>>> data.smbios_cpu_curr_speed = 2700;
>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>> + "-machine acpi-pcihp=off "
>>>>>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
>>>>>> free_test_data(&data);
>>>>>> }
>>>>>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
>>>>>> };
>>>>>>
>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>> + "-machine acpi-pcihp=off "
>>>>>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
>>>>>> free_test_data(&data);
>>>>>> }
>>>>>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
>>>>>> };
>>>>>>
>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>> + "-machine acpi-pcihp=off "
>>>>>> "-device virtio-iommu-pci", &data);
>>>>>> free_test_data(&data);
>>>>>> }
>>>>>
>>>>
>>>
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-06-02 6:06 ` Gustavo Romero
@ 2025-06-10 14:29 ` Gustavo Romero
2025-06-11 8:54 ` Igor Mammedov
0 siblings, 1 reply; 121+ messages in thread
From: Gustavo Romero @ 2025-06-10 14:29 UTC (permalink / raw)
To: Igor Mammedov
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
anisinha, mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Igor,
On 6/2/25 03:06, Gustavo Romero wrote:
> Hi Igor and Eric,
>
> I'm sending again this to the mailing list since it seems the first one
> got lost... I can't find it either in qemu-devel@ or in qemu-arm@ :(
>
> On 5/30/25 08:51, Igor Mammedov wrote:
>> On Wed, 28 May 2025 12:04:26 -0300
>> Gustavo Romero <gustavo.romero@linaro.org> wrote:
>>
>>> Hi Igor,
>>>
>>> On 5/28/25 10:02, Igor Mammedov wrote:
>>>> On Wed, 28 May 2025 09:41:15 -0300
>>>> Gustavo Romero <gustavo.romero@linaro.org> wrote:
>>>>> Hi Igor,
>>>>>
>>>>> On 5/28/25 06:38, Igor Mammedov wrote:
>>>>>> On Tue, 27 May 2025 09:40:26 +0200
>>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>>>
>>>>>>> ACPI PCI hotplug is now turned on by default so we need to change the
>>>>>>> existing tests to keep it off. However, even setting the ACPI PCI
>>>>>>> hotplug off in the existing tests, there will be changes in the ACPI
>>>>>>> tables because the _OSC method was modified, hence in the next patch of
>>>>>>> this series the blobs are updated accordingly.
>>>>>>>
>>>>>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>>
>>>>>> it would be better to test whatever default we end up with.
>>>>>> (like x86)
>>>>>
>>>>> hmm maybe there is a confusion here, Igor. We are actually planning what you
>>>>
>>>> perhaps, see my reply to Eric about my expectations wrt tests.
>>>
>>> Yip, I read it before my reply here.
>>>
>>>
>>>> (i.e. default tests shouldn't have any explicit CLI options,
>>>> instead it should follow whitelist blobs/set new default patch/update blobs pattern)
>>>
>>> I see. I agree with that. But this patch is not about the new test. The new test is
>>> _not_ in this series. Patches 8/25, 10/25, and 24/25 are _not_ about the new test but
>>> about adapting the _legacy tests_ (native acpi) to the situation when ACPI HP becomes
>>> the default, because this series makes acpi-pcihp=on the default, hence the CLI option
>>> "acpi-pcihp=off" added to them. An update to the blobs are also necessary because of the
>>> change in _OSC method, even when acpi-pcihp=off.
>>>
>>>
>>>>> said. This patch and the other two in this series related to the bios-tables-test
>>>>> (i.e., patches 8/25 and 10/25) are for actually making the current (legacy) test pass,
>>>>> since the new default as per this series will be acpi-pcihp=on. That's why here we're
>>>>> adapting the current test here to have acpi-pcihp=off.
>>>>>
>>>>> The new test that will test for acpi-pcihp=on (the new default) is not in this series
>>>>> and we decided to merge it separate. It's in the patch 4/5 and 5/5 of the follow series:
>>>
>>> We're doing the "blobs/set new default patch/update blobs pattern" in the new test, which
>>> we can merge later, once this series is merged, no? The step "set new default" then will
>>> not be necessary because the new test will be merged separate, after this series, so when
>>> acpi-pcihp=on is already the default.
>>>
>>> Please note that although we're using acpi-pcihp=on in the new test, it's not necessary,
>>> we can dropped this option, making it implicit as you say, and it will work. This is the
>>> new test:
>>>
>>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
>>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>>>
>>>
>>> Thus, there are to "acts" of modifying the bios-tables-test:
>>>
>>> 1) Adapt the current tests to when acpi-pcihp=on becomes the default (hence the addition
>>> to them of "acpi-pcihp=off".
>>
>>
>> that's what I disagree with.
>>
>> 1) Instead adapting majority of tests to legacy before switching defaults,
>> just do whitelist/modify default/update so all of tests run with new default.
>>
>> and then
>>
>>> There is also the need to update the blobs, but it's because
>>> of the _OSC method change in DSDT table, which will change anyways, even with "acpi-pcihp=off¨,
>>> hence the need for patch 10/25 in this series. This is _done is this series_.
>>
>>
>>> 2) Add a new test for testing the default (i.e. acpi-pcihp-on). It follows what you're
>>> saying above: "follow whitelist blobs/set new default patch/update blobs pattern",
>>> because we can drop the acpi-pcihp-on option from the CLI in this test without any
>>> prejudice to test. While the step "set new default patch" was actually done in 1).
>>
>> 2) add a separate test case for native pcie hoplug (preferably within this series)
>>
>> 3) even better would be to add #2 before #1 (right after 10/25),
>> this way will guarantee that old native hotplug tables stay
>> the same regardless of followup patches that add ACPI pcihp aml.
>
> Got it now, hopefully... 🙂
>
> OK, I'm trying to follow what you recommended in 3). I've pushed a series to:
>
> https://github.com/gromero/qemu/commits/v2_20250527_eric_auger_redhat_com/
>
> So, I understand we will need to add/update the blobs at three times,
> 2 times because of the changes in the DSDT generation (_OSC changes and when
> acpi-pci=on) and an additional one because of the new PCIe native hotplug test.
>
> I dropped this patch (Patch 24/25) from the series.
>
> So the overview of the organization would be the following:
>
>
> 3c302f7222 tests/qtest/bios-tables-test: Update DSDT blobs #1c (update blob) \
> 671f15f470 hw/arm/virt: Use ACPI PCI hotplug by default #1b (modify default) |--- acpi-pcihp=on
> 9468f730e1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table #1a (whitelist) /
> c9ec0e0226 hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
> dc44749a34 hw/arm/virt: Let virt support pci hotplug/unplug GED event
> f667079260 hw/core/sysbus: Introduce sysbus_mmio_map_name() helper
> 46731e563b hw/acpi/ged: Support migration of AcpiPciHpState
> 4fa7b0e0f6 hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
> 587b001876 hw/acpi/ged: Prepare the device to react to PCI hotplug events
> b55183d128 hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
> fe4c96b384 hw/i386/acpi-build: Move aml_pci_edsm to a generic place
> 010c50dbc7 hw/i386/acpi-build: Introduce and use acpi_get_pci_host
> 5a1be727e6 hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
> 14a172e192 hw/i386/acpi-build: Move build_append_notification_callback to pcihp
> 5110ae8874 hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
> 82c2aef672 hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
> 6372fe7eef qtest/bios-tables-test: Update DSDT 'noacpipcihp' variant blob #2 (blob update for test), part 2 of 2 (update blob) ]--- New PCIe native test
> 6fb29ba18d tests/qtest/bios-tables-test: Add aarch64 PCIe native hotplug test #2 (pcie native hp test), part 1 of 2 (whitelist) /
> 12c63a505e tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Patch 10/25 in this series (update blob) \
> 779bd47749 hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Patch 9/25 in this series (modify default) |--- _OSC change
> f260fd59c1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Patch 8/25 in this series (whitelist) /
> b000677fd9 hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
> a72f87b634 hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
> 77a87b6ba3 hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
> 67e4dc2e7b hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
> b89e69da54 hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
> 74f1080a74 hw/arm/virt: Introduce machine state acpi pcihp flags and props
> 1048082f33 hw/i386/acpi-build: Make aml_pci_device_dsm() static
>
> See notes on the right for when the blobs are updated or added in the
> series. The new test for PCIe native hotplug (I prefer not calling it legacy,
> since it's not really legacy; it's just an alternative better in some scenarios,
> specially in virtualization) is now in the series (#2), "right after 10/25".
>
> Is something like that that you want?
Igor, just a friendly ping on it. It would be quite helpful for us if you could
confirm I'm following what you recommended regarding the tests for this series.
Thanks,
Gustavo
>
> Cheers,
> Gustavo
>
>>
>>> Cheers,
>>> Gustavo
>>>
>>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
>>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>>>>>
>>>>>
>>>>> Cheers,
>>>>> Gustavo
>>>>>>>
>>>>>>> ---
>>>>>>>
>>>>>>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
>>>>>>> ---
>>>>>>> tests/qtest/bios-tables-test.c | 13 +++++++++----
>>>>>>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>>>>>>
>>>>>>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
>>>>>>> index 0a333ec435..6379dba714 100644
>>>>>>> --- a/tests/qtest/bios-tables-test.c
>>>>>>> +++ b/tests/qtest/bios-tables-test.c
>>>>>>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>>>>>>> };
>>>>>>> data.variant = ".memhp";
>>>>>>> - test_acpi_one(" -machine nvdimm=on"
>>>>>>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
>>>>>>> " -cpu cortex-a57"
>>>>>>> " -m 256M,slots=3,maxmem=1G"
>>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
>>>>>>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
>>>>>>> };
>>>>>>> data.variant = ".numamem";
>>>>>>> - test_acpi_one(" -cpu cortex-a57"
>>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>>>>>> + " -cpu cortex-a57"
>>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
>>>>>>> " -numa node,memdev=ram0",
>>>>>>> &data);
>>>>>>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
>>>>>>> * to solve the conflicts.
>>>>>>> */
>>>>>>> data.variant = ".pxb";
>>>>>>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
>>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>>>>>> + " -device pcie-root-port,chassis=1,id=pci.1"
>>>>>>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
>>>>>>> " -drive file="
>>>>>>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
>>>>>>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
>>>>>>> data.variant = ".acpihmatvirt";
>>>>>>> - test_acpi_one(" -machine hmat=on"
>>>>>>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
>>>>>>> " -cpu cortex-a57"
>>>>>>> " -smp 4,sockets=2"
>>>>>>> " -m 384M"
>>>>>>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
>>>>>>> data.smbios_cpu_max_speed = 2900;
>>>>>>> data.smbios_cpu_curr_speed = 2700;
>>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>>> + "-machine acpi-pcihp=off "
>>>>>>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
>>>>>>> free_test_data(&data);
>>>>>>> }
>>>>>>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
>>>>>>> };
>>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>>> + "-machine acpi-pcihp=off "
>>>>>>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
>>>>>>> free_test_data(&data);
>>>>>>> }
>>>>>>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
>>>>>>> };
>>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>>> + "-machine acpi-pcihp=off "
>>>>>>> "-device virtio-iommu-pci", &data);
>>>>>>> free_test_data(&data);
>>>>>>> }
>>>
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-06-10 14:29 ` Gustavo Romero
@ 2025-06-11 8:54 ` Igor Mammedov
2025-06-11 13:14 ` Gustavo Romero
0 siblings, 1 reply; 121+ messages in thread
From: Igor Mammedov @ 2025-06-11 8:54 UTC (permalink / raw)
To: Gustavo Romero
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
anisinha, mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
On Tue, 10 Jun 2025 11:29:02 -0300
Gustavo Romero <gustavo.romero@linaro.org> wrote:
> Hi Igor,
>
> On 6/2/25 03:06, Gustavo Romero wrote:
> > Hi Igor and Eric,
> >
> > I'm sending again this to the mailing list since it seems the first one
> > got lost... I can't find it either in qemu-devel@ or in qemu-arm@ :(
> >
> > On 5/30/25 08:51, Igor Mammedov wrote:
> >> On Wed, 28 May 2025 12:04:26 -0300
> >> Gustavo Romero <gustavo.romero@linaro.org> wrote:
> >>
> >>> Hi Igor,
> >>>
> >>> On 5/28/25 10:02, Igor Mammedov wrote:
> >>>> On Wed, 28 May 2025 09:41:15 -0300
> >>>> Gustavo Romero <gustavo.romero@linaro.org> wrote:
> >>>>> Hi Igor,
> >>>>>
> >>>>> On 5/28/25 06:38, Igor Mammedov wrote:
> >>>>>> On Tue, 27 May 2025 09:40:26 +0200
> >>>>>> Eric Auger <eric.auger@redhat.com> wrote:
> >>>>>>> From: Gustavo Romero <gustavo.romero@linaro.org>
> >>>>>>>
> >>>>>>> ACPI PCI hotplug is now turned on by default so we need to change the
> >>>>>>> existing tests to keep it off. However, even setting the ACPI PCI
> >>>>>>> hotplug off in the existing tests, there will be changes in the ACPI
> >>>>>>> tables because the _OSC method was modified, hence in the next patch of
> >>>>>>> this series the blobs are updated accordingly.
> >>>>>>>
> >>>>>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> >>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >>>>>>
> >>>>>> it would be better to test whatever default we end up with.
> >>>>>> (like x86)
> >>>>>
> >>>>> hmm maybe there is a confusion here, Igor. We are actually planning what you
> >>>>
> >>>> perhaps, see my reply to Eric about my expectations wrt tests.
> >>>
> >>> Yip, I read it before my reply here.
> >>>
> >>>
> >>>> (i.e. default tests shouldn't have any explicit CLI options,
> >>>> instead it should follow whitelist blobs/set new default patch/update blobs pattern)
> >>>
> >>> I see. I agree with that. But this patch is not about the new test. The new test is
> >>> _not_ in this series. Patches 8/25, 10/25, and 24/25 are _not_ about the new test but
> >>> about adapting the _legacy tests_ (native acpi) to the situation when ACPI HP becomes
> >>> the default, because this series makes acpi-pcihp=on the default, hence the CLI option
> >>> "acpi-pcihp=off" added to them. An update to the blobs are also necessary because of the
> >>> change in _OSC method, even when acpi-pcihp=off.
> >>>
> >>>
> >>>>> said. This patch and the other two in this series related to the bios-tables-test
> >>>>> (i.e., patches 8/25 and 10/25) are for actually making the current (legacy) test pass,
> >>>>> since the new default as per this series will be acpi-pcihp=on. That's why here we're
> >>>>> adapting the current test here to have acpi-pcihp=off.
> >>>>>
> >>>>> The new test that will test for acpi-pcihp=on (the new default) is not in this series
> >>>>> and we decided to merge it separate. It's in the patch 4/5 and 5/5 of the follow series:
> >>>
> >>> We're doing the "blobs/set new default patch/update blobs pattern" in the new test, which
> >>> we can merge later, once this series is merged, no? The step "set new default" then will
> >>> not be necessary because the new test will be merged separate, after this series, so when
> >>> acpi-pcihp=on is already the default.
> >>>
> >>> Please note that although we're using acpi-pcihp=on in the new test, it's not necessary,
> >>> we can dropped this option, making it implicit as you say, and it will work. This is the
> >>> new test:
> >>>
> >>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
> >>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
> >>>
> >>>
> >>> Thus, there are to "acts" of modifying the bios-tables-test:
> >>>
> >>> 1) Adapt the current tests to when acpi-pcihp=on becomes the default (hence the addition
> >>> to them of "acpi-pcihp=off".
> >>
> >>
> >> that's what I disagree with.
> >>
> >> 1) Instead adapting majority of tests to legacy before switching defaults,
> >> just do whitelist/modify default/update so all of tests run with new default.
> >>
> >> and then
> >>
> >>> There is also the need to update the blobs, but it's because
> >>> of the _OSC method change in DSDT table, which will change anyways, even with "acpi-pcihp=off¨,
> >>> hence the need for patch 10/25 in this series. This is _done is this series_.
> >>
> >>
> >>> 2) Add a new test for testing the default (i.e. acpi-pcihp-on). It follows what you're
> >>> saying above: "follow whitelist blobs/set new default patch/update blobs pattern",
> >>> because we can drop the acpi-pcihp-on option from the CLI in this test without any
> >>> prejudice to test. While the step "set new default patch" was actually done in 1).
> >>
> >> 2) add a separate test case for native pcie hoplug (preferably within this series)
> >>
> >> 3) even better would be to add #2 before #1 (right after 10/25),
> >> this way will guarantee that old native hotplug tables stay
> >> the same regardless of followup patches that add ACPI pcihp aml.
> >
> > Got it now, hopefully... 🙂
> >
> > OK, I'm trying to follow what you recommended in 3). I've pushed a series to:
> >
> > https://github.com/gromero/qemu/commits/v2_20250527_eric_auger_redhat_com/
> >
> > So, I understand we will need to add/update the blobs at three times,
> > 2 times because of the changes in the DSDT generation (_OSC changes and when
> > acpi-pci=on) and an additional one because of the new PCIe native hotplug test.
> >
> > I dropped this patch (Patch 24/25) from the series.
> >
> > So the overview of the organization would be the following:
> >
> >
> > 3c302f7222 tests/qtest/bios-tables-test: Update DSDT blobs #1c (update blob) \
> > 671f15f470 hw/arm/virt: Use ACPI PCI hotplug by default #1b (modify default) |--- acpi-pcihp=on
> > 9468f730e1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table #1a (whitelist) /
> > c9ec0e0226 hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
> > dc44749a34 hw/arm/virt: Let virt support pci hotplug/unplug GED event
> > f667079260 hw/core/sysbus: Introduce sysbus_mmio_map_name() helper
> > 46731e563b hw/acpi/ged: Support migration of AcpiPciHpState
> > 4fa7b0e0f6 hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
> > 587b001876 hw/acpi/ged: Prepare the device to react to PCI hotplug events
> > b55183d128 hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
> > fe4c96b384 hw/i386/acpi-build: Move aml_pci_edsm to a generic place
> > 010c50dbc7 hw/i386/acpi-build: Introduce and use acpi_get_pci_host
> > 5a1be727e6 hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
> > 14a172e192 hw/i386/acpi-build: Move build_append_notification_callback to pcihp
> > 5110ae8874 hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
> > 82c2aef672 hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
> > 6372fe7eef qtest/bios-tables-test: Update DSDT 'noacpipcihp' variant blob #2 (blob update for test), part 2 of 2 (update blob) ]--- New PCIe native test
> > 6fb29ba18d tests/qtest/bios-tables-test: Add aarch64 PCIe native hotplug test #2 (pcie native hp test), part 1 of 2 (whitelist) /
> > 12c63a505e tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Patch 10/25 in this series (update blob) \
> > 779bd47749 hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Patch 9/25 in this series (modify default) |--- _OSC change
> > f260fd59c1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Patch 8/25 in this series (whitelist) /
> > b000677fd9 hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
> > a72f87b634 hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
> > 77a87b6ba3 hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
> > 67e4dc2e7b hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
> > b89e69da54 hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
> > 74f1080a74 hw/arm/virt: Introduce machine state acpi pcihp flags and props
> > 1048082f33 hw/i386/acpi-build: Make aml_pci_device_dsm() static
> >
> > See notes on the right for when the blobs are updated or added in the
> > series. The new test for PCIe native hotplug (I prefer not calling it legacy,
> > since it's not really legacy; it's just an alternative better in some scenarios,
> > specially in virtualization) is now in the series (#2), "right after 10/25".
> >
> > Is something like that that you want?
>
> Igor, just a friendly ping on it. It would be quite helpful for us if you could
> confirm I'm following what you recommended regarding the tests for this series.
spirit of above looks fine,
as for actual patches, it would depend on chosen default.
Lets' see what submitted v3 would look like.
>
>
> Thanks,
> Gustavo
>
> >
> > Cheers,
> > Gustavo
> >
> >>
> >>> Cheers,
> >>> Gustavo
> >>>
> >>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
> >>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
> >>>>>
> >>>>>
> >>>>> Cheers,
> >>>>> Gustavo
> >>>>>>>
> >>>>>>> ---
> >>>>>>>
> >>>>>>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
> >>>>>>> ---
> >>>>>>> tests/qtest/bios-tables-test.c | 13 +++++++++----
> >>>>>>> 1 file changed, 9 insertions(+), 4 deletions(-)
> >>>>>>>
> >>>>>>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> >>>>>>> index 0a333ec435..6379dba714 100644
> >>>>>>> --- a/tests/qtest/bios-tables-test.c
> >>>>>>> +++ b/tests/qtest/bios-tables-test.c
> >>>>>>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
> >>>>>>> };
> >>>>>>> data.variant = ".memhp";
> >>>>>>> - test_acpi_one(" -machine nvdimm=on"
> >>>>>>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
> >>>>>>> " -cpu cortex-a57"
> >>>>>>> " -m 256M,slots=3,maxmem=1G"
> >>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
> >>>>>>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
> >>>>>>> };
> >>>>>>> data.variant = ".numamem";
> >>>>>>> - test_acpi_one(" -cpu cortex-a57"
> >>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
> >>>>>>> + " -cpu cortex-a57"
> >>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
> >>>>>>> " -numa node,memdev=ram0",
> >>>>>>> &data);
> >>>>>>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
> >>>>>>> * to solve the conflicts.
> >>>>>>> */
> >>>>>>> data.variant = ".pxb";
> >>>>>>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
> >>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
> >>>>>>> + " -device pcie-root-port,chassis=1,id=pci.1"
> >>>>>>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
> >>>>>>> " -drive file="
> >>>>>>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
> >>>>>>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
> >>>>>>> data.variant = ".acpihmatvirt";
> >>>>>>> - test_acpi_one(" -machine hmat=on"
> >>>>>>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
> >>>>>>> " -cpu cortex-a57"
> >>>>>>> " -smp 4,sockets=2"
> >>>>>>> " -m 384M"
> >>>>>>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
> >>>>>>> data.smbios_cpu_max_speed = 2900;
> >>>>>>> data.smbios_cpu_curr_speed = 2700;
> >>>>>>> test_acpi_one("-cpu cortex-a57 "
> >>>>>>> + "-machine acpi-pcihp=off "
> >>>>>>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
> >>>>>>> free_test_data(&data);
> >>>>>>> }
> >>>>>>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
> >>>>>>> };
> >>>>>>> test_acpi_one("-cpu cortex-a57 "
> >>>>>>> + "-machine acpi-pcihp=off "
> >>>>>>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
> >>>>>>> free_test_data(&data);
> >>>>>>> }
> >>>>>>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
> >>>>>>> };
> >>>>>>> test_acpi_one("-cpu cortex-a57 "
> >>>>>>> + "-machine acpi-pcihp=off "
> >>>>>>> "-device virtio-iommu-pci", &data);
> >>>>>>> free_test_data(&data);
> >>>>>>> }
> >>>
> >>
> >
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-06-11 8:54 ` Igor Mammedov
@ 2025-06-11 13:14 ` Gustavo Romero
2025-06-12 12:50 ` Igor Mammedov
0 siblings, 1 reply; 121+ messages in thread
From: Gustavo Romero @ 2025-06-11 13:14 UTC (permalink / raw)
To: Igor Mammedov
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
anisinha, mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
Hi Igor,
On 6/11/25 05:54, Igor Mammedov wrote:
> On Tue, 10 Jun 2025 11:29:02 -0300
> Gustavo Romero <gustavo.romero@linaro.org> wrote:
>
>> Hi Igor,
>>
>> On 6/2/25 03:06, Gustavo Romero wrote:
>>> Hi Igor and Eric,
>>>
>>> I'm sending again this to the mailing list since it seems the first one
>>> got lost... I can't find it either in qemu-devel@ or in qemu-arm@ :(
>>>
>>> On 5/30/25 08:51, Igor Mammedov wrote:
>>>> On Wed, 28 May 2025 12:04:26 -0300
>>>> Gustavo Romero <gustavo.romero@linaro.org> wrote:
>>>>
>>>>> Hi Igor,
>>>>>
>>>>> On 5/28/25 10:02, Igor Mammedov wrote:
>>>>>> On Wed, 28 May 2025 09:41:15 -0300
>>>>>> Gustavo Romero <gustavo.romero@linaro.org> wrote:
>>>>>>> Hi Igor,
>>>>>>>
>>>>>>> On 5/28/25 06:38, Igor Mammedov wrote:
>>>>>>>> On Tue, 27 May 2025 09:40:26 +0200
>>>>>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>>>>>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>>>>>
>>>>>>>>> ACPI PCI hotplug is now turned on by default so we need to change the
>>>>>>>>> existing tests to keep it off. However, even setting the ACPI PCI
>>>>>>>>> hotplug off in the existing tests, there will be changes in the ACPI
>>>>>>>>> tables because the _OSC method was modified, hence in the next patch of
>>>>>>>>> this series the blobs are updated accordingly.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>>>>>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>>>>
>>>>>>>> it would be better to test whatever default we end up with.
>>>>>>>> (like x86)
>>>>>>>
>>>>>>> hmm maybe there is a confusion here, Igor. We are actually planning what you
>>>>>>
>>>>>> perhaps, see my reply to Eric about my expectations wrt tests.
>>>>>
>>>>> Yip, I read it before my reply here.
>>>>>
>>>>>
>>>>>> (i.e. default tests shouldn't have any explicit CLI options,
>>>>>> instead it should follow whitelist blobs/set new default patch/update blobs pattern)
>>>>>
>>>>> I see. I agree with that. But this patch is not about the new test. The new test is
>>>>> _not_ in this series. Patches 8/25, 10/25, and 24/25 are _not_ about the new test but
>>>>> about adapting the _legacy tests_ (native acpi) to the situation when ACPI HP becomes
>>>>> the default, because this series makes acpi-pcihp=on the default, hence the CLI option
>>>>> "acpi-pcihp=off" added to them. An update to the blobs are also necessary because of the
>>>>> change in _OSC method, even when acpi-pcihp=off.
>>>>>
>>>>>
>>>>>>> said. This patch and the other two in this series related to the bios-tables-test
>>>>>>> (i.e., patches 8/25 and 10/25) are for actually making the current (legacy) test pass,
>>>>>>> since the new default as per this series will be acpi-pcihp=on. That's why here we're
>>>>>>> adapting the current test here to have acpi-pcihp=off.
>>>>>>>
>>>>>>> The new test that will test for acpi-pcihp=on (the new default) is not in this series
>>>>>>> and we decided to merge it separate. It's in the patch 4/5 and 5/5 of the follow series:
>>>>>
>>>>> We're doing the "blobs/set new default patch/update blobs pattern" in the new test, which
>>>>> we can merge later, once this series is merged, no? The step "set new default" then will
>>>>> not be necessary because the new test will be merged separate, after this series, so when
>>>>> acpi-pcihp=on is already the default.
>>>>>
>>>>> Please note that although we're using acpi-pcihp=on in the new test, it's not necessary,
>>>>> we can dropped this option, making it implicit as you say, and it will work. This is the
>>>>> new test:
>>>>>
>>>>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
>>>>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>>>>>
>>>>>
>>>>> Thus, there are to "acts" of modifying the bios-tables-test:
>>>>>
>>>>> 1) Adapt the current tests to when acpi-pcihp=on becomes the default (hence the addition
>>>>> to them of "acpi-pcihp=off".
>>>>
>>>>
>>>> that's what I disagree with.
>>>>
>>>> 1) Instead adapting majority of tests to legacy before switching defaults,
>>>> just do whitelist/modify default/update so all of tests run with new default.
>>>>
>>>> and then
>>>>
>>>>> There is also the need to update the blobs, but it's because
>>>>> of the _OSC method change in DSDT table, which will change anyways, even with "acpi-pcihp=off¨,
>>>>> hence the need for patch 10/25 in this series. This is _done is this series_.
>>>>
>>>>
>>>>> 2) Add a new test for testing the default (i.e. acpi-pcihp-on). It follows what you're
>>>>> saying above: "follow whitelist blobs/set new default patch/update blobs pattern",
>>>>> because we can drop the acpi-pcihp-on option from the CLI in this test without any
>>>>> prejudice to test. While the step "set new default patch" was actually done in 1).
>>>>
>>>> 2) add a separate test case for native pcie hoplug (preferably within this series)
>>>>
>>>> 3) even better would be to add #2 before #1 (right after 10/25),
>>>> this way will guarantee that old native hotplug tables stay
>>>> the same regardless of followup patches that add ACPI pcihp aml.
>>>
>>> Got it now, hopefully... 🙂
>>>
>>> OK, I'm trying to follow what you recommended in 3). I've pushed a series to:
>>>
>>> https://github.com/gromero/qemu/commits/v2_20250527_eric_auger_redhat_com/
>>>
>>> So, I understand we will need to add/update the blobs at three times,
>>> 2 times because of the changes in the DSDT generation (_OSC changes and when
>>> acpi-pci=on) and an additional one because of the new PCIe native hotplug test.
>>>
>>> I dropped this patch (Patch 24/25) from the series.
>>>
>>> So the overview of the organization would be the following:
>>>
>>>
>>> 3c302f7222 tests/qtest/bios-tables-test: Update DSDT blobs #1c (update blob) \
>>> 671f15f470 hw/arm/virt: Use ACPI PCI hotplug by default #1b (modify default) |--- acpi-pcihp=on
>>> 9468f730e1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table #1a (whitelist) /
>>> c9ec0e0226 hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
>>> dc44749a34 hw/arm/virt: Let virt support pci hotplug/unplug GED event
>>> f667079260 hw/core/sysbus: Introduce sysbus_mmio_map_name() helper
>>> 46731e563b hw/acpi/ged: Support migration of AcpiPciHpState
>>> 4fa7b0e0f6 hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
>>> 587b001876 hw/acpi/ged: Prepare the device to react to PCI hotplug events
>>> b55183d128 hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
>>> fe4c96b384 hw/i386/acpi-build: Move aml_pci_edsm to a generic place
>>> 010c50dbc7 hw/i386/acpi-build: Introduce and use acpi_get_pci_host
>>> 5a1be727e6 hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
>>> 14a172e192 hw/i386/acpi-build: Move build_append_notification_callback to pcihp
>>> 5110ae8874 hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
>>> 82c2aef672 hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
>>> 6372fe7eef qtest/bios-tables-test: Update DSDT 'noacpipcihp' variant blob #2 (blob update for test), part 2 of 2 (update blob) ]--- New PCIe native test
>>> 6fb29ba18d tests/qtest/bios-tables-test: Add aarch64 PCIe native hotplug test #2 (pcie native hp test), part 1 of 2 (whitelist) /
>>> 12c63a505e tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Patch 10/25 in this series (update blob) \
>>> 779bd47749 hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Patch 9/25 in this series (modify default) |--- _OSC change
>>> f260fd59c1 tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Patch 8/25 in this series (whitelist) /
>>> b000677fd9 hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
>>> a72f87b634 hw/pci-host/gpex-acpi: Propagate hotplug type info from virt machine downto gpex
>>> 77a87b6ba3 hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
>>> 67e4dc2e7b hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
>>> b89e69da54 hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
>>> 74f1080a74 hw/arm/virt: Introduce machine state acpi pcihp flags and props
>>> 1048082f33 hw/i386/acpi-build: Make aml_pci_device_dsm() static
>>>
>>> See notes on the right for when the blobs are updated or added in the
>>> series. The new test for PCIe native hotplug (I prefer not calling it legacy,
>>> since it's not really legacy; it's just an alternative better in some scenarios,
>>> specially in virtualization) is now in the series (#2), "right after 10/25".
>>>
>>> Is something like that that you want?
>>
>> Igor, just a friendly ping on it. It would be quite helpful for us if you could
>> confirm I'm following what you recommended regarding the tests for this series.
>
> spirit of above looks fine,
Thanks for confirming it.
> as for actual patches, it would depend on chosen default.
> Lets' see what submitted v3 would look like.
Agreed. Yep, I can adapt the tests the other way, depending on
the final chosen default. Let's way v3 ;)
BTW, why did we ultimately choose to commit blobs instead of the actual ACPI
code (as generated by iasl)? I'm just wondering if we could avoid committing
the blobs to 1) avoid committing binaries and 2) have the changes in the
ACPI code in the same commit that changes the ACPI itself.
If that's only for historical reasons maybe I can improve the bios-tables-test.c
to handle the ACPI code/struct in text format, avoiding the blobs, so I ask.
Thanks!
Cheers,
Gustavo
>>
>>
>> Thanks,
>> Gustavo
>>
>>>
>>> Cheers,
>>> Gustavo
>>>
>>>>
>>>>> Cheers,
>>>>> Gustavo
>>>>>
>>>>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
>>>>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
>>>>>>>
>>>>>>>
>>>>>>> Cheers,
>>>>>>> Gustavo
>>>>>>>>>
>>>>>>>>> ---
>>>>>>>>>
>>>>>>>>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
>>>>>>>>> ---
>>>>>>>>> tests/qtest/bios-tables-test.c | 13 +++++++++----
>>>>>>>>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>>>>>>>>
>>>>>>>>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
>>>>>>>>> index 0a333ec435..6379dba714 100644
>>>>>>>>> --- a/tests/qtest/bios-tables-test.c
>>>>>>>>> +++ b/tests/qtest/bios-tables-test.c
>>>>>>>>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>>>>>>>>> };
>>>>>>>>> data.variant = ".memhp";
>>>>>>>>> - test_acpi_one(" -machine nvdimm=on"
>>>>>>>>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
>>>>>>>>> " -cpu cortex-a57"
>>>>>>>>> " -m 256M,slots=3,maxmem=1G"
>>>>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
>>>>>>>>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
>>>>>>>>> };
>>>>>>>>> data.variant = ".numamem";
>>>>>>>>> - test_acpi_one(" -cpu cortex-a57"
>>>>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>>>>>>>> + " -cpu cortex-a57"
>>>>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
>>>>>>>>> " -numa node,memdev=ram0",
>>>>>>>>> &data);
>>>>>>>>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
>>>>>>>>> * to solve the conflicts.
>>>>>>>>> */
>>>>>>>>> data.variant = ".pxb";
>>>>>>>>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
>>>>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
>>>>>>>>> + " -device pcie-root-port,chassis=1,id=pci.1"
>>>>>>>>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
>>>>>>>>> " -drive file="
>>>>>>>>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
>>>>>>>>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
>>>>>>>>> data.variant = ".acpihmatvirt";
>>>>>>>>> - test_acpi_one(" -machine hmat=on"
>>>>>>>>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
>>>>>>>>> " -cpu cortex-a57"
>>>>>>>>> " -smp 4,sockets=2"
>>>>>>>>> " -m 384M"
>>>>>>>>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
>>>>>>>>> data.smbios_cpu_max_speed = 2900;
>>>>>>>>> data.smbios_cpu_curr_speed = 2700;
>>>>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>>>>> + "-machine acpi-pcihp=off "
>>>>>>>>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
>>>>>>>>> free_test_data(&data);
>>>>>>>>> }
>>>>>>>>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
>>>>>>>>> };
>>>>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>>>>> + "-machine acpi-pcihp=off "
>>>>>>>>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
>>>>>>>>> free_test_data(&data);
>>>>>>>>> }
>>>>>>>>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
>>>>>>>>> };
>>>>>>>>> test_acpi_one("-cpu cortex-a57 "
>>>>>>>>> + "-machine acpi-pcihp=off "
>>>>>>>>> "-device virtio-iommu-pci", &data);
>>>>>>>>> free_test_data(&data);
>>>>>>>>> }
>>>>>
>>>>
>>>
>>
>
^ permalink raw reply [flat|nested] 121+ messages in thread* Re: [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off
2025-06-11 13:14 ` Gustavo Romero
@ 2025-06-12 12:50 ` Igor Mammedov
0 siblings, 0 replies; 121+ messages in thread
From: Igor Mammedov @ 2025-06-12 12:50 UTC (permalink / raw)
To: Gustavo Romero
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
anisinha, mst, shannon.zhaosl, pbonzini, Jonathan.Cameron, philmd,
alex.bennee
On Wed, 11 Jun 2025 10:14:55 -0300
Gustavo Romero <gustavo.romero@linaro.org> wrote:
> Hi Igor,
>
> On 6/11/25 05:54, Igor Mammedov wrote:
> > On Tue, 10 Jun 2025 11:29:02 -0300
> > Gustavo Romero <gustavo.romero@linaro.org> wrote:
[...]
>
>
> BTW, why did we ultimately choose to commit blobs instead of the actual ACPI
> code (as generated by iasl)? I'm just wondering if we could avoid committing
> the blobs to 1) avoid committing binaries and 2) have the changes in the
> ACPI code in the same commit that changes the ACPI itself.
>
> If that's only for historical reasons maybe I can improve the bios-tables-test.c
> to handle the ACPI code/struct in text format, avoiding the blobs, so I ask.
We've had this for binary blobs at the beginning, however iasl output was
a moving target (whether it's ASL or AML) hence it proved to be unsuitable
for testing infrastructure (and not only testing, I don't remember concrete bugs though).
As result, we've switched to custom AML generator (aml_foo() API) with
blobs it has generated. ASL output by IASL in tests is used by maintaners
for diagnostic (/documenting) purposes only.
> Thanks!
>
>
> Cheers,
> Gustavo
>
> >>
> >>
> >> Thanks,
> >> Gustavo
> >>
> >>>
> >>> Cheers,
> >>> Gustavo
> >>>
> >>>>
> >>>>> Cheers,
> >>>>> Gustavo
> >>>>>
> >>>>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05828.html 4/5
> >>>>>>> https://mail.gnu.org/archive/html/qemu-devel/2025-05/msg05827.html 5/5
> >>>>>>>
> >>>>>>>
> >>>>>>> Cheers,
> >>>>>>> Gustavo
> >>>>>>>>>
> >>>>>>>>> ---
> >>>>>>>>>
> >>>>>>>>> [Eric] also added acpi-pcihp=off to test_acpi_aarch64_virt_tcg_numamem
> >>>>>>>>> ---
> >>>>>>>>> tests/qtest/bios-tables-test.c | 13 +++++++++----
> >>>>>>>>> 1 file changed, 9 insertions(+), 4 deletions(-)
> >>>>>>>>>
> >>>>>>>>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> >>>>>>>>> index 0a333ec435..6379dba714 100644
> >>>>>>>>> --- a/tests/qtest/bios-tables-test.c
> >>>>>>>>> +++ b/tests/qtest/bios-tables-test.c
> >>>>>>>>> @@ -1626,7 +1626,7 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
> >>>>>>>>> };
> >>>>>>>>> data.variant = ".memhp";
> >>>>>>>>> - test_acpi_one(" -machine nvdimm=on"
> >>>>>>>>> + test_acpi_one(" -machine nvdimm=on,acpi-pcihp=off"
> >>>>>>>>> " -cpu cortex-a57"
> >>>>>>>>> " -m 256M,slots=3,maxmem=1G"
> >>>>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
> >>>>>>>>> @@ -1747,7 +1747,8 @@ static void test_acpi_aarch64_virt_tcg_numamem(void)
> >>>>>>>>> };
> >>>>>>>>> data.variant = ".numamem";
> >>>>>>>>> - test_acpi_one(" -cpu cortex-a57"
> >>>>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
> >>>>>>>>> + " -cpu cortex-a57"
> >>>>>>>>> " -object memory-backend-ram,id=ram0,size=128M"
> >>>>>>>>> " -numa node,memdev=ram0",
> >>>>>>>>> &data);
> >>>>>>>>> @@ -1775,7 +1776,8 @@ static void test_acpi_aarch64_virt_tcg_pxb(void)
> >>>>>>>>> * to solve the conflicts.
> >>>>>>>>> */
> >>>>>>>>> data.variant = ".pxb";
> >>>>>>>>> - test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1"
> >>>>>>>>> + test_acpi_one(" -machine acpi-pcihp=off"
> >>>>>>>>> + " -device pcie-root-port,chassis=1,id=pci.1"
> >>>>>>>>> " -device virtio-scsi-pci,id=scsi0,bus=pci.1"
> >>>>>>>>> " -drive file="
> >>>>>>>>> "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2,"
> >>>>>>>>> @@ -1846,7 +1848,7 @@ static void test_acpi_aarch64_virt_tcg_acpi_hmat(void)
> >>>>>>>>> data.variant = ".acpihmatvirt";
> >>>>>>>>> - test_acpi_one(" -machine hmat=on"
> >>>>>>>>> + test_acpi_one(" -machine hmat=on,acpi-pcihp=off"
> >>>>>>>>> " -cpu cortex-a57"
> >>>>>>>>> " -smp 4,sockets=2"
> >>>>>>>>> " -m 384M"
> >>>>>>>>> @@ -2123,6 +2125,7 @@ static void test_acpi_aarch64_virt_tcg(void)
> >>>>>>>>> data.smbios_cpu_max_speed = 2900;
> >>>>>>>>> data.smbios_cpu_curr_speed = 2700;
> >>>>>>>>> test_acpi_one("-cpu cortex-a57 "
> >>>>>>>>> + "-machine acpi-pcihp=off "
> >>>>>>>>> "-smbios type=4,max-speed=2900,current-speed=2700", &data);
> >>>>>>>>> free_test_data(&data);
> >>>>>>>>> }
> >>>>>>>>> @@ -2142,6 +2145,7 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
> >>>>>>>>> };
> >>>>>>>>> test_acpi_one("-cpu cortex-a57 "
> >>>>>>>>> + "-machine acpi-pcihp=off "
> >>>>>>>>> "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
> >>>>>>>>> free_test_data(&data);
> >>>>>>>>> }
> >>>>>>>>> @@ -2227,6 +2231,7 @@ static void test_acpi_aarch64_virt_viot(void)
> >>>>>>>>> };
> >>>>>>>>> test_acpi_one("-cpu cortex-a57 "
> >>>>>>>>> + "-machine acpi-pcihp=off "
> >>>>>>>>> "-device virtio-iommu-pci", &data);
> >>>>>>>>> free_test_data(&data);
> >>>>>>>>> }
> >>>>>
> >>>>
> >>>
> >>
> >
>
^ permalink raw reply [flat|nested] 121+ messages in thread
* [PATCH v2 25/25] hw/arm/virt: Use ACPI PCI hotplug by default
2025-05-27 7:40 [PATCH v2 00/25] ACPI PCI Hotplug support on ARM Eric Auger
` (23 preceding siblings ...)
2025-05-27 7:40 ` [PATCH v2 24/25] tests/qtest/bios-tables-test: Keep ACPI PCI hotplug off Eric Auger
@ 2025-05-27 7:40 ` Eric Auger
24 siblings, 0 replies; 121+ messages in thread
From: Eric Auger @ 2025-05-27 7:40 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Now all the enablers are there for ACPI PCI hotplug support,
let's use it by default for 10.1 virt machine onwards.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
hw/arm/virt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index adb9422e14..f9ab6e2a90 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -3432,8 +3432,8 @@ static void virt_instance_init(Object *obj)
vms->tcg_its = true;
}
- /* default disallows ACPI PCI hotplug */
- vms->acpi_pcihp = false;
+ /* default allows ACPI PCI hotplug */
+ vms->acpi_pcihp = true;
/* Default disallows iommu instantiation */
vms->iommu = VIRT_IOMMU_NONE;
--
2.49.0
^ permalink raw reply related [flat|nested] 121+ messages in thread