* [PATCH v1 0/2] Add Winstar wf40eswaa6mnn0 panel support
@ 2025-06-06 11:45 Stefan Eichenberger
2025-06-06 11:45 ` [PATCH v1 1/2] drm/panel: st7701: " Stefan Eichenberger
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Stefan Eichenberger @ 2025-06-06 11:45 UTC (permalink / raw)
To: jagan, neil.armstrong, quic_jesszhan, airlied, simona,
maarten.lankhorst, mripard, tzimmermann, robh, krzk+dt, conor+dt
Cc: dri-devel, devicetree, linux-kernel
This patch series adds support for the Winstar wf40eswaa6mnn0 panel. The
datasheet including the init sequence was taken from here:
https://www.winstar.com.tw/d/308/WF40ESWAA6MNN0.pdf
Stefan Eichenberger (2):
drm/panel: st7701: Add Winstar wf40eswaa6mnn0 panel support
dt-bindings: display: st7701: Add Winstar wf40eswaa6mnn0 panel
.../display/panel/sitronix,st7701.yaml | 1 +
drivers/gpu/drm/panel/panel-sitronix-st7701.c | 124 ++++++++++++++++++
2 files changed, 125 insertions(+)
--
2.48.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v1 1/2] drm/panel: st7701: Add Winstar wf40eswaa6mnn0 panel support 2025-06-06 11:45 [PATCH v1 0/2] Add Winstar wf40eswaa6mnn0 panel support Stefan Eichenberger @ 2025-06-06 11:45 ` Stefan Eichenberger 2025-06-10 7:23 ` neil.armstrong 2025-06-06 11:45 ` [PATCH v1 2/2] dt-bindings: display: st7701: Add Winstar wf40eswaa6mnn0 panel Stefan Eichenberger 2025-06-10 12:13 ` [PATCH v1 0/2] Add Winstar wf40eswaa6mnn0 panel support Neil Armstrong 2 siblings, 1 reply; 6+ messages in thread From: Stefan Eichenberger @ 2025-06-06 11:45 UTC (permalink / raw) To: jagan, neil.armstrong, quic_jesszhan, airlied, simona, maarten.lankhorst, mripard, tzimmermann, robh, krzk+dt, conor+dt Cc: dri-devel, devicetree, linux-kernel The Winstar wf40eswaa6mnn0 panel is a square 4.0" TFT LCD with a resolution of 480x480 pixels. This panel is driven by the Sitronix ST7701 controller and uses a MIPI DSI interface. The settings are based on the panel's datasheet and the init sequence provided by Winstar. It was tested on a Verdin iMX8MP from Toradex with a Carrier Board providing a MIPI DSI interface. Signed-off-by: Stefan Eichenberger <eichest@gmail.com> --- drivers/gpu/drm/panel/panel-sitronix-st7701.c | 124 ++++++++++++++++++ 1 file changed, 124 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c index 1f72ef7ca74c9..cf42281393dd9 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c @@ -520,6 +520,28 @@ static void rg28xx_gip_sequence(struct st7701 *st7701) st7701_switch_cmd_bkx(st7701, false, 0); } +static void wf40eswaa6mnn0_gip_sequence(struct st7701 *st7701) +{ + ST7701_WRITE(st7701, 0xE0, 0x00, 0x28, 0x02); + ST7701_WRITE(st7701, 0xE1, 0x08, 0xA0, 0x00, 0x00, 0x07, 0xA0, 0x00, + 0x00, 0x00, 0x44, 0x44); + ST7701_WRITE(st7701, 0xE2, 0x11, 0x11, 0x44, 0x44, 0xED, 0xA0, 0x00, + 0x00, 0xEC, 0xA0, 0x00, 0x00); + ST7701_WRITE(st7701, 0xE3, 0x00, 0x00, 0x11, 0x11); + ST7701_WRITE(st7701, 0xE4, 0x44, 0x44); + ST7701_WRITE(st7701, 0xE5, 0x0A, 0xE9, 0xD8, 0xA0, 0x0C, 0xEB, 0xD8, + 0xA0, 0x0E, 0xED, 0xD8, 0xA0, 0x10, 0xEF, 0xD8, 0xA0); + ST7701_WRITE(st7701, 0xE6, 0x00, 0x00, 0x11, 0x11); + ST7701_WRITE(st7701, 0xE7, 0x44, 0x44); + ST7701_WRITE(st7701, 0xE8, 0x09, 0xE8, 0xD8, 0xA0, 0x0B, 0xEA, 0xD8, + 0xA0, 0x0D, 0xEC, 0xD8, 0xA0, 0x0F, 0xEE, 0xD8, 0xA0); + ST7701_WRITE(st7701, 0xEB, 0x00, 0x00, 0xE4, 0xE4, 0x88, 0x00, 0x40); + ST7701_WRITE(st7701, 0xEC, 0x3C, 0x00); + ST7701_WRITE(st7701, 0xED, 0xAB, 0x89, 0x76, 0x54, 0x02, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0x20, 0x45, 0x67, 0x98, 0xBA); + ST7701_WRITE(st7701, MIPI_DCS_SET_ADDRESS_MODE, 0); +} + static int st7701_prepare(struct drm_panel *panel) { struct st7701 *st7701 = panel_to_st7701(panel); @@ -1135,6 +1157,107 @@ static const struct st7701_panel_desc rg28xx_desc = { .gip_sequence = rg28xx_gip_sequence, }; +static const struct drm_display_mode wf40eswaa6mnn0_mode = { + .clock = 18306, + + .hdisplay = 480, + .hsync_start = 480 + 2, + .hsync_end = 480 + 2 + 45, + .htotal = 480 + 2 + 45 + 13, + + .vdisplay = 480, + .vsync_start = 480 + 2, + .vsync_end = 480 + 2 + 70, + .vtotal = 480 + 2 + 70 + 13, + + .width_mm = 72, + .height_mm = 70, + + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, + + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct st7701_panel_desc wf40eswaa6mnn0_desc = { + .mode = &wf40eswaa6mnn0_mode, + .lanes = 2, + .format = MIPI_DSI_FMT_RGB888, + .panel_sleep_delay = 0, + + .pv_gamma = { + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC0_MASK, 0x1), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC4_MASK, 0x08), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC8_MASK, 0x10), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC16_MASK, 0x0c), + + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC24_MASK, 0x10), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC52_MASK, 0x08), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC80_MASK, 0x10), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC108_MASK, 0x0c), + + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC147_MASK, 0x08), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC175_MASK, 0x22), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC203_MASK, 0x04), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC231_MASK, 0x14), + + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC239_MASK, 0x12), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC247_MASK, 0xb3), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC251_MASK, 0x3a), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC255_MASK, 0x1f) + }, + .nv_gamma = { + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC4_MASK, 0x13), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC4_MASK, 0x19), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC8_MASK, 0x1f), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC16_MASK, 0x0f), + + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC24_MASK, 0x14), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC52_MASK, 0x07), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC80_MASK, 0x07), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC108_MASK, 0x08), + + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC147_MASK, 0x07), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC175_MASK, 0x22), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC203_MASK, 0x02), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC231_MASK, 0xf), + + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC239_MASK, 0x0f), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC247_MASK, 0xa3), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC251_MASK, 0x29), + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC255_MASK, 0x0d) + }, + .nlinv = 3, + .vop_uv = 4737500, + .vcom_uv = 662500, + .vgh_mv = 15000, + .vgl_mv = -10170, + .avdd_mv = 6600, + .avcl_mv = -4600, + .gamma_op_bias = OP_BIAS_MIDDLE, + .input_op_bias = OP_BIAS_MIDDLE, + .output_op_bias = OP_BIAS_MIN, + .t2d_ns = 1600, + .t3d_ns = 10400, + .eot_en = true, + .gip_sequence = wf40eswaa6mnn0_gip_sequence, +}; + static void st7701_cleanup(void *data) { struct st7701 *st7701 = (struct st7701 *)data; @@ -1265,6 +1388,7 @@ static const struct of_device_id st7701_dsi_of_match[] = { { .compatible = "densitron,dmt028vghmcmi-1a", .data = &dmt028vghmcmi_1a_desc }, { .compatible = "elida,kd50t048a", .data = &kd50t048a_desc }, { .compatible = "techstar,ts8550b", .data = &ts8550b_desc }, + { .compatible = "winstar,wf40eswaa6mnn0", .data = &wf40eswaa6mnn0_desc }, { } }; MODULE_DEVICE_TABLE(of, st7701_dsi_of_match); -- 2.48.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v1 1/2] drm/panel: st7701: Add Winstar wf40eswaa6mnn0 panel support 2025-06-06 11:45 ` [PATCH v1 1/2] drm/panel: st7701: " Stefan Eichenberger @ 2025-06-10 7:23 ` neil.armstrong 0 siblings, 0 replies; 6+ messages in thread From: neil.armstrong @ 2025-06-10 7:23 UTC (permalink / raw) To: Stefan Eichenberger, jagan, quic_jesszhan, airlied, simona, maarten.lankhorst, mripard, tzimmermann, robh, krzk+dt, conor+dt Cc: dri-devel, devicetree, linux-kernel On 06/06/2025 13:45, Stefan Eichenberger wrote: > The Winstar wf40eswaa6mnn0 panel is a square 4.0" TFT LCD with a > resolution of 480x480 pixels. > > This panel is driven by the Sitronix ST7701 controller and uses a MIPI > DSI interface. The settings are based on the panel's datasheet and the > init sequence provided by Winstar. > > It was tested on a Verdin iMX8MP from Toradex with a Carrier Board > providing a MIPI DSI interface. > > Signed-off-by: Stefan Eichenberger <eichest@gmail.com> > --- > drivers/gpu/drm/panel/panel-sitronix-st7701.c | 124 ++++++++++++++++++ > 1 file changed, 124 insertions(+) > > diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c > index 1f72ef7ca74c9..cf42281393dd9 100644 > --- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c > +++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c > @@ -520,6 +520,28 @@ static void rg28xx_gip_sequence(struct st7701 *st7701) > st7701_switch_cmd_bkx(st7701, false, 0); > } > > +static void wf40eswaa6mnn0_gip_sequence(struct st7701 *st7701) > +{ > + ST7701_WRITE(st7701, 0xE0, 0x00, 0x28, 0x02); > + ST7701_WRITE(st7701, 0xE1, 0x08, 0xA0, 0x00, 0x00, 0x07, 0xA0, 0x00, > + 0x00, 0x00, 0x44, 0x44); > + ST7701_WRITE(st7701, 0xE2, 0x11, 0x11, 0x44, 0x44, 0xED, 0xA0, 0x00, > + 0x00, 0xEC, 0xA0, 0x00, 0x00); > + ST7701_WRITE(st7701, 0xE3, 0x00, 0x00, 0x11, 0x11); > + ST7701_WRITE(st7701, 0xE4, 0x44, 0x44); > + ST7701_WRITE(st7701, 0xE5, 0x0A, 0xE9, 0xD8, 0xA0, 0x0C, 0xEB, 0xD8, > + 0xA0, 0x0E, 0xED, 0xD8, 0xA0, 0x10, 0xEF, 0xD8, 0xA0); > + ST7701_WRITE(st7701, 0xE6, 0x00, 0x00, 0x11, 0x11); > + ST7701_WRITE(st7701, 0xE7, 0x44, 0x44); > + ST7701_WRITE(st7701, 0xE8, 0x09, 0xE8, 0xD8, 0xA0, 0x0B, 0xEA, 0xD8, > + 0xA0, 0x0D, 0xEC, 0xD8, 0xA0, 0x0F, 0xEE, 0xD8, 0xA0); > + ST7701_WRITE(st7701, 0xEB, 0x00, 0x00, 0xE4, 0xE4, 0x88, 0x00, 0x40); > + ST7701_WRITE(st7701, 0xEC, 0x3C, 0x00); > + ST7701_WRITE(st7701, 0xED, 0xAB, 0x89, 0x76, 0x54, 0x02, 0xFF, 0xFF, > + 0xFF, 0xFF, 0xFF, 0xFF, 0x20, 0x45, 0x67, 0x98, 0xBA); > + ST7701_WRITE(st7701, MIPI_DCS_SET_ADDRESS_MODE, 0); > +} > + > static int st7701_prepare(struct drm_panel *panel) > { > struct st7701 *st7701 = panel_to_st7701(panel); > @@ -1135,6 +1157,107 @@ static const struct st7701_panel_desc rg28xx_desc = { > .gip_sequence = rg28xx_gip_sequence, > }; > > +static const struct drm_display_mode wf40eswaa6mnn0_mode = { > + .clock = 18306, > + > + .hdisplay = 480, > + .hsync_start = 480 + 2, > + .hsync_end = 480 + 2 + 45, > + .htotal = 480 + 2 + 45 + 13, > + > + .vdisplay = 480, > + .vsync_start = 480 + 2, > + .vsync_end = 480 + 2 + 70, > + .vtotal = 480 + 2 + 70 + 13, > + > + .width_mm = 72, > + .height_mm = 70, > + > + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > + > + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > +}; > + > +static const struct st7701_panel_desc wf40eswaa6mnn0_desc = { > + .mode = &wf40eswaa6mnn0_mode, > + .lanes = 2, > + .format = MIPI_DSI_FMT_RGB888, > + .panel_sleep_delay = 0, > + > + .pv_gamma = { > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC0_MASK, 0x1), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC4_MASK, 0x08), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC8_MASK, 0x10), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC16_MASK, 0x0c), > + > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC24_MASK, 0x10), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC52_MASK, 0x08), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC80_MASK, 0x10), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC108_MASK, 0x0c), > + > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC147_MASK, 0x08), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC175_MASK, 0x22), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC203_MASK, 0x04), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC231_MASK, 0x14), > + > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC239_MASK, 0x12), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC247_MASK, 0xb3), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC251_MASK, 0x3a), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC255_MASK, 0x1f) > + }, > + .nv_gamma = { > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC4_MASK, 0x13), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC4_MASK, 0x19), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC8_MASK, 0x1f), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC16_MASK, 0x0f), > + > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC24_MASK, 0x14), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC52_MASK, 0x07), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC80_MASK, 0x07), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC108_MASK, 0x08), > + > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC147_MASK, 0x07), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC175_MASK, 0x22), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC203_MASK, 0x02), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC231_MASK, 0xf), > + > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC239_MASK, 0x0f), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC247_MASK, 0xa3), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC251_MASK, 0x29), > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_AJ_MASK, 0) | > + CFIELD_PREP(ST7701_CMD2_BK0_GAMCTRL_VC255_MASK, 0x0d) > + }, > + .nlinv = 3, > + .vop_uv = 4737500, > + .vcom_uv = 662500, > + .vgh_mv = 15000, > + .vgl_mv = -10170, > + .avdd_mv = 6600, > + .avcl_mv = -4600, > + .gamma_op_bias = OP_BIAS_MIDDLE, > + .input_op_bias = OP_BIAS_MIDDLE, > + .output_op_bias = OP_BIAS_MIN, > + .t2d_ns = 1600, > + .t3d_ns = 10400, > + .eot_en = true, > + .gip_sequence = wf40eswaa6mnn0_gip_sequence, > +}; > + > static void st7701_cleanup(void *data) > { > struct st7701 *st7701 = (struct st7701 *)data; > @@ -1265,6 +1388,7 @@ static const struct of_device_id st7701_dsi_of_match[] = { > { .compatible = "densitron,dmt028vghmcmi-1a", .data = &dmt028vghmcmi_1a_desc }, > { .compatible = "elida,kd50t048a", .data = &kd50t048a_desc }, > { .compatible = "techstar,ts8550b", .data = &ts8550b_desc }, > + { .compatible = "winstar,wf40eswaa6mnn0", .data = &wf40eswaa6mnn0_desc }, > { } > }; > MODULE_DEVICE_TABLE(of, st7701_dsi_of_match); Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v1 2/2] dt-bindings: display: st7701: Add Winstar wf40eswaa6mnn0 panel 2025-06-06 11:45 [PATCH v1 0/2] Add Winstar wf40eswaa6mnn0 panel support Stefan Eichenberger 2025-06-06 11:45 ` [PATCH v1 1/2] drm/panel: st7701: " Stefan Eichenberger @ 2025-06-06 11:45 ` Stefan Eichenberger 2025-06-06 15:43 ` Conor Dooley 2025-06-10 12:13 ` [PATCH v1 0/2] Add Winstar wf40eswaa6mnn0 panel support Neil Armstrong 2 siblings, 1 reply; 6+ messages in thread From: Stefan Eichenberger @ 2025-06-06 11:45 UTC (permalink / raw) To: jagan, neil.armstrong, quic_jesszhan, airlied, simona, maarten.lankhorst, mripard, tzimmermann, robh, krzk+dt, conor+dt Cc: dri-devel, devicetree, linux-kernel The Winstar wf40eswaa6mnn0 panel is a square 4.0" TFT LCD with a resolution of 480x480 pixels. Signed-off-by: Stefan Eichenberger <eichest@gmail.com> --- .../devicetree/bindings/display/panel/sitronix,st7701.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml b/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml index b07f3eca669bf..1e434240ea3f6 100644 --- a/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml +++ b/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml @@ -29,6 +29,7 @@ properties: - densitron,dmt028vghmcmi-1a - elida,kd50t048a - techstar,ts8550b + - winstar,wf40eswaa6mnn0 - const: sitronix,st7701 reg: -- 2.48.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v1 2/2] dt-bindings: display: st7701: Add Winstar wf40eswaa6mnn0 panel 2025-06-06 11:45 ` [PATCH v1 2/2] dt-bindings: display: st7701: Add Winstar wf40eswaa6mnn0 panel Stefan Eichenberger @ 2025-06-06 15:43 ` Conor Dooley 0 siblings, 0 replies; 6+ messages in thread From: Conor Dooley @ 2025-06-06 15:43 UTC (permalink / raw) To: Stefan Eichenberger Cc: jagan, neil.armstrong, quic_jesszhan, airlied, simona, maarten.lankhorst, mripard, tzimmermann, robh, krzk+dt, conor+dt, dri-devel, devicetree, linux-kernel [-- Attachment #1: Type: text/plain, Size: 288 bytes --] On Fri, Jun 06, 2025 at 01:45:51PM +0200, Stefan Eichenberger wrote: > The Winstar wf40eswaa6mnn0 panel is a square 4.0" TFT LCD with a > resolution of 480x480 pixels. > > Signed-off-by: Stefan Eichenberger <eichest@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1 0/2] Add Winstar wf40eswaa6mnn0 panel support 2025-06-06 11:45 [PATCH v1 0/2] Add Winstar wf40eswaa6mnn0 panel support Stefan Eichenberger 2025-06-06 11:45 ` [PATCH v1 1/2] drm/panel: st7701: " Stefan Eichenberger 2025-06-06 11:45 ` [PATCH v1 2/2] dt-bindings: display: st7701: Add Winstar wf40eswaa6mnn0 panel Stefan Eichenberger @ 2025-06-10 12:13 ` Neil Armstrong 2 siblings, 0 replies; 6+ messages in thread From: Neil Armstrong @ 2025-06-10 12:13 UTC (permalink / raw) To: jagan, quic_jesszhan, airlied, simona, maarten.lankhorst, mripard, tzimmermann, robh, krzk+dt, conor+dt, Stefan Eichenberger Cc: dri-devel, devicetree, linux-kernel Hi, On Fri, 06 Jun 2025 13:45:49 +0200, Stefan Eichenberger wrote: > This patch series adds support for the Winstar wf40eswaa6mnn0 panel. The > datasheet including the init sequence was taken from here: > https://www.winstar.com.tw/d/308/WF40ESWAA6MNN0.pdf > > Stefan Eichenberger (2): > drm/panel: st7701: Add Winstar wf40eswaa6mnn0 panel support > dt-bindings: display: st7701: Add Winstar wf40eswaa6mnn0 panel > > [...] Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git (drm-misc-next) [1/2] drm/panel: st7701: Add Winstar wf40eswaa6mnn0 panel support https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/d04f6367d39918461d0335d30b860d38668d4b54 [2/2] dt-bindings: display: st7701: Add Winstar wf40eswaa6mnn0 panel https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/f79692d0c386bf8b815c92fc0f832d1a0af03628 -- Neil ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-06-10 12:13 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-06-06 11:45 [PATCH v1 0/2] Add Winstar wf40eswaa6mnn0 panel support Stefan Eichenberger 2025-06-06 11:45 ` [PATCH v1 1/2] drm/panel: st7701: " Stefan Eichenberger 2025-06-10 7:23 ` neil.armstrong 2025-06-06 11:45 ` [PATCH v1 2/2] dt-bindings: display: st7701: Add Winstar wf40eswaa6mnn0 panel Stefan Eichenberger 2025-06-06 15:43 ` Conor Dooley 2025-06-10 12:13 ` [PATCH v1 0/2] Add Winstar wf40eswaa6mnn0 panel support Neil Armstrong
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