From: "Rob Herring (Arm)" <robh@kernel.org>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Pratyush Anand <pratyush.anand@gmail.com>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] dt-bindings: phy: Convert st,spear1310-miphy to DT schema
Date: Sat, 7 Jun 2025 16:26:28 -0500 [thread overview]
Message-ID: <20250607212629.744191-1-robh@kernel.org> (raw)
Convert the ST SPEAr MIPHY PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
.../bindings/phy/st,spear1310-miphy.yaml | 53 +++++++++++++++++++
.../bindings/phy/st-spear-miphy.txt | 15 ------
2 files changed, 53 insertions(+), 15 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/st,spear1310-miphy.yaml
delete mode 100644 Documentation/devicetree/bindings/phy/st-spear-miphy.txt
diff --git a/Documentation/devicetree/bindings/phy/st,spear1310-miphy.yaml b/Documentation/devicetree/bindings/phy/st,spear1310-miphy.yaml
new file mode 100644
index 000000000000..32f81615ddad
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/st,spear1310-miphy.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/st,spear1310-miphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ST SPEAr miphy
+
+maintainers:
+ - Pratyush Anand <pratyush.anand@gmail.com>
+
+description:
+ ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA.
+
+properties:
+ compatible:
+ enum:
+ - st,spear1310-miphy
+ - st,spear1340-miphy
+
+ reg:
+ maxItems: 1
+
+ misc:
+ description: Phandle for the syscon node to access misc registers.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ '#phy-cells':
+ description: >
+ Cell[0] indicates interface type: 0 = SATA, 1 = PCIe.
+ const: 1
+
+ phy-id:
+ description: Instance id of the phy. Required when multiple PHYs are present.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+required:
+ - compatible
+ - reg
+ - misc
+ - '#phy-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ miphy@1000 {
+ compatible = "st,spear1310-miphy";
+ reg = <0x1000 0x100>;
+ misc = <&syscon>;
+ #phy-cells = <1>;
+ phy-id = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/phy/st-spear-miphy.txt b/Documentation/devicetree/bindings/phy/st-spear-miphy.txt
deleted file mode 100644
index 2a6bfdcc09b3..000000000000
--- a/Documentation/devicetree/bindings/phy/st-spear-miphy.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-ST SPEAr miphy DT details
-=========================
-
-ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA.
-
-Required properties:
-- compatible : should be "st,spear1310-miphy" or "st,spear1340-miphy"
-- reg : offset and length of the PHY register set.
-- misc: phandle for the syscon node to access misc registers
-- #phy-cells : from the generic PHY bindings, must be 1.
- - cell[1]: 0 if phy used for SATA, 1 for PCIe.
-
-Optional properties:
-- phy-id: Instance id of the phy. Only required when there are multiple phys
- present on a implementation.
--
2.47.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: "Rob Herring (Arm)" <robh@kernel.org>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Pratyush Anand <pratyush.anand@gmail.com>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] dt-bindings: phy: Convert st,spear1310-miphy to DT schema
Date: Sat, 7 Jun 2025 16:26:28 -0500 [thread overview]
Message-ID: <20250607212629.744191-1-robh@kernel.org> (raw)
Convert the ST SPEAr MIPHY PHY binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
.../bindings/phy/st,spear1310-miphy.yaml | 53 +++++++++++++++++++
.../bindings/phy/st-spear-miphy.txt | 15 ------
2 files changed, 53 insertions(+), 15 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/st,spear1310-miphy.yaml
delete mode 100644 Documentation/devicetree/bindings/phy/st-spear-miphy.txt
diff --git a/Documentation/devicetree/bindings/phy/st,spear1310-miphy.yaml b/Documentation/devicetree/bindings/phy/st,spear1310-miphy.yaml
new file mode 100644
index 000000000000..32f81615ddad
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/st,spear1310-miphy.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/st,spear1310-miphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ST SPEAr miphy
+
+maintainers:
+ - Pratyush Anand <pratyush.anand@gmail.com>
+
+description:
+ ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA.
+
+properties:
+ compatible:
+ enum:
+ - st,spear1310-miphy
+ - st,spear1340-miphy
+
+ reg:
+ maxItems: 1
+
+ misc:
+ description: Phandle for the syscon node to access misc registers.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ '#phy-cells':
+ description: >
+ Cell[0] indicates interface type: 0 = SATA, 1 = PCIe.
+ const: 1
+
+ phy-id:
+ description: Instance id of the phy. Required when multiple PHYs are present.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+required:
+ - compatible
+ - reg
+ - misc
+ - '#phy-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ miphy@1000 {
+ compatible = "st,spear1310-miphy";
+ reg = <0x1000 0x100>;
+ misc = <&syscon>;
+ #phy-cells = <1>;
+ phy-id = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/phy/st-spear-miphy.txt b/Documentation/devicetree/bindings/phy/st-spear-miphy.txt
deleted file mode 100644
index 2a6bfdcc09b3..000000000000
--- a/Documentation/devicetree/bindings/phy/st-spear-miphy.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-ST SPEAr miphy DT details
-=========================
-
-ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA.
-
-Required properties:
-- compatible : should be "st,spear1310-miphy" or "st,spear1340-miphy"
-- reg : offset and length of the PHY register set.
-- misc: phandle for the syscon node to access misc registers
-- #phy-cells : from the generic PHY bindings, must be 1.
- - cell[1]: 0 if phy used for SATA, 1 for PCIe.
-
-Optional properties:
-- phy-id: Instance id of the phy. Only required when there are multiple phys
- present on a implementation.
--
2.47.2
next reply other threads:[~2025-06-07 21:27 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-07 21:26 Rob Herring (Arm) [this message]
2025-06-07 21:26 ` [PATCH] dt-bindings: phy: Convert st,spear1310-miphy to DT schema Rob Herring (Arm)
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