All of lore.kernel.org
 help / color / mirror / Atom feed
From: David Laight <david.laight.linux@gmail.com>
To: "Radim Krčmář" <rkrcmar@ventanamicro.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Atish Patra" <atishp@rivosinc.com>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Anup Patel" <apatel@ventanamicro.com>
Subject: Re: [PATCH 2/2] RISC-V: make use of variadic sbi_ecall
Date: Fri, 13 Jun 2025 11:54:59 +0100	[thread overview]
Message-ID: <20250613115459.6293f929@pumpkin> (raw)
In-Reply-To: <20250612145754.2126147-4-rkrcmar@ventanamicro.com>

On Thu, 12 Jun 2025 16:57:55 +0200
Radim Krčmář <rkrcmar@ventanamicro.com> wrote:

> The new sbi_ecall doesn't have to list all 8 arguments anymore, so only
> pass the actual numbers of arguments for each SBI function.
> 
> Trailing 0 is sometimes intentional.
...
> @@ -630,10 +630,10 @@ static int pmu_sbi_snapshot_setup(struct riscv_pmu *pmu, int cpu)
>  	if (IS_ENABLED(CONFIG_32BIT))
>  		ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_SNAPSHOT_SET_SHMEM,
>  				cpu_hw_evt->snapshot_addr_phys,
> -				(u64)(cpu_hw_evt->snapshot_addr_phys) >> 32, 0, 0, 0, 0);
> +				(u64)(cpu_hw_evt->snapshot_addr_phys) >> 32);

That doesn't look right (and other similar ones).
The values are still 64bit - so get passed as two 32bit values (in some way)
so that varargs code will get the wrong values.

I guess the previous change wasn't tested on 32bit?

	David

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: David Laight <david.laight.linux@gmail.com>
To: "Radim Krčmář" <rkrcmar@ventanamicro.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Atish Patra" <atishp@rivosinc.com>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Anup Patel" <apatel@ventanamicro.com>
Subject: Re: [PATCH 2/2] RISC-V: make use of variadic sbi_ecall
Date: Fri, 13 Jun 2025 11:54:59 +0100	[thread overview]
Message-ID: <20250613115459.6293f929@pumpkin> (raw)
In-Reply-To: <20250612145754.2126147-4-rkrcmar@ventanamicro.com>

On Thu, 12 Jun 2025 16:57:55 +0200
Radim Krčmář <rkrcmar@ventanamicro.com> wrote:

> The new sbi_ecall doesn't have to list all 8 arguments anymore, so only
> pass the actual numbers of arguments for each SBI function.
> 
> Trailing 0 is sometimes intentional.
...
> @@ -630,10 +630,10 @@ static int pmu_sbi_snapshot_setup(struct riscv_pmu *pmu, int cpu)
>  	if (IS_ENABLED(CONFIG_32BIT))
>  		ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_SNAPSHOT_SET_SHMEM,
>  				cpu_hw_evt->snapshot_addr_phys,
> -				(u64)(cpu_hw_evt->snapshot_addr_phys) >> 32, 0, 0, 0, 0);
> +				(u64)(cpu_hw_evt->snapshot_addr_phys) >> 32);

That doesn't look right (and other similar ones).
The values are still 64bit - so get passed as two 32bit values (in some way)
so that varargs code will get the wrong values.

I guess the previous change wasn't tested on 32bit?

	David

  reply	other threads:[~2025-06-13 11:31 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-12 14:57 [PATCH 0/2] RISC-V: turn sbi_ecall into a variadic macro Radim Krčmář
2025-06-12 14:57 ` Radim Krčmář
2025-06-12 14:57 ` [PATCH 1/2] RISC-V: sbi: turn sbi_ecall into " Radim Krčmář
2025-06-12 14:57   ` Radim Krčmář
2025-06-12 15:14   ` Thomas Weißschuh
2025-06-12 15:14     ` Thomas Weißschuh
2025-06-12 15:35     ` Radim Krčmář
2025-06-12 15:35       ` Radim Krčmář
2025-06-12 14:57 ` [PATCH 2/2] RISC-V: make use of variadic sbi_ecall Radim Krčmář
2025-06-12 14:57   ` Radim Krčmář
2025-06-13 10:54   ` David Laight [this message]
2025-06-13 10:54     ` David Laight
2025-06-13 14:10     ` Radim Krčmář
2025-06-13 14:10       ` Radim Krčmář
2025-06-13 15:52       ` David Laight
2025-06-13 15:52         ` David Laight
2025-06-13 17:08         ` Radim Krčmář
2025-06-13 17:08           ` Radim Krčmář

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250613115459.6293f929@pumpkin \
    --to=david.laight.linux@gmail.com \
    --cc=ajones@ventanamicro.com \
    --cc=alex@ghiti.fr \
    --cc=aou@eecs.berkeley.edu \
    --cc=apatel@ventanamicro.com \
    --cc=atishp@rivosinc.com \
    --cc=cleger@rivosinc.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=rkrcmar@ventanamicro.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.