[PATCH 0/8] (no cover subject)

[PATCH 0/8] (no cover subject)

[Alice Guo (OSS)]

imx: update the building bootloader image related part for
i.MX8QXP, i.MX8QM and i.MX95 B0.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
---
Alice Guo (6):
      tools: imx8image: Fix the value passed to dcd_skip of build_container()
      arm: mach-imx: Change to use IMX_CONTAINER_CFG to specify i.MX8 container config file
      imx: imx8qxp: update packing i.MX8QXP MEK flash.bin
      imx: imx8qm: update packing i.MX8QM MEK flash.bin
      tools: imx8image: Add 2 new commands CMD_CNTR_VERSION and CMD_DUMMY_DDR
      imx95_evk: Add i.MX95 B0 support

Ye Li (2):
      arm: imx: Update ELE get_info structure for i.MX94
      spl: imx: Add support for new PQC container

 arch/arm/dts/imx8qm-u-boot.dtsi                 | 38 ++++------------
 arch/arm/dts/imx8qxp-u-boot.dtsi                | 40 ++++-------------
 arch/arm/dts/imx95-u-boot.dtsi                  |  8 ++--
 arch/arm/include/asm/mach-imx/ele_api.h         |  2 +
 arch/arm/mach-imx/Makefile                      |  2 +-
 arch/arm/mach-imx/image-container.c             |  2 +-
 arch/arm/mach-imx/imx9/Kconfig                  |  1 +
 arch/arm/mach-imx/imx9/scmi/container.cfg       |  1 +
 arch/arm/mach-imx/imx9/scmi/imximage.cfg        |  5 ++-
 board/freescale/imx8qm_mek/imximage.cfg         |  1 +
 board/freescale/imx8qm_mek/uboot-container.cfg  |  2 +-
 board/freescale/imx8qxp_mek/imximage.cfg        |  1 +
 board/freescale/imx8qxp_mek/uboot-container.cfg |  2 +-
 common/spl/Kconfig                              |  7 +++
 configs/imx8qm_mek_defconfig                    |  1 +
 configs/imx8qxp_mek_defconfig                   |  1 +
 doc/board/nxp/imx95_evk.rst                     | 12 ++---
 include/imx8image.h                             |  6 +++
 include/imx_container.h                         | 11 +++++
 tools/imx8image.c                               | 59 +++++++++++++++++++------
 20 files changed, 112 insertions(+), 90 deletions(-)
---
base-commit: 17012e3068d047ad71460f039eeb0c3be63f82a0
change-id: 20250618-binman-a97471ee9e36

Best regards,
-- 
Alice Guo <alice.guo@oss.nxp.com>

[PATCH v1 1/8] tools: imx8image: Fix the value passed to dcd_skip of build_container()

[Alice Guo (OSS)]

From: Alice Guo <alice.guo@nxp.com>

The value passed to dcd_skip of build_container() should be obtained by
parsing .cfg file, and should not be fixed to false. For i.MX8QXP, dcd
data needs to be skipped, in which case dcd_skip should be true.

Fixes: 5f28a6599f01("tools: imx8image: add i.MX95 support")

Signed-off-by: Alice Guo <alice.guo@nxp.com>
---
 tools/imx8image.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/imx8image.c b/tools/imx8image.c
index a333ded46e2..cad55fd3cf2 100644
--- a/tools/imx8image.c
+++ b/tools/imx8image.c
@@ -1146,7 +1146,7 @@ int imx8image_copy_image(int outfd, struct image_tool_params *mparams)
 	fprintf(stdout, "CONTAINER SW VERSION:\t0x%04x\n", sw_version);
 
 	build_container(soc, sector_size, emmc_fastboot,
-			img_sp, false, fuse_version, sw_version, outfd);
+			img_sp, dcd_skip, fuse_version, sw_version, outfd);
 
 	return 0;
 }

-- 
2.43.0

[PATCH v1 2/8] arm: mach-imx: Change to use IMX_CONTAINER_CFG to specify i.MX8 container config file

[Alice Guo (OSS)]

From: Alice Guo <alice.guo@nxp.com>

CONFIG_IMX_CONTAINER_CFG="xxx" specifies i.MX8 container config file
which is used to pack u-boot container.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
---
 arch/arm/mach-imx/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 8bd85e889ab..6d68b0c635e 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -131,7 +131,7 @@ IMAGE_TYPE := imx8image
 ifeq ($(CONFIG_XPL_BUILD),y)
 SPL_DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o spl/u-boot-spl.cfgout $(srctree)/$(IMX_CONFIG); if [ -f spl/u-boot-spl.cfgout ]; then $(CNTR_DEPFILES) spl/u-boot-spl.cfgout; echo $$?; fi)
 endif
-DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o u-boot-dtb.cfgout $(srctree)/$(IMX_CONFIG); if [ -f u-boot-dtb.cfgout ]; then $(CNTR_DEPFILES) u-boot-dtb.cfgout; echo $$?; fi)
+DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o u-boot-dtb.cfgout $(srctree)/$(IMX_CONTAINER_CFG); if [ -f u-boot-dtb.cfgout ]; then $(CNTR_DEPFILES) u-boot-dtb.cfgout; echo $$?; fi)
 else ifeq ($(CONFIG_ARCH_IMX8M), y)
 IMAGE_TYPE := imx8mimage
 DEPFILE_EXISTS := 0

-- 
2.43.0

[PATCH v1 3/8] imx: imx8qxp: update packing i.MX8QXP MEK flash.bin

[Alice Guo (OSS)]

From: Alice Guo <alice.guo@nxp.com>

Using this patch, a bootable flash.bin can be generated. It contains
seco container image, scfw image, u-boot-spl.bin, atf and u-boot.bin.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
---
 arch/arm/dts/imx8qxp-u-boot.dtsi                | 40 ++++++-------------------
 board/freescale/imx8qxp_mek/imximage.cfg        |  1 +
 board/freescale/imx8qxp_mek/uboot-container.cfg |  2 +-
 configs/imx8qxp_mek_defconfig                   |  1 +
 4 files changed, 12 insertions(+), 32 deletions(-)

diff --git a/arch/arm/dts/imx8qxp-u-boot.dtsi b/arch/arm/dts/imx8qxp-u-boot.dtsi
index 8058caae9ba..06b697cd732 100644
--- a/arch/arm/dts/imx8qxp-u-boot.dtsi
+++ b/arch/arm/dts/imx8qxp-u-boot.dtsi
@@ -10,32 +10,6 @@
 };
 
 &binman {
-#ifdef CONFIG_XPL_BUILD
-	u-boot-spl-ddr {
-		align = <4>;
-		align-size = <4>;
-		filename = "u-boot-spl-ddr.bin";
-		pad-byte = <0xff>;
-
-		u-boot-spl {
-			align-end = <4>;
-			filename = "u-boot-spl.bin";
-		};
-	};
-
-	spl {
-		filename = "spl.bin";
-
-		mkimage {
-			args = "-n spl/u-boot-spl.cfgout -T imx8image -e 0x100000";
-
-			blob {
-				filename = "u-boot-spl-ddr.bin";
-			};
-		};
-	};
-#endif
-
 	itb {
 		filename = "u-boot.itb";
 
@@ -120,16 +94,20 @@
 		};
 	};
 
-#ifdef CONFIG_XPL_BUILD
 	imx-boot {
 		filename = "flash.bin";
 		pad-byte = <0x00>;
 
 		spl {
-			filename = "spl.bin";
-			offset = <0x0>;
-			type = "blob-ext";
+			align = <0x400>;
+			align-size = <0x400>;
+			type = "mkimage";
+			args = "-n spl/u-boot-spl.cfgout -T imx8image";
+		};
+
+		u-boot {
+			type = "mkimage";
+			args = "-n u-boot-dtb.cfgout -T imx8image";
 		};
 	};
-#endif
 };
diff --git a/board/freescale/imx8qxp_mek/imximage.cfg b/board/freescale/imx8qxp_mek/imximage.cfg
index 88d6955a9ef..cc21a8c3491 100644
--- a/board/freescale/imx8qxp_mek/imximage.cfg
+++ b/board/freescale/imx8qxp_mek/imximage.cfg
@@ -8,6 +8,7 @@
 
 
 BOOT_FROM	sd
+DCD_SKIP true
 /* SoC type IMX8QX */
 SOC_TYPE IMX8QX
 /* Append seco container image */
diff --git a/board/freescale/imx8qxp_mek/uboot-container.cfg b/board/freescale/imx8qxp_mek/uboot-container.cfg
index b481c98f929..9e550a99e9e 100644
--- a/board/freescale/imx8qxp_mek/uboot-container.cfg
+++ b/board/freescale/imx8qxp_mek/uboot-container.cfg
@@ -9,4 +9,4 @@ BOOT_FROM SD 0x400
 SOC_TYPE IMX8QX
 CONTAINER
 IMAGE A35 bl31.bin	0x80000000
-IMAGE A35 u-boot.bin	CONFIG_TEXT_BASE
+IMAGE A35 u-boot.bin	0x80020000
diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig
index fa36b7b77a1..1120bac752c 100644
--- a/configs/imx8qxp_mek_defconfig
+++ b/configs/imx8qxp_mek_defconfig
@@ -43,6 +43,7 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
 CONFIG_SPL_LOAD_IMX_CONTAINER=y
+CONFIG_IMX_CONFIG="board/freescale/imx8qxp_mek/imximage.cfg"
 CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg"
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set

-- 
2.43.0

[PATCH v1 4/8] imx: imx8qm: update packing i.MX8QM MEK flash.bin

[Alice Guo (OSS)]

From: Alice Guo <alice.guo@nxp.com>

Using this patch, a bootable flash.bin can be generated. It contains
seco container image, scfw image, u-boot-spl.bin, atf and u-boot.bin.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
---
 arch/arm/dts/imx8qm-u-boot.dtsi                | 38 ++++++--------------------
 board/freescale/imx8qm_mek/imximage.cfg        |  1 +
 board/freescale/imx8qm_mek/uboot-container.cfg |  2 +-
 configs/imx8qm_mek_defconfig                   |  1 +
 4 files changed, 12 insertions(+), 30 deletions(-)

diff --git a/arch/arm/dts/imx8qm-u-boot.dtsi b/arch/arm/dts/imx8qm-u-boot.dtsi
index af229501a4d..85ddcc38993 100644
--- a/arch/arm/dts/imx8qm-u-boot.dtsi
+++ b/arch/arm/dts/imx8qm-u-boot.dtsi
@@ -10,32 +10,6 @@
 };
 
 &binman {
-#ifdef CONFIG_XPL_BUILD
-	u-boot-spl-ddr {
-		align = <4>;
-		align-size = <4>;
-		filename = "u-boot-spl-ddr.bin";
-		pad-byte = <0xff>;
-
-		u-boot-spl {
-			align-end = <4>;
-			filename = "u-boot-spl.bin";
-		};
-	};
-
-	spl {
-		filename = "spl.bin";
-
-		mkimage {
-			args = "-n spl/u-boot-spl.cfgout -T imx8image -e 0x100000";
-
-			blob {
-				filename = "u-boot-spl-ddr.bin";
-			};
-		};
-	};
-#endif
-
 	itb {
 		filename = "u-boot.itb";
 
@@ -127,9 +101,15 @@
 		pad-byte = <0x00>;
 
 		spl {
-			filename = "spl.bin";
-			offset = <0x0>;
-			type = "blob-ext";
+			align = <0x400>;
+			align-size = <0x400>;
+			type = "mkimage";
+			args = "-n spl/u-boot-spl.cfgout -T imx8image";
+		};
+
+		u-boot {
+			type = "mkimage";
+			args = "-n u-boot-dtb.cfgout -T imx8image";
 		};
 	};
 };
diff --git a/board/freescale/imx8qm_mek/imximage.cfg b/board/freescale/imx8qm_mek/imximage.cfg
index 71612678c99..bead3a90d3c 100644
--- a/board/freescale/imx8qm_mek/imximage.cfg
+++ b/board/freescale/imx8qm_mek/imximage.cfg
@@ -6,6 +6,7 @@
 
 /* Boot from SD, sector size 0x400 */
 BOOT_FROM SD 0x400
+DCD_SKIP true
 /* SoC type IMX8QM */
 SOC_TYPE IMX8QM
 /* Append seco container image */
diff --git a/board/freescale/imx8qm_mek/uboot-container.cfg b/board/freescale/imx8qm_mek/uboot-container.cfg
index e25aa76fe18..2bc6e5ba572 100644
--- a/board/freescale/imx8qm_mek/uboot-container.cfg
+++ b/board/freescale/imx8qm_mek/uboot-container.cfg
@@ -9,4 +9,4 @@ BOOT_FROM SD 0x400
 SOC_TYPE IMX8QM
 CONTAINER
 IMAGE A35 bl31.bin	0x80000000
-IMAGE A35 u-boot.bin	CONFIG_TEXT_BASE
+IMAGE A35 u-boot.bin	0x80020000
diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig
index afcb0f30594..6cfe840ba6b 100644
--- a/configs/imx8qm_mek_defconfig
+++ b/configs/imx8qm_mek_defconfig
@@ -42,6 +42,7 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
 CONFIG_SPL_LOAD_IMX_CONTAINER=y
+CONFIG_IMX_CONFIG="board/freescale/imx8qm_mek/imximage.cfg"
 CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg"
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set

-- 
2.43.0

[PATCH v1 5/8] arm: imx: Update ELE get_info structure for i.MX94

[Alice Guo (OSS)]

From: Ye Li <ye.li@nxp.com>

Since i.MX94, the ELE get_info structure is updated to add
OEM PQC SRK hash, so update it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/include/asm/mach-imx/ele_api.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/include/asm/mach-imx/ele_api.h b/arch/arm/include/asm/mach-imx/ele_api.h
index 19d12696a1e..64b243dcaaa 100644
--- a/arch/arm/include/asm/mach-imx/ele_api.h
+++ b/arch/arm/include/asm/mach-imx/ele_api.h
@@ -134,6 +134,8 @@ struct ele_get_info_data {
 	u32 sha_fw[8];
 	u32 oem_srkh[16];
 	u32 state;
+	u32 oem_pqc_srkh[16];
+	u32 reserved[8];
 };
 
 int ele_release_rdc(u8 core_id, u8 xrdc, u32 *response);

-- 
2.43.0

[PATCH v1 6/8] tools: imx8image: Add 2 new commands CMD_CNTR_VERSION and CMD_DUMMY_DDR

[Alice Guo (OSS)]

From: Alice Guo <alice.guo@nxp.com>

i.MX95 B0 uses image container format v2, and `one container header
occupies 0x4000, so that CMD_CNTR_VERSION needs to be added.

The purpose of CMD_DUMMY_DDR is to create a dummy image entry in boot
container prior the DDR OEI image entry. ROM reads the address of DUMMY
DDR image entry and passes it to DDR OEI in OEI entry function as
parameter value, in order to indicate the offset of training data with
the boot container.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
---
 include/imx8image.h |  6 ++++++
 tools/imx8image.c   | 57 +++++++++++++++++++++++++++++++++++++++++------------
 2 files changed, 50 insertions(+), 13 deletions(-)

diff --git a/include/imx8image.h b/include/imx8image.h
index e0d25c5b6c9..d0e05811ff9 100644
--- a/include/imx8image.h
+++ b/include/imx8image.h
@@ -45,6 +45,7 @@
 #define DCD_ENTRY_ADDR_IN_SCFW		0x240
 
 #define CONTAINER_ALIGNMENT		0x400
+#define CONTAINER_PQC_ALIGNMENT		0x4000
 #define CONTAINER_FLAGS_DEFAULT		0x10
 #define CONTAINER_FUSE_DEFAULT		0x0
 
@@ -160,6 +161,8 @@ enum imx8image_cmd {
 	CMD_DATA,
 	CMD_DUMMY_V2X,
 	CMD_HOLD,
+	CMD_CNTR_VERSION,
+	CMD_DUMMY_DDR,
 };
 
 enum imx8image_core_type {
@@ -216,6 +219,8 @@ typedef enum option_type {
 	OEI,
 	DUMMY_V2X,
 	HOLD,
+	CNTR_VERSION,
+	DUMMY_DDR,
 } option_type_t;
 
 typedef struct {
@@ -262,6 +267,7 @@ typedef struct {
 #define IMG_TYPE_SENTINEL 0x06	/* SENTINEL image type */
 #define IMG_TYPE_PROV    0x07   /* Provisioning image type */
 #define IMG_TYPE_DEK     0x08   /* DEK validation type */
+#define IMG_TYPE_DDR_DUMMY 0x0D /* DDR training data dummy entry */
 #define IMG_TYPE_V2X_DUMMY 0x0E /* V2X Dummy image */
 
 #define IMG_TYPE_SHIFT   0
diff --git a/tools/imx8image.c b/tools/imx8image.c
index cad55fd3cf2..5a76643c06e 100644
--- a/tools/imx8image.c
+++ b/tools/imx8image.c
@@ -19,6 +19,7 @@ static bool dcd_skip;
 static image_t param_stack[IMG_STACK_SIZE];
 static uint8_t fuse_version;
 static uint16_t sw_version;
+static uint8_t cntr_version;
 static uint32_t custom_partition;
 static uint32_t scfw_flags;
 
@@ -57,6 +58,8 @@ static table_entry_t imx8image_cmds[] = {
 	{CMD_DATA,              "DATA",                 "new data",           },
 	{CMD_DUMMY_V2X,         "DUMMY_V2X",            "v2x",                },
 	{CMD_HOLD,              "HOLD",                 "hold",               },
+	{CMD_CNTR_VERSION,      "CNTR_VERSION",         "cntr version",       },
+	{CMD_DUMMY_DDR,         "DUMMY_DDR",            "ddr",                },
 	{-1,                    "",                     "",	              }
 };
 
@@ -157,6 +160,10 @@ static void parse_cfg_cmd(image_t *param_stack, int32_t cmd, char *token,
 		param_stack[p_idx].option = HOLD;
 		param_stack[p_idx].entry = (uint32_t)strtoll(token, NULL, 0);
 		param_stack[p_idx++].filename = NULL;
+		break;
+	case CMD_CNTR_VERSION:
+		cntr_version = (uint8_t)(strtoll(token, NULL, 0) & 0xFF);
+		break;
 	default:
 		break;
 	}
@@ -177,6 +184,8 @@ static void parse_cfg_fld(image_t *param_stack, int32_t *cmd, char *token,
 		if (*cmd == CMD_CONTAINER) {
 			fprintf(stdout, "New Container: \t%d\n", ++container);
 			param_stack[p_idx++].option = NEW_CONTAINER;
+		} else if (*cmd == CMD_DUMMY_DDR) {
+			param_stack[p_idx++].option = DUMMY_DDR;
 		}
 		break;
 	case CFG_CORE_TYPE:
@@ -588,7 +597,8 @@ static void set_image_array_entry(flash_header_v3_t *container,
 	img->offset = offset;  /* Is re-adjusted later */
 	img->size = size;
 
-	if (type != DUMMY_V2X) {
+	/* skip hash generation here if dummy image */
+	if (type != DUMMY_V2X && type != DUMMY_DDR) {
 		set_image_hash(img, tmp_filename, IMAGE_HASH_ALGO_DEFAULT);
 	}
 
@@ -632,6 +642,15 @@ static void set_image_array_entry(flash_header_v3_t *container,
 		img->entry = entry;
 		img->meta = meta;
 		custom_partition = 0;
+
+		if (container->num_images) {
+			/* if at least 2 images in container, [0] and [1] */
+			boot_img_t *ddr_dummy = &container->img[container->num_images - 1];
+			if ((ddr_dummy->hab_flags & 0x0F) == IMG_TYPE_DDR_DUMMY) {
+				ddr_dummy->offset = img->offset + img->size;
+				set_image_hash(ddr_dummy, "/dev/null", IMAGE_HASH_ALGO_DEFAULT);
+			}
+		}
 		break;
 	case AP:
 		if (soc == QX && core == CORE_CA35) {
@@ -751,6 +770,11 @@ static void set_image_array_entry(flash_header_v3_t *container,
 		img->entry = entry;
 		img->size = 0; /* dummy image has no size */
 		break;
+	case DUMMY_DDR:
+		img->hab_flags |= IMG_TYPE_DDR_DUMMY;
+		tmp_name = "DDR Dummy";
+		img->size = 0; /* dummy image has no size */
+		break;
 	default:
 		fprintf(stderr, "unrecognized image type (%d)\n", type);
 		exit(EXIT_FAILURE);
@@ -776,22 +800,27 @@ void set_container(flash_header_v3_t *container,  uint16_t sw_version,
 static int get_container_image_start_pos(image_t *image_stack, uint32_t align, uint32_t *v2x)
 {
 	image_t *img_sp = image_stack;
-	/*8K total container header*/
-	int file_off = CONTAINER_IMAGE_ARRAY_START_OFFSET;
+	/*
+	 * 8K total container header for legacy container, for version 2
+	 * container, the total container header is 0x4000 * 3 = 0xC000.
+	 */
+	int file_off = cntr_version ? 0xC000 : CONTAINER_IMAGE_ARRAY_START_OFFSET;
+	size_t size = cntr_version ? SZ_32K : SZ_4K;
+	uint32_t cntr_header_len = cntr_version ? CONTAINER_PQC_ALIGNMENT : FIRST_CONTAINER_HEADER_LENGTH;
 	FILE *fd = NULL;
 	flash_header_v3_t *header;
 	flash_header_v3_t *header2;
 	void *p;
 	int ret;
 
-	p = calloc(1, SZ_4K);
+	p = calloc(1, size);
 	if (!p) {
-		fprintf(stderr, "Fail to alloc 4K memory\n");
+		fprintf(stderr, "Fail to alloc %lx memory\n", size);
 		exit(EXIT_FAILURE);
 	}
 
 	header = p;
-	header2 = p + FIRST_CONTAINER_HEADER_LENGTH;
+	header2 = p + cntr_header_len;
 
 	while (img_sp->option != NO_IMG) {
 		if (img_sp->option == APPEND) {
@@ -801,7 +830,7 @@ static int get_container_image_start_pos(image_t *image_stack, uint32_t align, u
 				exit(EXIT_FAILURE);
 			}
 
-			ret = fread(header, SZ_4K, 1, fd);
+			ret = fread(header, size, 1, fd);
 			if (ret != 1) {
 				printf("Failure Read header %d\n", ret);
 				exit(EXIT_FAILURE);
@@ -813,11 +842,11 @@ static int get_container_image_start_pos(image_t *image_stack, uint32_t align, u
 				fprintf(stderr, "header tag mismatched \n");
 				exit(EXIT_FAILURE);
 			} else {
-				if (header2->tag != IVT_HEADER_TAG_B0) {
+				if ((header2->tag != IVT_HEADER_TAG_B0) && (header2->tag != 0x82)) {
 					file_off += header->img[header->num_images - 1].size;
 					file_off = ALIGN(file_off, align);
 				} else {
-					file_off = header2->img[header2->num_images - 1].offset + FIRST_CONTAINER_HEADER_LENGTH;
+					file_off = header2->img[header2->num_images - 1].offset + cntr_header_len;
 					file_off += header2->img[header2->num_images - 1].size;
 					file_off = ALIGN(file_off, align);
 					fprintf(stderr, "Has 2nd container %x\n", file_off);
@@ -839,7 +868,7 @@ static void set_imx_hdr_v3(imx_header_v3_t *imxhdr, uint32_t cont_id)
 
 	/* Set magic number, Only >= B0 supported */
 	fhdr_v3->tag = IVT_HEADER_TAG_B0;
-	fhdr_v3->version = IVT_VERSION_B0;
+	fhdr_v3->version = cntr_version ? 0x2 : IVT_VERSION_B0;
 }
 
 static uint8_t *flatten_container_header(imx_header_v3_t *imx_header,
@@ -921,6 +950,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 	char *tmp_filename = NULL;
 	uint32_t size = 0;
 	uint32_t file_padding = 0;
+	uint32_t cntr_header_len = cntr_version ? CONTAINER_PQC_ALIGNMENT : FIRST_CONTAINER_HEADER_LENGTH;
 	uint32_t v2x = false;
 	int ret;
 
@@ -978,6 +1008,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 			break;
 
 		case DUMMY_V2X:
+		case DUMMY_DDR:
 			if (container < 0) {
 				fprintf(stderr, "No container found\n");
 				exit(EXIT_FAILURE);
@@ -1023,7 +1054,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 		case NEW_CONTAINER:
 			container++;
 			set_container(&imx_header.fhdr[container], sw_version,
-				      CONTAINER_ALIGNMENT,
+				      cntr_version ? CONTAINER_PQC_ALIGNMENT : CONTAINER_ALIGNMENT,
 				      CONTAINER_FLAGS_DEFAULT,
 				      fuse_version);
 			scfw_flags = 0;
@@ -1073,9 +1104,9 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 		if (img_sp->option == APPEND) {
 			copy_file(ofd, img_sp->filename, 0, 0);
 			if (v2x)
-				file_padding += FIRST_CONTAINER_HEADER_LENGTH * 2;
+				file_padding += cntr_header_len * 2;
 			else
-				file_padding += FIRST_CONTAINER_HEADER_LENGTH;
+				file_padding += cntr_header_len;
 		}
 		img_sp++;
 	} while (img_sp->option != NO_IMG);

-- 
2.43.0

[PATCH v1 7/8] spl: imx: Add support for new PQC container

[Alice Guo (OSS)]

From: Ye Li <ye.li@nxp.com>

To support PQC container format which is used for post quantum
authentication on new i.MX parts like i.MX94

The major changes compared to legacy container format is in
signature block, new container tag and version, and new alignment
of container header.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/image-container.c |  2 +-
 common/spl/Kconfig                  |  7 +++++++
 include/imx_container.h             | 11 +++++++++++
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/image-container.c b/arch/arm/mach-imx/image-container.c
index f84e23f4b2a..3a9e6dcf225 100644
--- a/arch/arm/mach-imx/image-container.c
+++ b/arch/arm/mach-imx/image-container.c
@@ -66,7 +66,7 @@ static bool is_v2x_fw_container(ulong addr)
 	struct boot_img_t *img_entry;
 
 	phdr = (struct container_hdr *)addr;
-	if (phdr->tag != 0x87 || phdr->version != 0x0) {
+	if ((phdr->tag != 0x87 && phdr->tag != 0x82) || phdr->version != 0x0) {
 		debug("Wrong container header\n");
 		return false;
 	}
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 77cf04d38ed..5d2e0b4ec4b 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -370,6 +370,13 @@ config SPL_IMX_CONTAINER_USE_TRAMPOLINE
 	help
 	  Enable SPL load reader to load data to a trampoline buffer.
 
+config IMX_PQC_SUPPORT
+	bool "Enable to support i.MX ROM PQC Container"
+	depends on SPL && SPL_LOAD_IMX_CONTAINER
+	help
+	  Support i.MX ROM new PQC container format. If your chip does not use
+	  PQC container, say 'n'.
+
 config IMX_CONTAINER_CFG
 	string "i.MX8 Container config file"
 	depends on SPL && SPL_LOAD_IMX_CONTAINER
diff --git a/include/imx_container.h b/include/imx_container.h
index 691c764b3e5..684fc3bc988 100644
--- a/include/imx_container.h
+++ b/include/imx_container.h
@@ -12,7 +12,11 @@
 #define IV_MAX_LEN			32
 #define HASH_MAX_LEN			64
 
+#if IS_ENABLED(CONFIG_IMX_PQC_SUPPORT)
+#define CONTAINER_HDR_ALIGNMENT 0x4000
+#else
 #define CONTAINER_HDR_ALIGNMENT 0x400
+#endif
 #define CONTAINER_HDR_EMMC_OFFSET 0
 #define CONTAINER_HDR_MMCSD_OFFSET SZ_32K
 #define CONTAINER_HDR_QSPI_OFFSET SZ_4K
@@ -72,7 +76,14 @@ int get_container_size(ulong addr, u16 *header_length);
 
 static inline bool valid_container_hdr(struct container_hdr *container)
 {
+#if IS_ENABLED(CONFIG_IMX_PQC_SUPPORT)
+	return (container->tag == CONTAINER_HDR_TAG ||
+		container->tag == 0x82) &&
+		(container->version == CONTAINER_HDR_VERSION ||
+		 container->version == 0x2);
+#else
 	return container->tag == CONTAINER_HDR_TAG &&
 	       container->version == CONTAINER_HDR_VERSION;
+#endif
 }
 #endif

-- 
2.43.0

[PATCH v1 8/8] imx95_evk: Add i.MX95 B0 support

[Alice Guo (OSS)]

From: Alice Guo <alice.guo@nxp.com>

i.MX95 B0 uses image container format v2 and needs DUMMY_DDR so that
update imximage.cfg and container.cfg for it.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
---
 arch/arm/dts/imx95-u-boot.dtsi            |  8 ++++----
 arch/arm/mach-imx/imx9/Kconfig            |  1 +
 arch/arm/mach-imx/imx9/scmi/container.cfg |  1 +
 arch/arm/mach-imx/imx9/scmi/imximage.cfg  |  5 +++--
 doc/board/nxp/imx95_evk.rst               | 12 ++++++------
 5 files changed, 15 insertions(+), 12 deletions(-)

diff --git a/arch/arm/dts/imx95-u-boot.dtsi b/arch/arm/dts/imx95-u-boot.dtsi
index 5ec3b1c51d6..9bf8f9834c9 100644
--- a/arch/arm/dts/imx95-u-boot.dtsi
+++ b/arch/arm/dts/imx95-u-boot.dtsi
@@ -22,12 +22,12 @@
 				type = "nxp-header-ddrfw";
 
 				imx-lpddr-imem {
-					filename = "lpddr5_imem_v202311.bin";
+					filename = "lpddr5_imem_v202409.bin";
 					type = "blob-ext";
 				};
 
 				imx-lpddr-dmem {
-					filename = "lpddr5_dmem_v202311.bin";
+					filename = "lpddr5_dmem_v202409.bin";
 					type = "blob-ext";
 				};
 			};
@@ -36,12 +36,12 @@
 				type = "nxp-header-ddrfw";
 
 				imx-lpddr-imem-qb {
-					filename = "lpddr5_imem_qb_v202311.bin";
+					filename = "lpddr5_imem_qb_v202409.bin";
 					type = "blob-ext";
 				};
 
 				imx-lpddr-dmem-qb {
-					filename = "lpddr5_dmem_qb_v202311.bin";
+					filename = "lpddr5_dmem_qb_v202409.bin";
 					type = "blob-ext";
 				};
 			};
diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig
index 280d255c086..81f75b92bbb 100644
--- a/arch/arm/mach-imx/imx9/Kconfig
+++ b/arch/arm/mach-imx/imx9/Kconfig
@@ -31,6 +31,7 @@ config IMX95
 	select DM_MAILBOX
 	select SCMI_FIRMWARE
 	select SPL_IMX_CONTAINER_USE_TRAMPOLINE
+	select IMX_PQC_SUPPORT
 
 config SYS_SOC
 	default "imx9"
diff --git a/arch/arm/mach-imx/imx9/scmi/container.cfg b/arch/arm/mach-imx/imx9/scmi/container.cfg
index 441d9beedd1..b25f3b726c5 100644
--- a/arch/arm/mach-imx/imx9/scmi/container.cfg
+++ b/arch/arm/mach-imx/imx9/scmi/container.cfg
@@ -3,6 +3,7 @@
  * Copyright 2025 NXP
  */
 
+CNTR_VERSION 2
 BOOT_FROM SD
 SOC_TYPE IMX9
 CONTAINER
diff --git a/arch/arm/mach-imx/imx9/scmi/imximage.cfg b/arch/arm/mach-imx/imx9/scmi/imximage.cfg
index 6af1c4ba628..c2c92174c1c 100644
--- a/arch/arm/mach-imx/imx9/scmi/imximage.cfg
+++ b/arch/arm/mach-imx/imx9/scmi/imximage.cfg
@@ -3,13 +3,14 @@
  * Copyright 2025 NXP
  */
 
+CNTR_VERSION 2
 BOOT_FROM SD
 SOC_TYPE IMX9
-APPEND mx95a0-ahab-container.img
+APPEND mx95b0-ahab-container.img
 CONTAINER
+DUMMY_DDR
 IMAGE OEI m33-oei-ddrfw.bin 0x1ffc0000
 HOLD 0x10000
-IMAGE OEI oei-m33-tcm.bin 0x1ffc0000
 IMAGE M33 m33_image.bin 0x1ffc0000
 IMAGE A55 spl/u-boot-spl.bin 0x20480000
 DUMMY_V2X 0x8b000000
diff --git a/doc/board/nxp/imx95_evk.rst b/doc/board/nxp/imx95_evk.rst
index 9121f7561ab..27cd15eb7c9 100644
--- a/doc/board/nxp/imx95_evk.rst
+++ b/doc/board/nxp/imx95_evk.rst
@@ -23,9 +23,9 @@ Note: srctree is U-Boot source directory
 
 .. code-block:: bash
 
-   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-1.3.0-17945fc.bin
-   $ sh firmware-ele-imx-1.3.0-17945fc.bin --auto-accept
-   $ cp firmware-ele-imx-1.3.0-17945fc/mx95a0-ahab-container.img $(srctree)
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-2.0.2-89161a8.bin
+   $ sh firmware-ele-imx-2.0.2-89161a8.bin --auto-accept
+   $ cp firmware-ele-imx-2.0.2-89161a8/mx95b0-ahab-container.img $(srctree)
 
 Get DDR PHY Firmware Images
 --------------------------------------
@@ -34,9 +34,9 @@ Note: srctree is U-Boot source directory
 
 .. code-block:: bash
 
-   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.26-d4c33ab.bin
-   $ sh firmware-imx-8.26-d4c33ab.bin --auto-accept
-   $ cp firmware-imx-8.26-d4c33ab/firmware/ddr/synopsys/lpddr5*v202311.bin $(srctree)
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.28-994fa14.bin
+   $ sh firmware-imx-8.28-994fa14.bin --auto-accept
+   $ cp firmware-imx-8.28-994fa14/firmware/ddr/synopsys/lpddr5*v202409.bin $(srctree)
 
 Get and Build OEI Images
 --------------------------------------

-- 
2.43.0

Re: [PATCH v1 3/8] imx: imx8qxp: update packing i.MX8QXP MEK flash.bin

[Francesco Dolcini]

Hello Alice,

On Wed, Jun 18, 2025 at 03:30:16PM +0800, Alice Guo (OSS) wrote:
> From: Alice Guo <alice.guo@nxp.com>
> 
> Using this patch, a bootable flash.bin can be generated. It contains
> seco container image, scfw image, u-boot-spl.bin, atf and u-boot.bin.
> 
> Signed-off-by: Alice Guo <alice.guo@nxp.com>

Do also colibri-imx8x needs updates? Or that's not the case? If yes it
should be part of this series.

Francesco

Re: [PATCH v1 4/8] imx: imx8qm: update packing i.MX8QM MEK flash.bin

[Francesco Dolcini]

On Wed, Jun 18, 2025 at 03:30:17PM +0800, Alice Guo (OSS) wrote:
> From: Alice Guo <alice.guo@nxp.com>
> 
> Using this patch, a bootable flash.bin can be generated. It contains
> seco container image, scfw image, u-boot-spl.bin, atf and u-boot.bin.
> 
> Signed-off-by: Alice Guo <alice.guo@nxp.com>

Do also apalis-imx8 needs updates? Or that's not the case? If yes it
should be part of this series.

Thanks,
Francesco

Re: [PATCH 0/8] (no cover subject)

[Fabio Estevam]

On Wed, Jun 18, 2025 at 4:30 AM Alice Guo (OSS) <alice.guo@oss.nxp.com> wrote:
>
> imx: update the building bootloader image related part for
> i.MX8QXP, i.MX8QM and i.MX95 B0.

This way it is written above it looks like a cleanup, but if I
understand correctly, there was a bug report from Enric, so should
this entire series target master as a bug fix?

Francesco brought a good point: are other imx8qxp/qm boards affected?
Could you make the fix to all boards?

回复: [PATCH 0/8] (no cover subject)

[Alice Guo (OSS)]

> -----邮件原件-----
> 发件人: Fabio Estevam <festevam@gmail.com>
> 发送时间: 2025年6月20日 9:02
> 收件人: Alice Guo (OSS) <alice.guo@oss.nxp.com>
> 抄送: Tom Rini <trini@konsulko.com>; Alice Guo <alice.guo@nxp.com>;
> Stefano Babic <sbabic@nabladev.com>; dl-uboot-imx <uboot-imx@nxp.com>;
> Peng Fan <peng.fan@nxp.com>; u-boot@lists.denx.de; Enric Balletbo i Serra
> <eballetb@redhat.com>; Ye Li <ye.li@nxp.com>; Jacky Bai
> <ping.bai@nxp.com>; Francesco Dolcini <francesco.dolcini@toradex.com>
> 主题: Re: [PATCH 0/8] (no cover subject)
> 
> On Wed, Jun 18, 2025 at 4:30 AM Alice Guo (OSS) <alice.guo@oss.nxp.com>
> wrote:
> >
> > imx: update the building bootloader image related part for i.MX8QXP,
> > i.MX8QM and i.MX95 B0.
> 
> This way it is written above it looks like a cleanup, but if I understand correctly,
> there was a bug report from Enric, so should this entire series target master as a
> bug fix?

Hi Fabio,

When checking the bug Enric reported, I found that there were some code that needed to be modified in packing i.MX8QXP/8QM flash.bin.
Patches for i.MX95 B0 are based on them. So, I made this patch set including a bug fix for the issue Enric reported, cleanup for i.MX8QXP
MEK/i.MX8QM MEK/i.MX95 B0. Should I separate them?

> Francesco brought a good point: are other imx8qxp/qm boards affected?
> Could you make the fix to all boards?

I will try to make the fix to all boards later.

Best Regards,
Alice Guo

回复: [PATCH v1 4/8] imx: imx8qm: update packing i.MX8QM MEK flash.bin

[Alice Guo (OSS)]

> -----邮件原件-----
> 发件人: Francesco Dolcini <francesco@dolcini.it>
> 发送时间: 2025年6月18日 16:02
> 收件人: Alice Guo (OSS) <alice.guo@oss.nxp.com>
> 抄送: Tom Rini <trini@konsulko.com>; Alice Guo <alice.guo@nxp.com>;
> Stefano Babic <sbabic@nabladev.com>; Fabio Estevam <festevam@gmail.com>;
> dl-uboot-imx <uboot-imx@nxp.com>; Peng Fan <peng.fan@nxp.com>;
> u-boot@lists.denx.de; Enric Balletbo i Serra <eballetb@redhat.com>
> 主题: Re: [PATCH v1 4/8] imx: imx8qm: update packing i.MX8QM MEK flash.bin
> 
> On Wed, Jun 18, 2025 at 03:30:17PM +0800, Alice Guo (OSS) wrote:
> > From: Alice Guo <alice.guo@nxp.com>
> >
> > Using this patch, a bootable flash.bin can be generated. It contains
> > seco container image, scfw image, u-boot-spl.bin, atf and u-boot.bin.
> >
> > Signed-off-by: Alice Guo <alice.guo@nxp.com>
> 
> Do also apalis-imx8 needs updates? Or that's not the case? If yes it should be
> part of this series.
> 
> Thanks,
> Francesco

Let me try updating packing apalis-imx8 flash.bin.

Best Regards,
Alice Guo

Re: [PATCH 0/8] (no cover subject)

[Francesco Dolcini]

Hello Fabio, Alice

On Thu, Jun 19, 2025 at 10:01:52PM -0300, Fabio Estevam wrote:
> On Wed, Jun 18, 2025 at 4:30 AM Alice Guo (OSS) <alice.guo@oss.nxp.com> wrote:
> >
> > imx: update the building bootloader image related part for
> > i.MX8QXP, i.MX8QM and i.MX95 B0.
> 
> This way it is written above it looks like a cleanup, but if I
> understand correctly, there was a bug report from Enric, so should
> this entire series target master as a bug fix?
> 
> Francesco brought a good point: are other imx8qxp/qm boards affected?
> Could you make the fix to all boards?

I have not looked into the details myself (no time, sorry), but I
had a quick look at our CI and current master U-Boot is able to boot
on both apalis-imx8 and colibri-imx8x.

```
U-Boot 2025.07-rc4-0.0.0-devel+git.a239cdc0bd4b (Jun 17 2025 - 23:21:42 +0000)
CPU:   NXP i.MX8QM RevB A53 at 1200 MHz - invalid sensor data
DRAM:  8 GiB
Core:  161 devices, 19 uclasses, devicetree: separate
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... Reading from MMC(0)... OK
In:    serial@5a070000
Out:   serial@5a070000
Err:   serial@5a070000
Model: Toradex 0067 Apalis iMX8QM 8GB WB IT V1.1B
Serial#: 15543176
Boot:  MMC0
Reset cause: POR
Build: SCFW 83624b99, SECO-FW 7d5462e6, ATF android
Net:   eth0: ethernet@5b040000
```


```
U-Boot 2025.07-rc4-0.0.0-devel+git.a239cdc0bd4b (Jun 17 2025 - 23:21:42 +0000)
CPU:   NXP i.MX8QXP RevC A35 at 1200 MHz at 33C
DRAM:  2 GiB
Core:  110 devices, 21 uclasses, devicetree: separate
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... Reading from MMC(0)... OK
In:    serial@5a090000
Out:   serial@5a090000
Err:   serial@5a090000
Model: Toradex 0050 Colibri iMX8QXP 2GB IT V1.0E
Serial#: 14986935
Boot:  MMC0
Reset cause: POR
Build: SCFW 83624b99, SECO-FW c9de51c0, ATF android
Net:   eth0: ethernet@5b040000
```

Francesco

Re: [PATCH 0/8] (no cover subject)

[Fabio Estevam]

Hi Alice,

On Fri, Jun 20, 2025 at 12:33 AM Alice Guo (OSS) <alice.guo@oss.nxp.com> wrote:

> Hi Fabio,
>
> When checking the bug Enric reported, I found that there were some code that needed to be modified in packing i.MX8QXP/8QM flash.bin.
> Patches for i.MX95 B0 are based on them. So, I made this patch set including a bug fix for the issue Enric reported, cleanup for i.MX8QXP
> MEK/i.MX8QM MEK/i.MX95 B0. Should I separate them?

Yes, please separate bug fixes and new features.

As we are at the rc4 phase, I prefer a minimal series to address the
bug fix Enric reported targeting master.

Then you can add the new features/improvements targeting next.

Thanks