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* [PATCH v2] cxl/memdev: automate cleanup with __free()
@ 2025-06-23  8:38 Pranav Tyagi
  2025-06-24 14:43 ` Jonathan Cameron
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Pranav Tyagi @ 2025-06-23  8:38 UTC (permalink / raw)
  To: dave, jonathan.cameron, dave.jiang, alison.schofield,
	vishal.l.verma, ira.weiny, dan.j.williams, linux-cxl,
	linux-kernel
  Cc: ming.li, rrichter, peterz, skhan, linux-kernel-mentees,
	Pranav Tyagi

Use the scope based resource management (defined in linux/cleanup.h) to
automate the lifetime control of struct cxl_mbox_transfer_fw. This
eliminates explicit kfree() calls and makes the code more robust and
maintainable in presence of early returns.

Signed-off-by: Pranav Tyagi <pranav.tyagi03@gmail.com>
---
 drivers/cxl/core/memdev.c | 21 ++++++++-------------
 1 file changed, 8 insertions(+), 13 deletions(-)

diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
index f88a13adf7fa..38f4449f9740 100644
--- a/drivers/cxl/core/memdev.c
+++ b/drivers/cxl/core/memdev.c
@@ -7,6 +7,7 @@
 #include <linux/slab.h>
 #include <linux/idr.h>
 #include <linux/pci.h>
+#include <linux/cleanup.h>
 #include <cxlmem.h>
 #include "trace.h"
 #include "core.h"
@@ -802,11 +803,10 @@ static int cxl_mem_activate_fw(struct cxl_memdev_state *mds, int slot)
 static int cxl_mem_abort_fw_xfer(struct cxl_memdev_state *mds)
 {
 	struct cxl_mailbox *cxl_mbox = &mds->cxlds.cxl_mbox;
-	struct cxl_mbox_transfer_fw *transfer;
 	struct cxl_mbox_cmd mbox_cmd;
-	int rc;
-
-	transfer = kzalloc(struct_size(transfer, data, 0), GFP_KERNEL);
+	
+	struct cxl_mbox_transfer_fw *transfer __free(kfree) =
+		kzalloc(struct_size(transfer, data, 0), GFP_KERNEL);
 	if (!transfer)
 		return -ENOMEM;
 
@@ -821,9 +821,7 @@ static int cxl_mem_abort_fw_xfer(struct cxl_memdev_state *mds)
 
 	transfer->action = CXL_FW_TRANSFER_ACTION_ABORT;
 
-	rc = cxl_internal_send_cmd(cxl_mbox, &mbox_cmd);
-	kfree(transfer);
-	return rc;
+	return cxl_internal_send_cmd(cxl_mbox, &mbox_cmd);
 }
 
 static void cxl_fw_cleanup(struct fw_upload *fwl)
@@ -880,7 +878,7 @@ static enum fw_upload_err cxl_fw_write(struct fw_upload *fwl, const u8 *data,
 	struct cxl_dev_state *cxlds = &mds->cxlds;
 	struct cxl_mailbox *cxl_mbox = &cxlds->cxl_mbox;
 	struct cxl_memdev *cxlmd = cxlds->cxlmd;
-	struct cxl_mbox_transfer_fw *transfer;
+	struct cxl_mbox_transfer_fw *transfer __free(kfree);
 	struct cxl_mbox_cmd mbox_cmd;
 	u32 cur_size, remaining;
 	size_t size_in;
@@ -949,7 +947,7 @@ static enum fw_upload_err cxl_fw_write(struct fw_upload *fwl, const u8 *data,
 	rc = cxl_internal_send_cmd(cxl_mbox, &mbox_cmd);
 	if (rc < 0) {
 		rc = FW_UPLOAD_ERR_RW_ERROR;
-		goto out_free;
+		return rc;
 	}
 
 	*written = cur_size;
@@ -963,14 +961,11 @@ static enum fw_upload_err cxl_fw_write(struct fw_upload *fwl, const u8 *data,
 			dev_err(&cxlmd->dev, "Error activating firmware: %d\n",
 				rc);
 			rc = FW_UPLOAD_ERR_HW_ERROR;
-			goto out_free;
+			return rc;
 		}
 	}
 
 	rc = FW_UPLOAD_ERR_NONE;
-
-out_free:
-	kfree(transfer);
 	return rc;
 }
 
-- 
2.49.0


^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH v2] cxl/memdev: automate cleanup with __free()
@ 2025-06-27 23:03 kernel test robot
  0 siblings, 0 replies; 8+ messages in thread
From: kernel test robot @ 2025-06-27 23:03 UTC (permalink / raw)
  To: oe-kbuild; +Cc: lkp, Dan Carpenter

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250623083841.364002-1-pranav.tyagi03@gmail.com>
References: <20250623083841.364002-1-pranav.tyagi03@gmail.com>
TO: Pranav Tyagi <pranav.tyagi03@gmail.com>
TO: dave@stgolabs.net
TO: jonathan.cameron@huawei.com
TO: dave.jiang@intel.com
TO: alison.schofield@intel.com
TO: vishal.l.verma@intel.com
TO: ira.weiny@intel.com
TO: dan.j.williams@intel.com
TO: linux-cxl@vger.kernel.org
TO: linux-kernel@vger.kernel.org
CC: ming.li@zohomail.com
CC: rrichter@amd.com
CC: peterz@infradead.org
CC: skhan@linuxfoundation.org
CC: linux-kernel-mentees@lists.linux.dev
CC: Pranav Tyagi <pranav.tyagi03@gmail.com>

Hi Pranav,

kernel test robot noticed the following build warnings:

[auto build test WARNING on cxl/next]
[also build test WARNING on linus/master v6.16-rc3 next-20250627]
[cannot apply to cxl/pending]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Pranav-Tyagi/cxl-memdev-automate-cleanup-with-__free/20250623-164014
base:   https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git next
patch link:    https://lore.kernel.org/r/20250623083841.364002-1-pranav.tyagi03%40gmail.com
patch subject: [PATCH v2] cxl/memdev: automate cleanup with __free()
:::::: branch date: 5 days ago
:::::: commit date: 5 days ago
config: x86_64-randconfig-161-20250627 (https://download.01.org/0day-ci/archive/20250628/202506280653.WmzTbwEN-lkp@intel.com/config)
compiler: clang version 20.1.7 (https://github.com/llvm/llvm-project 6146a88f60492b520a36f8f8f3231e15f3cc6082)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>
| Closes: https://lore.kernel.org/r/202506280653.WmzTbwEN-lkp@intel.com/

smatch warnings:
drivers/cxl/core/memdev.c:881 cxl_fw_write() error: uninitialized symbol 'transfer'.
drivers/cxl/core/memdev.c:881 cxl_fw_write() error: uninitialized symbol 'transfer'.

vim +/transfer +881 drivers/cxl/core/memdev.c

9521875bbe0055 Vishal Verma 2023-06-14  873  
9521875bbe0055 Vishal Verma 2023-06-14  874  static enum fw_upload_err cxl_fw_write(struct fw_upload *fwl, const u8 *data,
9521875bbe0055 Vishal Verma 2023-06-14  875  				       u32 offset, u32 size, u32 *written)
9521875bbe0055 Vishal Verma 2023-06-14  876  {
aeaefabc59ec3c Dan Williams 2023-06-25  877  	struct cxl_memdev_state *mds = fwl->dd_handle;
aeaefabc59ec3c Dan Williams 2023-06-25  878  	struct cxl_dev_state *cxlds = &mds->cxlds;
8d8081cecfb994 Dave Jiang   2024-09-05  879  	struct cxl_mailbox *cxl_mbox = &cxlds->cxl_mbox;
9521875bbe0055 Vishal Verma 2023-06-14  880  	struct cxl_memdev *cxlmd = cxlds->cxlmd;
f76a702ca63e85 Pranav Tyagi 2025-06-23 @881  	struct cxl_mbox_transfer_fw *transfer __free(kfree);
9521875bbe0055 Vishal Verma 2023-06-14  882  	struct cxl_mbox_cmd mbox_cmd;
9521875bbe0055 Vishal Verma 2023-06-14  883  	u32 cur_size, remaining;
9521875bbe0055 Vishal Verma 2023-06-14  884  	size_t size_in;
9521875bbe0055 Vishal Verma 2023-06-14  885  	int rc;
9521875bbe0055 Vishal Verma 2023-06-14  886  
9521875bbe0055 Vishal Verma 2023-06-14  887  	*written = 0;
9521875bbe0055 Vishal Verma 2023-06-14  888  
9521875bbe0055 Vishal Verma 2023-06-14  889  	/* Offset has to be aligned to 128B (CXL-3.0 8.2.9.3.2 Table 8-57) */
9521875bbe0055 Vishal Verma 2023-06-14  890  	if (!IS_ALIGNED(offset, CXL_FW_TRANSFER_ALIGNMENT)) {
9521875bbe0055 Vishal Verma 2023-06-14  891  		dev_err(&cxlmd->dev,
9521875bbe0055 Vishal Verma 2023-06-14  892  			"misaligned offset for FW transfer slice (%u)\n",
9521875bbe0055 Vishal Verma 2023-06-14  893  			offset);
9521875bbe0055 Vishal Verma 2023-06-14  894  		return FW_UPLOAD_ERR_RW_ERROR;
9521875bbe0055 Vishal Verma 2023-06-14  895  	}
9521875bbe0055 Vishal Verma 2023-06-14  896  
9521875bbe0055 Vishal Verma 2023-06-14  897  	/*
aeaefabc59ec3c Dan Williams 2023-06-25  898  	 * Pick transfer size based on mds->payload_size @size must bw 128-byte
aeaefabc59ec3c Dan Williams 2023-06-25  899  	 * aligned, ->payload_size is a power of 2 starting at 256 bytes, and
aeaefabc59ec3c Dan Williams 2023-06-25  900  	 * sizeof(*transfer) is 128.  These constraints imply that @cur_size
aeaefabc59ec3c Dan Williams 2023-06-25  901  	 * will always be 128b aligned.
9521875bbe0055 Vishal Verma 2023-06-14  902  	 */
8d8081cecfb994 Dave Jiang   2024-09-05  903  	cur_size = min_t(size_t, size, cxl_mbox->payload_size - sizeof(*transfer));
9521875bbe0055 Vishal Verma 2023-06-14  904  
9521875bbe0055 Vishal Verma 2023-06-14  905  	remaining = size - cur_size;
9521875bbe0055 Vishal Verma 2023-06-14  906  	size_in = struct_size(transfer, data, cur_size);
9521875bbe0055 Vishal Verma 2023-06-14  907  
aeaefabc59ec3c Dan Williams 2023-06-25  908  	if (test_and_clear_bit(CXL_FW_CANCEL, mds->fw.state))
9521875bbe0055 Vishal Verma 2023-06-14  909  		return cxl_fw_do_cancel(fwl);
9521875bbe0055 Vishal Verma 2023-06-14  910  
9521875bbe0055 Vishal Verma 2023-06-14  911  	/*
9521875bbe0055 Vishal Verma 2023-06-14  912  	 * Slot numbers are 1-indexed
9521875bbe0055 Vishal Verma 2023-06-14  913  	 * cur_slot is the 0-indexed next_slot (i.e. 'cur_slot - 1 + 1')
9521875bbe0055 Vishal Verma 2023-06-14  914  	 * Check for rollover using modulo, and 1-index it by adding 1
9521875bbe0055 Vishal Verma 2023-06-14  915  	 */
aeaefabc59ec3c Dan Williams 2023-06-25  916  	mds->fw.next_slot = (mds->fw.cur_slot % mds->fw.num_slots) + 1;
9521875bbe0055 Vishal Verma 2023-06-14  917  
9521875bbe0055 Vishal Verma 2023-06-14  918  	/* Do the transfer via mailbox cmd */
9521875bbe0055 Vishal Verma 2023-06-14  919  	transfer = kzalloc(size_in, GFP_KERNEL);
9521875bbe0055 Vishal Verma 2023-06-14  920  	if (!transfer)
9521875bbe0055 Vishal Verma 2023-06-14  921  		return FW_UPLOAD_ERR_RW_ERROR;
9521875bbe0055 Vishal Verma 2023-06-14  922  
9521875bbe0055 Vishal Verma 2023-06-14  923  	transfer->offset = cpu_to_le32(offset / CXL_FW_TRANSFER_ALIGNMENT);
9521875bbe0055 Vishal Verma 2023-06-14  924  	memcpy(transfer->data, data + offset, cur_size);
aeaefabc59ec3c Dan Williams 2023-06-25  925  	if (mds->fw.oneshot) {
9521875bbe0055 Vishal Verma 2023-06-14  926  		transfer->action = CXL_FW_TRANSFER_ACTION_FULL;
aeaefabc59ec3c Dan Williams 2023-06-25  927  		transfer->slot = mds->fw.next_slot;
9521875bbe0055 Vishal Verma 2023-06-14  928  	} else {
9521875bbe0055 Vishal Verma 2023-06-14  929  		if (offset == 0) {
9521875bbe0055 Vishal Verma 2023-06-14  930  			transfer->action = CXL_FW_TRANSFER_ACTION_INITIATE;
9521875bbe0055 Vishal Verma 2023-06-14  931  		} else if (remaining == 0) {
9521875bbe0055 Vishal Verma 2023-06-14  932  			transfer->action = CXL_FW_TRANSFER_ACTION_END;
aeaefabc59ec3c Dan Williams 2023-06-25  933  			transfer->slot = mds->fw.next_slot;
9521875bbe0055 Vishal Verma 2023-06-14  934  		} else {
9521875bbe0055 Vishal Verma 2023-06-14  935  			transfer->action = CXL_FW_TRANSFER_ACTION_CONTINUE;
9521875bbe0055 Vishal Verma 2023-06-14  936  		}
9521875bbe0055 Vishal Verma 2023-06-14  937  	}
9521875bbe0055 Vishal Verma 2023-06-14  938  
9521875bbe0055 Vishal Verma 2023-06-14  939  	mbox_cmd = (struct cxl_mbox_cmd) {
9521875bbe0055 Vishal Verma 2023-06-14  940  		.opcode = CXL_MBOX_OP_TRANSFER_FW,
9521875bbe0055 Vishal Verma 2023-06-14  941  		.size_in = size_in,
9521875bbe0055 Vishal Verma 2023-06-14  942  		.payload_in = transfer,
9521875bbe0055 Vishal Verma 2023-06-14  943  		.poll_interval_ms = 1000,
9521875bbe0055 Vishal Verma 2023-06-14  944  		.poll_count = 30,
9521875bbe0055 Vishal Verma 2023-06-14  945  	};
9521875bbe0055 Vishal Verma 2023-06-14  946  
b5209da36b19b5 Dave Jiang   2024-09-05  947  	rc = cxl_internal_send_cmd(cxl_mbox, &mbox_cmd);
9521875bbe0055 Vishal Verma 2023-06-14  948  	if (rc < 0) {
9521875bbe0055 Vishal Verma 2023-06-14  949  		rc = FW_UPLOAD_ERR_RW_ERROR;
f76a702ca63e85 Pranav Tyagi 2025-06-23  950  		return rc;
9521875bbe0055 Vishal Verma 2023-06-14  951  	}
9521875bbe0055 Vishal Verma 2023-06-14  952  
9521875bbe0055 Vishal Verma 2023-06-14  953  	*written = cur_size;
9521875bbe0055 Vishal Verma 2023-06-14  954  
9521875bbe0055 Vishal Verma 2023-06-14  955  	/* Activate FW if oneshot or if the last slice was written */
aeaefabc59ec3c Dan Williams 2023-06-25  956  	if (mds->fw.oneshot || remaining == 0) {
9521875bbe0055 Vishal Verma 2023-06-14  957  		dev_dbg(&cxlmd->dev, "Activating firmware slot: %d\n",
aeaefabc59ec3c Dan Williams 2023-06-25  958  			mds->fw.next_slot);
aeaefabc59ec3c Dan Williams 2023-06-25  959  		rc = cxl_mem_activate_fw(mds, mds->fw.next_slot);
9521875bbe0055 Vishal Verma 2023-06-14  960  		if (rc < 0) {
9521875bbe0055 Vishal Verma 2023-06-14  961  			dev_err(&cxlmd->dev, "Error activating firmware: %d\n",
9521875bbe0055 Vishal Verma 2023-06-14  962  				rc);
9521875bbe0055 Vishal Verma 2023-06-14  963  			rc = FW_UPLOAD_ERR_HW_ERROR;
f76a702ca63e85 Pranav Tyagi 2025-06-23  964  			return rc;
9521875bbe0055 Vishal Verma 2023-06-14  965  		}
9521875bbe0055 Vishal Verma 2023-06-14  966  	}
9521875bbe0055 Vishal Verma 2023-06-14  967  
9521875bbe0055 Vishal Verma 2023-06-14  968  	rc = FW_UPLOAD_ERR_NONE;
9521875bbe0055 Vishal Verma 2023-06-14  969  	return rc;
9521875bbe0055 Vishal Verma 2023-06-14  970  }
9521875bbe0055 Vishal Verma 2023-06-14  971  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2025-06-28  3:04 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-06-23  8:38 [PATCH v2] cxl/memdev: automate cleanup with __free() Pranav Tyagi
2025-06-24 14:43 ` Jonathan Cameron
2025-06-24 15:17 ` Robert Richter
2025-06-26 14:32   ` Pranav Tyagi
2025-06-26 14:55     ` Greg KH
2025-06-26 15:12       ` Pranav Tyagi
2025-06-28  3:04 ` Dan Carpenter
  -- strict thread matches above, loose matches on Subject: below --
2025-06-27 23:03 kernel test robot

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