From: Lee Jones <lee@kernel.org>
To: Quentin Schulz <foss+kernel@0leil.net>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Lukasz Czechowski <lukasz.czechowski@thaumatec.com>,
Daniel Semkowicz <dse@thaumatec.com>,
Nicolas Frattaroli <nicolas.frattaroli@collabora.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
Quentin Schulz <quentin.schulz@cherry.de>
Subject: Re: [PATCH v3 2/5] mfd: rk8xx-core: allow to customize RK806 reset mode
Date: Thu, 26 Jun 2025 14:12:13 +0100 [thread overview]
Message-ID: <20250626131213.GD10134@google.com> (raw)
In-Reply-To: <20250618-rk8xx-rst-fun-v3-2-081f02d3d348@cherry.de>
On Wed, 18 Jun 2025, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@cherry.de>
>
> The RK806 PMIC has a bitfield for configuring the restart/reset behavior
> (which I assume Rockchip calls "function") whenever the PMIC is reset
> either programmatically (c.f. DEV_RST in the datasheet) or via PWRCTRL
> or RESETB pins.
>
> For RK806, the following values are possible for RST_FUN:
>
> 0b00 means "restart PMU"
"Restart PMU"
> 0b01 means "Reset all the power off reset registers, forcing
> the state to switch to ACTIVE mode"
> 0b10 means "Reset all the power off reset registers, forcing
> the state to switch to ACTIVE mode, and simultaneously
> pull down the RESETB PIN for 5mS before releasing"
> 0b11 means the same as for 0b10 just above.
>
> This adds the appropriate logic in the driver to parse the new
> rockchip,reset-mode DT property to pass this information. It just
> happens that the values in the binding match the values to write in the
> bitfield so no mapping is necessary.
>
> If it is missing, the register is left untouched and relies either on
> the silicon default or on whatever was set earlier in the boot stages
> (e.g. the bootloader).
>
> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
> ---
> drivers/mfd/rk8xx-core.c | 15 +++++++++++++++
> include/linux/mfd/rk808.h | 2 ++
> 2 files changed, 17 insertions(+)
>
> diff --git a/drivers/mfd/rk8xx-core.c b/drivers/mfd/rk8xx-core.c
> index 71c2b80a4678d627e86cfbec8135f08e262559d3..23ff92f89f3357e3f47c5dd0e9f80cca453f22c0 100644
> --- a/drivers/mfd/rk8xx-core.c
> +++ b/drivers/mfd/rk8xx-core.c
> @@ -10,6 +10,7 @@
> * Author: Wadim Egorov <w.egorov@phytec.de>
> */
>
> +#include <linux/bitfield.h>
> #include <linux/interrupt.h>
> #include <linux/mfd/rk808.h>
> #include <linux/mfd/core.h>
> @@ -699,6 +700,7 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap
> const struct mfd_cell *cells;
> int dual_support = 0;
> int nr_pre_init_regs;
> + u32 rst_fun = 0;
> int nr_cells;
> int ret;
> int i;
> @@ -726,6 +728,19 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap
> cells = rk806s;
> nr_cells = ARRAY_SIZE(rk806s);
> dual_support = IRQF_SHARED;
> +
> + ret = device_property_read_u32(dev, "rockchip,reset-mode", &rst_fun);
> + if (ret) {
> + dev_dbg(dev,
> + "rockchip,reset-mode property missing, not setting RST_FUN\n");
I suggest that this debug message is not that useful and can be removed.
> + break;
> + }
> +
> + ret = regmap_update_bits(rk808->regmap, RK806_SYS_CFG3,
> + RK806_RST_FUN_MSK,
Place on the line above?
> + FIELD_PREP(RK806_RST_FUN_MSK, rst_fun));
> + if (ret)
> + return dev_err_probe(dev, ret, "RST_FUN write err\n");
Failed to configure requested restart/reset behavior"
> break;
> case RK808_ID:
> rk808->regmap_irq_chip = &rk808_irq_chip;
> diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h
> index 69cbea78b430b562a23d995263369d475daa6287..28170ee08898ca59c76a741a1d42763a42b72380 100644
> --- a/include/linux/mfd/rk808.h
> +++ b/include/linux/mfd/rk808.h
> @@ -812,6 +812,8 @@ enum rk806_pin_dr_sel {
> #define RK806_INT_POL_H BIT(1)
> #define RK806_INT_POL_L 0
>
> +/* SYS_CFG3 */
> +#define RK806_RST_FUN_MSK GENMASK(7, 6)
> #define RK806_SLAVE_RESTART_FUN_MSK BIT(1)
> #define RK806_SLAVE_RESTART_FUN_EN BIT(1)
> #define RK806_SLAVE_RESTART_FUN_OFF 0
>
> --
> 2.49.0
>
--
Lee Jones [李琼斯]
WARNING: multiple messages have this Message-ID (diff)
From: Lee Jones <lee@kernel.org>
To: Quentin Schulz <foss+kernel@0leil.net>
Cc: Daniel Semkowicz <dse@thaumatec.com>,
Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
devicetree@vger.kernel.org,
Quentin Schulz <quentin.schulz@cherry.de>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
Lukasz Czechowski <lukasz.czechowski@thaumatec.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 2/5] mfd: rk8xx-core: allow to customize RK806 reset mode
Date: Thu, 26 Jun 2025 14:12:13 +0100 [thread overview]
Message-ID: <20250626131213.GD10134@google.com> (raw)
In-Reply-To: <20250618-rk8xx-rst-fun-v3-2-081f02d3d348@cherry.de>
On Wed, 18 Jun 2025, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@cherry.de>
>
> The RK806 PMIC has a bitfield for configuring the restart/reset behavior
> (which I assume Rockchip calls "function") whenever the PMIC is reset
> either programmatically (c.f. DEV_RST in the datasheet) or via PWRCTRL
> or RESETB pins.
>
> For RK806, the following values are possible for RST_FUN:
>
> 0b00 means "restart PMU"
"Restart PMU"
> 0b01 means "Reset all the power off reset registers, forcing
> the state to switch to ACTIVE mode"
> 0b10 means "Reset all the power off reset registers, forcing
> the state to switch to ACTIVE mode, and simultaneously
> pull down the RESETB PIN for 5mS before releasing"
> 0b11 means the same as for 0b10 just above.
>
> This adds the appropriate logic in the driver to parse the new
> rockchip,reset-mode DT property to pass this information. It just
> happens that the values in the binding match the values to write in the
> bitfield so no mapping is necessary.
>
> If it is missing, the register is left untouched and relies either on
> the silicon default or on whatever was set earlier in the boot stages
> (e.g. the bootloader).
>
> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
> ---
> drivers/mfd/rk8xx-core.c | 15 +++++++++++++++
> include/linux/mfd/rk808.h | 2 ++
> 2 files changed, 17 insertions(+)
>
> diff --git a/drivers/mfd/rk8xx-core.c b/drivers/mfd/rk8xx-core.c
> index 71c2b80a4678d627e86cfbec8135f08e262559d3..23ff92f89f3357e3f47c5dd0e9f80cca453f22c0 100644
> --- a/drivers/mfd/rk8xx-core.c
> +++ b/drivers/mfd/rk8xx-core.c
> @@ -10,6 +10,7 @@
> * Author: Wadim Egorov <w.egorov@phytec.de>
> */
>
> +#include <linux/bitfield.h>
> #include <linux/interrupt.h>
> #include <linux/mfd/rk808.h>
> #include <linux/mfd/core.h>
> @@ -699,6 +700,7 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap
> const struct mfd_cell *cells;
> int dual_support = 0;
> int nr_pre_init_regs;
> + u32 rst_fun = 0;
> int nr_cells;
> int ret;
> int i;
> @@ -726,6 +728,19 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap
> cells = rk806s;
> nr_cells = ARRAY_SIZE(rk806s);
> dual_support = IRQF_SHARED;
> +
> + ret = device_property_read_u32(dev, "rockchip,reset-mode", &rst_fun);
> + if (ret) {
> + dev_dbg(dev,
> + "rockchip,reset-mode property missing, not setting RST_FUN\n");
I suggest that this debug message is not that useful and can be removed.
> + break;
> + }
> +
> + ret = regmap_update_bits(rk808->regmap, RK806_SYS_CFG3,
> + RK806_RST_FUN_MSK,
Place on the line above?
> + FIELD_PREP(RK806_RST_FUN_MSK, rst_fun));
> + if (ret)
> + return dev_err_probe(dev, ret, "RST_FUN write err\n");
Failed to configure requested restart/reset behavior"
> break;
> case RK808_ID:
> rk808->regmap_irq_chip = &rk808_irq_chip;
> diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h
> index 69cbea78b430b562a23d995263369d475daa6287..28170ee08898ca59c76a741a1d42763a42b72380 100644
> --- a/include/linux/mfd/rk808.h
> +++ b/include/linux/mfd/rk808.h
> @@ -812,6 +812,8 @@ enum rk806_pin_dr_sel {
> #define RK806_INT_POL_H BIT(1)
> #define RK806_INT_POL_L 0
>
> +/* SYS_CFG3 */
> +#define RK806_RST_FUN_MSK GENMASK(7, 6)
> #define RK806_SLAVE_RESTART_FUN_MSK BIT(1)
> #define RK806_SLAVE_RESTART_FUN_EN BIT(1)
> #define RK806_SLAVE_RESTART_FUN_OFF 0
>
> --
> 2.49.0
>
--
Lee Jones [李琼斯]
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2025-06-26 13:14 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-18 10:32 [PATCH v3 0/5] rockchip: rk8xx: allow to customize PMIC reset mode on RK806 Quentin Schulz
2025-06-18 10:32 ` Quentin Schulz
2025-06-18 10:32 ` [PATCH v3 1/5] dt-bindings: mfd: rk806: allow to customize PMIC reset mode Quentin Schulz
2025-06-18 10:32 ` Quentin Schulz
2025-06-19 9:54 ` Krzysztof Kozlowski
2025-06-19 9:54 ` Krzysztof Kozlowski
2025-06-18 10:32 ` [PATCH v3 2/5] mfd: rk8xx-core: allow to customize RK806 " Quentin Schulz
2025-06-18 10:32 ` Quentin Schulz
2025-06-26 13:12 ` Lee Jones [this message]
2025-06-26 13:12 ` Lee Jones
2025-06-18 10:32 ` [PATCH v3 3/5] arm64: dts: rockchip: add header for RK8XX PMIC constants Quentin Schulz
2025-06-18 10:32 ` Quentin Schulz
2025-06-19 15:51 ` Sebastian Reichel
2025-06-19 15:51 ` Sebastian Reichel
2025-06-23 9:48 ` Quentin Schulz
2025-06-23 9:48 ` Quentin Schulz
2025-06-25 1:26 ` Sebastian Reichel
2025-06-25 1:26 ` Sebastian Reichel
2025-06-18 10:32 ` [PATCH v3 4/5] arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Jaguar Quentin Schulz
2025-06-18 10:32 ` Quentin Schulz
2025-06-18 10:32 ` [PATCH v3 5/5] arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Tiger Quentin Schulz
2025-06-18 10:32 ` Quentin Schulz
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