From: Rob Herring <robh@kernel.org>
To: Shradha Todi <shradha.t@samsung.com>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org, linux-fsd@tesla.com,
manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org,
kw@linux.com, bhelgaas@google.com, jingoohan1@gmail.com,
krzk+dt@kernel.org, conor+dt@kernel.org, alim.akhtar@samsung.com,
vkoul@kernel.org, kishon@kernel.org, arnd@arndb.de,
m.szyprowski@samsung.com, jh80.chung@samsung.com,
pankaj.dubey@samsung.com
Subject: Re: [PATCH v2 07/10] dt-bindings: phy: Add PHY bindings support for FSD SoC
Date: Fri, 27 Jun 2025 16:17:21 -0500 [thread overview]
Message-ID: <20250627211721.GA153863-robh@kernel.org> (raw)
In-Reply-To: <20250625165229.3458-8-shradha.t@samsung.com>
On Wed, Jun 25, 2025 at 10:22:26PM +0530, Shradha Todi wrote:
> Document PHY device tree bindings for Tesla FSD SoCs.
>
> Signed-off-by: Shradha Todi <shradha.t@samsung.com>
> ---
> .../bindings/phy/samsung,exynos-pcie-phy.yaml | 25 +++++++++++++++++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> index 41df8bb08ff7..4dc20156cdde 100644
> --- a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> @@ -15,10 +15,13 @@ properties:
> const: 0
>
> compatible:
> - const: samsung,exynos5433-pcie-phy
> + enum:
> + - samsung,exynos5433-pcie-phy
> + - tesla,fsd-pcie-phy
>
> reg:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
>
> samsung,pmu-syscon:
> $ref: /schemas/types.yaml#/definitions/phandle
> @@ -30,6 +33,24 @@ properties:
> description: phandle for FSYS sysreg interface, used to control
> sysreg registers bits for PCIe PHY
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - tesla,fsd-pcie-phy
> + then:
> + description:
> + The PHY controller nodes are represented in the aliases node
> + using the following format 'pciephy{n}'. Depending on whether
> + n is 0 or 1, the phy init sequence is chosen.
What? Don't make up your own aliases.
If the PHY instances are different, then maybe you need a different
compatible. If this is just selecting the PHY mode, you can do that in
PHY cells as the mode depends on the consumer.
> + properties:
> + reg:
> + items:
> + - description: PHY
> + - description: PCS
else:
properties:
reg:
maxItems: 1
> +
> required:
> - "#phy-cells"
> - compatible
> --
> 2.49.0
>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Shradha Todi <shradha.t@samsung.com>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org, linux-fsd@tesla.com,
manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org,
kw@linux.com, bhelgaas@google.com, jingoohan1@gmail.com,
krzk+dt@kernel.org, conor+dt@kernel.org, alim.akhtar@samsung.com,
vkoul@kernel.org, kishon@kernel.org, arnd@arndb.de,
m.szyprowski@samsung.com, jh80.chung@samsung.com,
pankaj.dubey@samsung.com
Subject: Re: [PATCH v2 07/10] dt-bindings: phy: Add PHY bindings support for FSD SoC
Date: Fri, 27 Jun 2025 16:17:21 -0500 [thread overview]
Message-ID: <20250627211721.GA153863-robh@kernel.org> (raw)
In-Reply-To: <20250625165229.3458-8-shradha.t@samsung.com>
On Wed, Jun 25, 2025 at 10:22:26PM +0530, Shradha Todi wrote:
> Document PHY device tree bindings for Tesla FSD SoCs.
>
> Signed-off-by: Shradha Todi <shradha.t@samsung.com>
> ---
> .../bindings/phy/samsung,exynos-pcie-phy.yaml | 25 +++++++++++++++++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> index 41df8bb08ff7..4dc20156cdde 100644
> --- a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> @@ -15,10 +15,13 @@ properties:
> const: 0
>
> compatible:
> - const: samsung,exynos5433-pcie-phy
> + enum:
> + - samsung,exynos5433-pcie-phy
> + - tesla,fsd-pcie-phy
>
> reg:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
>
> samsung,pmu-syscon:
> $ref: /schemas/types.yaml#/definitions/phandle
> @@ -30,6 +33,24 @@ properties:
> description: phandle for FSYS sysreg interface, used to control
> sysreg registers bits for PCIe PHY
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - tesla,fsd-pcie-phy
> + then:
> + description:
> + The PHY controller nodes are represented in the aliases node
> + using the following format 'pciephy{n}'. Depending on whether
> + n is 0 or 1, the phy init sequence is chosen.
What? Don't make up your own aliases.
If the PHY instances are different, then maybe you need a different
compatible. If this is just selecting the PHY mode, you can do that in
PHY cells as the mode depends on the consumer.
> + properties:
> + reg:
> + items:
> + - description: PHY
> + - description: PCS
else:
properties:
reg:
maxItems: 1
> +
> required:
> - "#phy-cells"
> - compatible
> --
> 2.49.0
>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-06-27 21:19 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20250625165241epcas5p471ca039a776513c4da7ee2a0955de5c2@epcas5p4.samsung.com>
2025-06-25 16:52 ` [PATCH v2 00/10] Add PCIe support for Tesla FSD SoC Shradha Todi
2025-06-25 16:52 ` Shradha Todi
2025-06-25 16:52 ` [PATCH v2 01/10] PCI: exynos: Remove unused MACROs in exynos PCI file Shradha Todi
2025-06-25 16:52 ` Shradha Todi
2025-06-25 16:52 ` [PATCH v2 02/10] PCI: exynos: Change macro names to exynos specific Shradha Todi
2025-06-25 16:52 ` Shradha Todi
2025-06-25 16:52 ` [PATCH v2 03/10] PCI: exynos: Reorder MACROs to maintain consistency Shradha Todi
2025-06-25 16:52 ` Shradha Todi
2025-06-25 16:52 ` [PATCH v2 04/10] PCI: exynos: Add platform device private data Shradha Todi
2025-06-25 16:52 ` Shradha Todi
2025-06-25 16:52 ` [PATCH v2 05/10] PCI: exynos: Add structure to hold resource operations Shradha Todi
2025-06-25 16:52 ` Shradha Todi
2025-06-25 16:52 ` [PATCH v2 06/10] dt-bindings: PCI: Add bindings support for Tesla FSD SoC Shradha Todi
2025-06-25 16:52 ` Shradha Todi
2025-06-27 16:29 ` Bjorn Helgaas
2025-06-27 16:29 ` Bjorn Helgaas
2025-07-01 11:33 ` Shradha Todi
2025-07-01 11:33 ` Shradha Todi
2025-07-01 17:16 ` Bjorn Helgaas
2025-07-01 17:16 ` Bjorn Helgaas
2025-06-27 21:12 ` Rob Herring
2025-06-27 21:12 ` Rob Herring
2025-07-01 11:11 ` Shradha Todi
2025-07-01 11:11 ` Shradha Todi
2025-07-01 11:20 ` Krzysztof Kozlowski
2025-07-01 11:20 ` Krzysztof Kozlowski
2025-07-01 13:38 ` Shradha Todi
2025-07-01 13:38 ` Shradha Todi
2025-06-25 16:52 ` [PATCH v2 07/10] dt-bindings: phy: Add PHY bindings support for " Shradha Todi
2025-06-25 16:52 ` Shradha Todi
2025-06-27 21:17 ` Rob Herring [this message]
2025-06-27 21:17 ` Rob Herring
2025-07-01 11:06 ` Shradha Todi
2025-07-01 11:06 ` Shradha Todi
2025-07-01 11:25 ` Krzysztof Kozlowski
2025-07-01 11:25 ` Krzysztof Kozlowski
2025-07-01 13:35 ` Shradha Todi
2025-07-01 13:35 ` Shradha Todi
2025-07-02 20:18 ` Krzysztof Kozlowski
2025-07-02 20:18 ` Krzysztof Kozlowski
2025-07-04 13:09 ` Pankaj Dubey
2025-07-04 13:09 ` Pankaj Dubey
2025-07-05 7:47 ` Krzysztof Kozlowski
2025-07-05 7:47 ` Krzysztof Kozlowski
2025-06-25 16:52 ` [PATCH v2 08/10] phy: exynos: Add PCIe PHY " Shradha Todi
2025-06-25 16:52 ` Shradha Todi
2025-06-26 23:09 ` Vinod Koul
2025-06-26 23:09 ` Vinod Koul
2025-06-25 16:52 ` [PATCH v2 09/10] PCI: exynos: Add support for Tesla " Shradha Todi
2025-06-25 16:52 ` Shradha Todi
2025-06-27 19:30 ` Bjorn Helgaas
2025-06-27 19:30 ` Bjorn Helgaas
2025-07-01 11:18 ` Shradha Todi
2025-07-01 11:18 ` Shradha Todi
2025-07-01 16:57 ` Bjorn Helgaas
2025-07-01 16:57 ` Bjorn Helgaas
2025-06-30 16:26 ` Dan Carpenter
2025-06-30 16:26 ` Dan Carpenter
2025-06-25 16:52 ` [PATCH v2 10/10] arm64: dts: fsd: Add PCIe " Shradha Todi
2025-06-25 16:52 ` Shradha Todi
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