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From: Andrew Jones <ajones@ventanamicro.com>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	 linux-acpi@vger.kernel.org, iommu@lists.linux.dev,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Alexandre Ghiti <alex@ghiti.fr>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	 Len Brown <lenb@kernel.org>,
	Tomasz Jeznach <tjeznach@rivosinc.com>,
	 Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	 Robin Murphy <robin.murphy@arm.com>,
	Anup Patel <apatel@ventanamicro.com>,
	 Atish Patra <atishp@rivosinc.com>
Subject: Re: [PATCH v3 3/3] iommu/riscv: Add ACPI support
Date: Mon, 30 Jun 2025 10:48:47 +0200	[thread overview]
Message-ID: <20250630-43f937dcdcd84599d28169cd@orel> (raw)
In-Reply-To: <20250630034803.1611262-4-sunilvl@ventanamicro.com>

On Mon, Jun 30, 2025 at 09:18:03AM +0530, Sunil V L wrote:
> RISC-V IO Mapping Table (RIMT) provides the information about the IOMMU
> to the OS in ACPI. Add support for ACPI in RISC-V IOMMU drivers by using
> RIMT data.
> 
> The changes at high level are,
> 
> a) Register the IOMMU with RIMT data structures.
> b) Enable probing of platform IOMMU in ACPI way using the ACPIID defined
>    for the RISC-V IOMMU in the BRS spec [1]. Configure the MSI domain if
>    the platform IOMMU uses MSIs.
> 
> [1] - https://github.com/riscv-non-isa/riscv-brs/blob/main/acpi-id.adoc
> 
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
>  drivers/iommu/riscv/iommu-platform.c | 17 ++++++++++++++++-
>  drivers/iommu/riscv/iommu.c          | 10 ++++++++++
>  2 files changed, 26 insertions(+), 1 deletion(-)
>

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	 linux-acpi@vger.kernel.org, iommu@lists.linux.dev,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Alexandre Ghiti <alex@ghiti.fr>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	 Len Brown <lenb@kernel.org>,
	Tomasz Jeznach <tjeznach@rivosinc.com>,
	 Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	 Robin Murphy <robin.murphy@arm.com>,
	Anup Patel <apatel@ventanamicro.com>,
	 Atish Patra <atishp@rivosinc.com>
Subject: Re: [PATCH v3 3/3] iommu/riscv: Add ACPI support
Date: Mon, 30 Jun 2025 10:48:47 +0200	[thread overview]
Message-ID: <20250630-43f937dcdcd84599d28169cd@orel> (raw)
In-Reply-To: <20250630034803.1611262-4-sunilvl@ventanamicro.com>

On Mon, Jun 30, 2025 at 09:18:03AM +0530, Sunil V L wrote:
> RISC-V IO Mapping Table (RIMT) provides the information about the IOMMU
> to the OS in ACPI. Add support for ACPI in RISC-V IOMMU drivers by using
> RIMT data.
> 
> The changes at high level are,
> 
> a) Register the IOMMU with RIMT data structures.
> b) Enable probing of platform IOMMU in ACPI way using the ACPIID defined
>    for the RISC-V IOMMU in the BRS spec [1]. Configure the MSI domain if
>    the platform IOMMU uses MSIs.
> 
> [1] - https://github.com/riscv-non-isa/riscv-brs/blob/main/acpi-id.adoc
> 
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
>  drivers/iommu/riscv/iommu-platform.c | 17 ++++++++++++++++-
>  drivers/iommu/riscv/iommu.c          | 10 ++++++++++
>  2 files changed, 26 insertions(+), 1 deletion(-)
>

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

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  reply	other threads:[~2025-06-30  8:48 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-30  3:48 [PATCH v3 0/3] RISC-V: Add ACPI support for IOMMU Sunil V L
2025-06-30  3:48 ` Sunil V L
2025-06-30  3:48 ` [PATCH v3 1/3] ACPI: RISC-V: Add support for RIMT Sunil V L
2025-06-30  3:48   ` Sunil V L
2025-06-30  7:55   ` Andrew Jones
2025-06-30  7:55     ` Andrew Jones
2025-07-01  3:47     ` Sunil V L
2025-07-01  3:47       ` Sunil V L
2025-06-30  3:48 ` [PATCH v3 2/3] ACPI: scan: Add support for RISC-V in acpi_iommu_configure_id() Sunil V L
2025-06-30  3:48   ` Sunil V L
2025-06-30  8:02   ` Andrew Jones
2025-06-30  8:02     ` Andrew Jones
2025-07-01  3:33     ` Sunil V L
2025-07-01  3:33       ` Sunil V L
2025-06-30  3:48 ` [PATCH v3 3/3] iommu/riscv: Add ACPI support Sunil V L
2025-06-30  3:48   ` Sunil V L
2025-06-30  8:48   ` Andrew Jones [this message]
2025-06-30  8:48     ` Andrew Jones
2025-07-13 11:47   ` Will Deacon
2025-07-13 11:47     ` Will Deacon
2025-06-30  3:51 ` [PATCH v3 0/3] RISC-V: Add ACPI support for IOMMU Sunil V L
2025-06-30  3:51   ` Sunil V L

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