* [PULL v2 1/4] hw/intc/loongarch_extioi: Move unrealize function to common code
2025-07-11 7:12 [PULL v2 0/4] loongarch-to-apply queue Bibo Mao
@ 2025-07-11 7:12 ` Bibo Mao
2025-07-11 7:13 ` [PULL v2 2/4] target/loongarch: Correct spelling in helper_csrwr_pwcl() Bibo Mao
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Bibo Mao @ 2025-07-11 7:12 UTC (permalink / raw)
To: Song Gao; +Cc: qemu-devel
Memory about LoongArchExtIOICommonState::cpu is allocated in common
code, it had better be freed in common code also.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
hw/intc/loongarch_extioi.c | 9 ---------
hw/intc/loongarch_extioi_common.c | 9 +++++++++
include/hw/intc/loongarch_extioi.h | 1 -
include/hw/intc/loongarch_extioi_common.h | 1 +
4 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
index 8b8ac6b187..3e9c88d1d9 100644
--- a/hw/intc/loongarch_extioi.c
+++ b/hw/intc/loongarch_extioi.c
@@ -377,13 +377,6 @@ static void loongarch_extioi_realize(DeviceState *dev, Error **errp)
}
}
-static void loongarch_extioi_unrealize(DeviceState *dev)
-{
- LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(dev);
-
- g_free(s->cpu);
-}
-
static void loongarch_extioi_reset_hold(Object *obj, ResetType type)
{
LoongArchExtIOIClass *lec = LOONGARCH_EXTIOI_GET_CLASS(obj);
@@ -436,8 +429,6 @@ static void loongarch_extioi_class_init(ObjectClass *klass, const void *data)
device_class_set_parent_realize(dc, loongarch_extioi_realize,
&lec->parent_realize);
- device_class_set_parent_unrealize(dc, loongarch_extioi_unrealize,
- &lec->parent_unrealize);
resettable_class_set_parent_phases(rc, NULL, loongarch_extioi_reset_hold,
NULL, &lec->parent_phases);
lecc->pre_save = vmstate_extioi_pre_save;
diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_common.c
index 4a904b3bc1..ba03383ed1 100644
--- a/hw/intc/loongarch_extioi_common.c
+++ b/hw/intc/loongarch_extioi_common.c
@@ -108,6 +108,13 @@ static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp)
}
}
+static void loongarch_extioi_common_unrealize(DeviceState *dev)
+{
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(dev);
+
+ g_free(s->cpu);
+}
+
static void loongarch_extioi_common_reset_hold(Object *obj, ResetType type)
{
LoongArchExtIOICommonClass *lecc = LOONGARCH_EXTIOI_COMMON_GET_CLASS(obj);
@@ -221,6 +228,8 @@ static void loongarch_extioi_common_class_init(ObjectClass *klass,
device_class_set_parent_realize(dc, loongarch_extioi_common_realize,
&lecc->parent_realize);
+ device_class_set_parent_unrealize(dc, loongarch_extioi_common_unrealize,
+ &lecc->parent_unrealize);
resettable_class_set_parent_phases(rc, NULL,
loongarch_extioi_common_reset_hold,
NULL, &lecc->parent_phases);
diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index 9be1d736ea..4795bdc15f 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -22,7 +22,6 @@ struct LoongArchExtIOIClass {
LoongArchExtIOICommonClass parent_class;
DeviceRealize parent_realize;
- DeviceUnrealize parent_unrealize;
ResettablePhases parent_phases;
};
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
index dca25ff893..c021ccee0f 100644
--- a/include/hw/intc/loongarch_extioi_common.h
+++ b/include/hw/intc/loongarch_extioi_common.h
@@ -94,6 +94,7 @@ struct LoongArchExtIOICommonClass {
SysBusDeviceClass parent_class;
DeviceRealize parent_realize;
+ DeviceUnrealize parent_unrealize;
ResettablePhases parent_phases;
int (*pre_save)(void *s);
int (*post_load)(void *s, int version_id);
--
2.43.5
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PULL v2 2/4] target/loongarch: Correct spelling in helper_csrwr_pwcl()
2025-07-11 7:12 [PULL v2 0/4] loongarch-to-apply queue Bibo Mao
2025-07-11 7:12 ` [PULL v2 1/4] hw/intc/loongarch_extioi: Move unrealize function to common code Bibo Mao
@ 2025-07-11 7:13 ` Bibo Mao
2025-07-11 7:13 ` [PULL v2 3/4] target/loongarch: Fix CSR STLBPS register write emulation Bibo Mao
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Bibo Mao @ 2025-07-11 7:13 UTC (permalink / raw)
To: Song Gao; +Cc: qemu-devel
There is small typo issue in function helper_csrwr_pwcl(), this patch
corrects this issue.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
target/loongarch/tcg/csr_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/loongarch/tcg/csr_helper.c b/target/loongarch/tcg/csr_helper.c
index 2942d7feb8..46d331ce8a 100644
--- a/target/loongarch/tcg/csr_helper.c
+++ b/target/loongarch/tcg/csr_helper.c
@@ -131,8 +131,8 @@ target_ulong helper_csrwr_pwcl(CPULoongArchState *env, target_ulong val)
}
if (!check_ps(env, ptbase)) {
qemu_log_mask(LOG_GUEST_ERROR,
- "Attrmpted set ptbase 2^%d\n", ptbase);
+ "Attempted set ptbase 2^%d\n", ptbase);
}
- env->CSR_PWCL =val;
+ env->CSR_PWCL = val;
return old_v;
}
--
2.43.5
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PULL v2 3/4] target/loongarch: Fix CSR STLBPS register write emulation
2025-07-11 7:12 [PULL v2 0/4] loongarch-to-apply queue Bibo Mao
2025-07-11 7:12 ` [PULL v2 1/4] hw/intc/loongarch_extioi: Move unrealize function to common code Bibo Mao
2025-07-11 7:13 ` [PULL v2 2/4] target/loongarch: Correct spelling in helper_csrwr_pwcl() Bibo Mao
@ 2025-07-11 7:13 ` Bibo Mao
2025-07-11 7:13 ` [PULL v2 4/4] target/loongarch: Remove unnecessary page size validity checking Bibo Mao
2025-07-13 7:06 ` [PULL v2 0/4] loongarch-to-apply queue Stefan Hajnoczi
4 siblings, 0 replies; 6+ messages in thread
From: Bibo Mao @ 2025-07-11 7:13 UTC (permalink / raw)
To: Song Gao; +Cc: qemu-devel
Function helper_csrwr_stlbps() is emulation with CSR STLBPS register
write operation. However there is only parameter checking action, and
no register updating action. Here update value of CSR_STLBPS when
parameter passes to check.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
target/loongarch/tcg/csr_helper.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/loongarch/tcg/csr_helper.c b/target/loongarch/tcg/csr_helper.c
index 46d331ce8a..28b1bb86bd 100644
--- a/target/loongarch/tcg/csr_helper.c
+++ b/target/loongarch/tcg/csr_helper.c
@@ -29,7 +29,11 @@ target_ulong helper_csrwr_stlbps(CPULoongArchState *env, target_ulong val)
if (!check_ps(env, tlb_ps)) {
qemu_log_mask(LOG_GUEST_ERROR,
"Attempted set ps %d\n", tlb_ps);
+ } else {
+ /* Only update PS field, reserved bit keeps zero */
+ env->CSR_STLBPS = FIELD_DP64(old_v, CSR_STLBPS, PS, tlb_ps);
}
+
return old_v;
}
--
2.43.5
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PULL v2 4/4] target/loongarch: Remove unnecessary page size validity checking
2025-07-11 7:12 [PULL v2 0/4] loongarch-to-apply queue Bibo Mao
` (2 preceding siblings ...)
2025-07-11 7:13 ` [PULL v2 3/4] target/loongarch: Fix CSR STLBPS register write emulation Bibo Mao
@ 2025-07-11 7:13 ` Bibo Mao
2025-07-13 7:06 ` [PULL v2 0/4] loongarch-to-apply queue Stefan Hajnoczi
4 siblings, 0 replies; 6+ messages in thread
From: Bibo Mao @ 2025-07-11 7:13 UTC (permalink / raw)
To: Song Gao; +Cc: qemu-devel
Page size of TLB entry comes from CSR STLBPS and pwcl register. With
huge page, it is dir_base + dir_width from pwcl register. With normal
page, it is field of PTBASE from pwcl register.
So it is ok to check validity in function helper_ldpte() and function
helper_csrwr_stlbps(). And it is unnecessary in tlb entry fill path.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
target/loongarch/tcg/tlb_helper.c | 27 ++++++++++-----------------
1 file changed, 10 insertions(+), 17 deletions(-)
diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c
index dc48b0f4d2..8872593ff0 100644
--- a/target/loongarch/tcg/tlb_helper.c
+++ b/target/loongarch/tcg/tlb_helper.c
@@ -173,12 +173,6 @@ static void fill_tlb_entry(CPULoongArchState *env, int index)
lo1 = env->CSR_TLBELO1;
}
- /*check csr_ps */
- if (!check_ps(env, csr_ps)) {
- qemu_log_mask(LOG_GUEST_ERROR, "csr_ps %d is illegal\n", csr_ps);
- return;
- }
-
/* Only MTLB has the ps fields */
if (index >= LOONGARCH_STLB) {
tlb->tlb_misc = FIELD_DP64(tlb->tlb_misc, TLB_MISC, PS, csr_ps);
@@ -340,23 +334,16 @@ void helper_tlbfill(CPULoongArchState *env)
if (FIELD_EX64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR)) {
entryhi = env->CSR_TLBREHI;
+ /* Validity of pagesize is checked in helper_ldpte() */
pagesize = FIELD_EX64(env->CSR_TLBREHI, CSR_TLBREHI, PS);
} else {
entryhi = env->CSR_TLBEHI;
+ /* Validity of pagesize is checked in helper_tlbrd() */
pagesize = FIELD_EX64(env->CSR_TLBIDX, CSR_TLBIDX, PS);
}
- if (!check_ps(env, pagesize)) {
- qemu_log_mask(LOG_GUEST_ERROR, "pagesize %d is illegal\n", pagesize);
- return;
- }
-
+ /* Validity of stlb_ps is checked in helper_csrwr_stlbps() */
stlb_ps = FIELD_EX64(env->CSR_STLBPS, CSR_STLBPS, PS);
- if (!check_ps(env, stlb_ps)) {
- qemu_log_mask(LOG_GUEST_ERROR, "stlb_ps %d is illegal\n", stlb_ps);
- return;
- }
-
if (pagesize == stlb_ps) {
/* Only write into STLB bits [47:13] */
address = entryhi & ~MAKE_64BIT_MASK(0, R_CSR_TLBEHI_64_VPPN_SHIFT);
@@ -611,10 +598,11 @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
uint32_t mem_idx)
{
CPUState *cs = env_cpu(env);
- target_ulong phys, tmp0, ptindex, ptoffset0, ptoffset1, ps, badv;
+ target_ulong phys, tmp0, ptindex, ptoffset0, ptoffset1, badv;
uint64_t ptbase = FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTBASE);
uint64_t ptwidth = FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTWIDTH);
uint64_t dir_base, dir_width;
+ uint8_t ps;
/*
* The parameter "base" has only two types,
@@ -651,6 +639,11 @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
if (odd) {
tmp0 += MAKE_64BIT_MASK(ps, 1);
}
+
+ if (!check_ps(env, ps)) {
+ qemu_log_mask(LOG_GUEST_ERROR, "Illegal huge pagesize %d\n", ps);
+ return;
+ }
} else {
badv = env->CSR_TLBRBADV;
--
2.43.5
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PULL v2 0/4] loongarch-to-apply queue
2025-07-11 7:12 [PULL v2 0/4] loongarch-to-apply queue Bibo Mao
` (3 preceding siblings ...)
2025-07-11 7:13 ` [PULL v2 4/4] target/loongarch: Remove unnecessary page size validity checking Bibo Mao
@ 2025-07-13 7:06 ` Stefan Hajnoczi
4 siblings, 0 replies; 6+ messages in thread
From: Stefan Hajnoczi @ 2025-07-13 7:06 UTC (permalink / raw)
To: Bibo Mao; +Cc: Song Gao, qemu-devel
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.1 for any user-visible changes.
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^ permalink raw reply [flat|nested] 6+ messages in thread