From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Eric Auger <eric.auger@redhat.com>,
Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH 03/11] KVM: arm64: Define constant value for ICC_SRE_EL2
Date: Mon, 14 Jul 2025 13:26:26 +0100 [thread overview]
Message-ID: <20250714122634.3334816-4-maz@kernel.org> (raw)
In-Reply-To: <20250714122634.3334816-1-maz@kernel.org>
Move the bag of bits defining the value of ICC_SRE_EL2 to a common
spot so that it can be reused by the save/restore code.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/sys_regs.c | 3 +--
arch/arm64/kvm/vgic/vgic.h | 3 +++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index dceb4f8f242a7..6981c1b34c2c4 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -532,8 +532,7 @@ static bool access_gic_sre(struct kvm_vcpu *vcpu,
return ignore_write(vcpu, p);
if (p->Op1 == 4) { /* ICC_SRE_EL2 */
- p->regval = (ICC_SRE_EL2_ENABLE | ICC_SRE_EL2_SRE |
- ICC_SRE_EL1_DIB | ICC_SRE_EL1_DFB);
+ p->regval = KVM_ICC_SRE_EL2;
} else { /* ICC_SRE_EL1 */
p->regval = vcpu->arch.vgic_cpu.vgic_v3.vgic_sre;
}
diff --git a/arch/arm64/kvm/vgic/vgic.h b/arch/arm64/kvm/vgic/vgic.h
index 4349084cb9a6c..af4bf80b785c3 100644
--- a/arch/arm64/kvm/vgic/vgic.h
+++ b/arch/arm64/kvm/vgic/vgic.h
@@ -64,6 +64,9 @@
KVM_REG_ARM_VGIC_SYSREG_CRM_MASK | \
KVM_REG_ARM_VGIC_SYSREG_OP2_MASK)
+#define KVM_ICC_SRE_EL2 (ICC_SRE_EL2_ENABLE | ICC_SRE_EL2_SRE | \
+ ICC_SRE_EL1_DIB | ICC_SRE_EL1_DFB)
+
/*
* As per Documentation/virt/kvm/devices/arm-vgic-its.rst,
* below macros are defined for ITS table entry encoding.
--
2.39.2
next prev parent reply other threads:[~2025-07-14 12:26 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-14 12:26 [PATCH 00/11] KVM: arm64: nv: Userspace register visibility fixes Marc Zyngier
2025-07-14 12:26 ` [PATCH 01/11] KVM: arm64: Make RVBAR_EL2 accesses UNDEF Marc Zyngier
2025-07-14 12:26 ` [PATCH 02/11] KVM: arm64: Don't advertise ICH_*_EL2 registers through GET_ONE_REG Marc Zyngier
2025-07-14 12:26 ` Marc Zyngier [this message]
2025-07-14 12:26 ` [PATCH 04/11] KVM: arm64: Define helper for ICH_VTR_EL2 Marc Zyngier
2025-07-14 12:26 ` [PATCH 05/11] KVM: arm64: Let GICv3 save/restore honor visibility attribute Marc Zyngier
2025-07-14 12:26 ` [PATCH 06/11] KVM: arm64: Expose GICv3 EL2 registers via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS Marc Zyngier
2025-07-14 12:26 ` [PATCH 07/11] KVM: arm64: Condition FGT registers on feature availability Marc Zyngier
2025-07-14 12:26 ` [PATCH 08/11] KVM: arm64: Advertise FGT2 registers to userspace Marc Zyngier
2025-07-14 12:26 ` [PATCH 09/11] KVM: arm64: selftests: get-reg-list: Simplify feature dependency Marc Zyngier
2025-07-14 22:49 ` Itaru Kitayama
2025-07-14 12:26 ` [PATCH 10/11] KVM: arm64: selftests: get-reg-list: Add base EL2 registers Marc Zyngier
2025-07-14 12:26 ` [PATCH 11/11] KVM: arm64: Document registers exposed via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS Marc Zyngier
2025-07-16 16:47 ` [PATCH 00/11] KVM: arm64: nv: Userspace register visibility fixes Oliver Upton
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