From: Itaru Kitayama <itaru.kitayama@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org, Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Eric Auger <eric.auger@redhat.com>,
Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [PATCH 09/11] KVM: arm64: selftests: get-reg-list: Simplify feature dependency
Date: Tue, 15 Jul 2025 07:49:35 +0900 [thread overview]
Message-ID: <aHWJf4JrcclSnJSo@vm4> (raw)
In-Reply-To: <20250714122634.3334816-10-maz@kernel.org>
On Mon, Jul 14, 2025 at 01:26:32PM +0100, Marc Zyngier wrote:
> Describing the dependencies between registers and features is on
> the masochistic side of things, with hard-coded values that would
> be better taken from the existing description.
>
> Add a couple of helpers to that effect, and repaint the dependency
> array. More could be done to improve this test, but my interest is
> wearing thin...
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> .../selftests/kvm/arm64/get-reg-list.c | 52 ++++++++-----------
> 1 file changed, 22 insertions(+), 30 deletions(-)
>
> diff --git a/tools/testing/selftests/kvm/arm64/get-reg-list.c b/tools/testing/selftests/kvm/arm64/get-reg-list.c
> index d01798b6b3b47..a35b01d08cc63 100644
> --- a/tools/testing/selftests/kvm/arm64/get-reg-list.c
> +++ b/tools/testing/selftests/kvm/arm64/get-reg-list.c
> @@ -15,6 +15,12 @@
> #include "test_util.h"
> #include "processor.h"
>
> +#define SYS_REG(r) ARM64_SYS_REG(sys_reg_Op0(SYS_ ## r), \
> + sys_reg_Op1(SYS_ ## r), \
> + sys_reg_CRn(SYS_ ## r), \
> + sys_reg_CRm(SYS_ ## r), \
> + sys_reg_Op2(SYS_ ## r))
> +
> struct feature_id_reg {
> __u64 reg;
> __u64 id_reg;
> @@ -22,37 +28,23 @@ struct feature_id_reg {
> __u64 feat_min;
> };
>
> -static struct feature_id_reg feat_id_regs[] = {
> - {
> - ARM64_SYS_REG(3, 0, 2, 0, 3), /* TCR2_EL1 */
> - ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
> - 0,
> - 1
> - },
> - {
> - ARM64_SYS_REG(3, 0, 10, 2, 2), /* PIRE0_EL1 */
> - ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
> - 8,
> - 1
> - },
> - {
> - ARM64_SYS_REG(3, 0, 10, 2, 3), /* PIR_EL1 */
> - ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
> - 8,
> - 1
> - },
> - {
> - ARM64_SYS_REG(3, 0, 10, 2, 4), /* POR_EL1 */
> - ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
> - 16,
> - 1
> - },
> - {
> - ARM64_SYS_REG(3, 3, 10, 2, 4), /* POR_EL0 */
> - ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
> - 16,
> - 1
> +#define FEAT(id, f, v) \
> + .id_reg = SYS_REG(id), \
> + .feat_shift = id ## _ ## f ## _SHIFT, \
> + .feat_min = id ## _ ## f ## _ ## v
> +
> +#define REG_FEAT(r, id, f, v) \
> + { \
> + .reg = SYS_REG(r), \
> + FEAT(id, f, v) \
> }
> +
> +static struct feature_id_reg feat_id_regs[] = {
> + REG_FEAT(TCR2_EL1, ID_AA64MMFR3_EL1, TCRX, IMP),
> + REG_FEAT(PIRE0_EL1, ID_AA64MMFR3_EL1, S1PIE, IMP),
> + REG_FEAT(PIR_EL1, ID_AA64MMFR3_EL1, S1PIE, IMP),
> + REG_FEAT(POR_EL1, ID_AA64MMFR3_EL1, S1POE, IMP),
> + REG_FEAT(POR_EL0, ID_AA64MMFR3_EL1, S1POE, IMP),
> };
>
> bool filter_reg(__u64 reg)
After applied this series against kvm-next as of today, I testes this selftest on RevC FVP model with kvm-arm.mode=nested. All PASSed.
Tested-by: Itaru Kitayama <itaru.kitayama@fujitsu.com>
next prev parent reply other threads:[~2025-07-14 22:49 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-14 12:26 [PATCH 00/11] KVM: arm64: nv: Userspace register visibility fixes Marc Zyngier
2025-07-14 12:26 ` [PATCH 01/11] KVM: arm64: Make RVBAR_EL2 accesses UNDEF Marc Zyngier
2025-07-14 12:26 ` [PATCH 02/11] KVM: arm64: Don't advertise ICH_*_EL2 registers through GET_ONE_REG Marc Zyngier
2025-07-14 12:26 ` [PATCH 03/11] KVM: arm64: Define constant value for ICC_SRE_EL2 Marc Zyngier
2025-07-14 12:26 ` [PATCH 04/11] KVM: arm64: Define helper for ICH_VTR_EL2 Marc Zyngier
2025-07-14 12:26 ` [PATCH 05/11] KVM: arm64: Let GICv3 save/restore honor visibility attribute Marc Zyngier
2025-07-14 12:26 ` [PATCH 06/11] KVM: arm64: Expose GICv3 EL2 registers via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS Marc Zyngier
2025-07-14 12:26 ` [PATCH 07/11] KVM: arm64: Condition FGT registers on feature availability Marc Zyngier
2025-07-14 12:26 ` [PATCH 08/11] KVM: arm64: Advertise FGT2 registers to userspace Marc Zyngier
2025-07-14 12:26 ` [PATCH 09/11] KVM: arm64: selftests: get-reg-list: Simplify feature dependency Marc Zyngier
2025-07-14 22:49 ` Itaru Kitayama [this message]
2025-07-14 12:26 ` [PATCH 10/11] KVM: arm64: selftests: get-reg-list: Add base EL2 registers Marc Zyngier
2025-07-14 12:26 ` [PATCH 11/11] KVM: arm64: Document registers exposed via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS Marc Zyngier
2025-07-16 16:47 ` [PATCH 00/11] KVM: arm64: nv: Userspace register visibility fixes Oliver Upton
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