Re: [PATCH 2/4] cxl/events: Add extra validity checks for corrected memory error count in General Media Event Record

[kernel test robot <lkp@intel.com>]

Hi,

kernel test robot noticed the following build warnings:

[auto build test WARNING on cxl/next]
[also build test WARNING on linus/master v6.16-rc6 next-20250716]
[cannot apply to cxl/pending]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/shiju-jose-huawei-com/cxl-events-Update-Common-Event-Record-to-CXL-spec-rev-3-2/20250716-192336
base:   https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git next
patch link:    https://lore.kernel.org/r/20250716104945.2002-3-shiju.jose%40huawei.com
patch subject: [PATCH 2/4] cxl/events: Add extra validity checks for corrected memory error count in General Media Event Record
config: arm-randconfig-004-20250717 (https://download.01.org/0day-ci/archive/20250717/202507171153.p2RrAdN4-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project 16534d19bf50bde879a83f0ae62875e2c5120e64)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250717/202507171153.p2RrAdN4-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202507171153.p2RrAdN4-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/cxl/core/mbox.c:933:27: warning: address of array 'evt->gen_media.cme_count' will always evaluate to 'true' [-Wpointer-bool-conversion]
     933 |                                              !evt->gen_media.cme_count);
         |                                              ~~~~~~~~~~~~~~~~^~~~~~~~~
   include/asm-generic/bug.h:148:18: note: expanded from macro 'WARN_ON_ONCE'
     148 |         DO_ONCE_LITE_IF(condition, WARN_ON, 1)
         |                         ^~~~~~~~~
   include/linux/once_lite.h:28:27: note: expanded from macro 'DO_ONCE_LITE_IF'
      28 |                 bool __ret_do_once = !!(condition);                     \
         |                                         ^~~~~~~~~
   1 warning generated.


vim +933 drivers/cxl/core/mbox.c

   888	
   889	void cxl_event_trace_record(const struct cxl_memdev *cxlmd,
   890				    enum cxl_event_log_type type,
   891				    enum cxl_event_type event_type,
   892				    const uuid_t *uuid, union cxl_event *evt)
   893	{
   894		if (event_type == CXL_CPER_EVENT_MEM_MODULE) {
   895			trace_cxl_memory_module(cxlmd, type, &evt->mem_module);
   896			return;
   897		}
   898		if (event_type == CXL_CPER_EVENT_GENERIC) {
   899			trace_cxl_generic_event(cxlmd, type, uuid, &evt->generic);
   900			return;
   901		}
   902	
   903		if (trace_cxl_general_media_enabled() || trace_cxl_dram_enabled()) {
   904			u64 dpa, hpa = ULLONG_MAX, hpa_alias = ULLONG_MAX;
   905			struct cxl_region *cxlr;
   906	
   907			/*
   908			 * These trace points are annotated with HPA and region
   909			 * translations. Take topology mutation locks and lookup
   910			 * { HPA, REGION } from { DPA, MEMDEV } in the event record.
   911			 */
   912			guard(rwsem_read)(&cxl_region_rwsem);
   913			guard(rwsem_read)(&cxl_dpa_rwsem);
   914	
   915			dpa = le64_to_cpu(evt->media_hdr.phys_addr) & CXL_DPA_MASK;
   916			cxlr = cxl_dpa_to_region(cxlmd, dpa);
   917			if (cxlr) {
   918				u64 cache_size = cxlr->params.cache_size;
   919	
   920				hpa = cxl_dpa_to_hpa(cxlr, cxlmd, dpa);
   921				if (cache_size)
   922					hpa_alias = hpa - cache_size;
   923			}
   924	
   925			if (event_type == CXL_CPER_EVENT_GEN_MEDIA) {
   926				if (cxl_store_rec_gen_media((struct cxl_memdev *)cxlmd, evt))
   927					dev_dbg(&cxlmd->dev, "CXL store rec_gen_media failed\n");
   928	
   929				if (evt->gen_media.media_hdr.descriptor &
   930				    CXL_GMER_EVT_DESC_THRESHOLD_EVENT)
   931					WARN_ON_ONCE((evt->gen_media.media_hdr.type &
   932						      CXL_GMER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE) &&
 > 933						     !evt->gen_media.cme_count);
   934				else
   935					WARN_ON_ONCE(evt->gen_media.media_hdr.type &
   936						     CXL_GMER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE);
   937	
   938				trace_cxl_general_media(cxlmd, type, cxlr, hpa,
   939							hpa_alias, &evt->gen_media);
   940			} else if (event_type == CXL_CPER_EVENT_DRAM) {
   941				if (cxl_store_rec_dram((struct cxl_memdev *)cxlmd, evt))
   942					dev_dbg(&cxlmd->dev, "CXL store rec_dram failed\n");
   943	
   944				trace_cxl_dram(cxlmd, type, cxlr, hpa, hpa_alias,
   945					       &evt->dram);
   946			}
   947		}
   948	}
   949	EXPORT_SYMBOL_NS_GPL(cxl_event_trace_record, "CXL");
   950	

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