From: Yixun Lan <dlan@gentoo.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: u-boot@lists.denx.de, Jernej Skrabec <jernej.skrabec@gmail.com>,
Mikhail Kalashnikov <iuncuim@gmail.com>,
Paul Kocialkowski <paulk@sys-base.io>,
linux-sunxi@lists.linux.dev, Tom Rini <trini@konsulko.com>
Subject: Re: [PATCH v2 00/20] sunxi: Add Allwinner A523 support
Date: Sat, 19 Jul 2025 10:05:47 +0800 [thread overview]
Message-ID: <20250719020547-GYA702644@gentoo> (raw)
In-Reply-To: <20250717235455.32528-1-andre.przywara@arm.com>
Hi Andre,
On 00:54 Fri 18 Jul , Andre Przywara wrote:
> Hi,
>
> (Mikhail and Jernej: please reply with S-o-b: lines for your patches!)
>
> this series introduces support for the Allwinner A523 SoC family.
> Compared to v1, a good chunk of those patches have been merged, so we are
> down from 34 to 20 patches now. There are some small fixes to the
> pinctrl driver, and the SPL clock bits got updated to fix the conflicts
> with the now merged A133 support. I rewrote the SPL watchdog code, to
> avoid the MMIO register C struct. The DRAM driver lost one MMIO register
> struct. The DT files have now landed in the DT rebasing repo, so we can
> cherry-pick them from there.
>
> Otherwise this now based on latest U-Boot master, which hopefully makes
> testing easier. If people don't shout, I would like to merge it still
> during this merge window, since the patches have been around for a while,
> and people want to use them, alongside the now supported mainline Linux
> code. So please test and review!
>
> ==================================
> This series introduces support for the Allwinner A523 SoC family. The
> same die is used in different packages: the A523, A527, T527, and H728:
> they connect a different set of peripherals to the pins, or enable extra
> goodies like an NPU. From a U-Boot perspective those chips do not differ
> much, all the differences are described in the board DT files.
>
> To be able to share the SPL clock code, the existing H6 code gets
> refactored in patches 01-04. This unifies the (CPU) PLL handling across
> the SoCs supported by this code (H6, H616, A133), and adds support for
> the separate CPU PLLs on the A523.
>
> Patches 05-10 extend the existing Allwinner U-Boot drivers to cope with
> some of the changed peripherals, this includes the mandatory clock and
> pinctrl drivers, but also some clock tweaks for the MMC controller
> driver, and support for the new-ish AXP323 PMIC used on most boards.
>
> Patches 11 updates some SPL bits to be able to cope with the A523.
> Patches 12-15 add the new SPL bits for the A523, most prominently the DRAM
> initialisation code. Many thanks to Jernej and Mikhail for providing
> this part, there is a great reverse engineering and testing effort behind
> this.
>
> Patches 16-19 cherry-pick the DT files from the DT rebasing repo. There
> are more fix patches queued, I will update them once they hit the repo.
>
> The final patch adds defconfig files for the three boards that seem to be
> the most popular at the moment, they include two development boards and
> one TV box. The most interesting bits in there are the DRAM parameters.
>
> Please have a look, review, and test.
>
for the series, I've only got one clk warning, but otherwise works for me..
Tested-by: Yixun Lan <dlan@gentoo.org> # Radxa A5E
--
Yixun Lan (dlan)
prev parent reply other threads:[~2025-07-19 2:05 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-17 23:54 [PATCH v2 00/20] sunxi: Add Allwinner A523 support Andre Przywara
2025-07-17 23:54 ` [PATCH v2 01/20] sunxi: clock: H6: unify PLL control bit definitions Andre Przywara
2025-07-17 23:54 ` [PATCH v2 02/20] sunxi: clock: H6: factor out clock_set_pll() Andre Przywara
2025-07-17 23:54 ` [PATCH v2 03/20] sunxi: clock: H6: factor out H6/H616 CPU clock setup Andre Przywara
2025-07-17 23:54 ` [PATCH v2 04/20] sunxi: clock: H6: add A523 CPU PLL support Andre Przywara
2025-07-17 23:54 ` [PATCH v2 05/20] sunxi: spl: add support for Allwinner A523 watchdog Andre Przywara
2025-07-17 23:54 ` [PATCH v2 06/20] clk: sunxi: Add support for the A523 CCU Andre Przywara
2025-07-17 23:54 ` [PATCH v2 07/20] clk: sunxi: Add support for the A523 -R CCU Andre Przywara
2025-07-17 23:54 ` [PATCH v2 08/20] pinctrl: sunxi: add Allwinner A523 pinctrl description Andre Przywara
2025-07-17 23:54 ` [PATCH v2 09/20] sunxi: mmc: add support for Allwinner A523 MMC mod clock Andre Przywara
2025-07-22 0:32 ` Andre Przywara
2025-07-17 23:54 ` [PATCH v2 10/20] power: regulator: add AXP323 support Andre Przywara
2025-07-17 23:54 ` [PATCH v2 11/20] sunxi: update cpu_sunxi_ncat2.h Andre Przywara
2025-07-17 23:54 ` [PATCH v2 12/20] sunxi: sun50i_h6: add A523 SPL clock setup code Andre Przywara
2025-07-22 0:14 ` Andre Przywara
2025-07-27 20:15 ` Jernej Škrabec
2025-07-17 23:54 ` [PATCH v2 13/20] sunxi: A523: add DRAM initialisation routine Andre Przywara
2025-07-27 20:16 ` Jernej Škrabec
2025-07-17 23:54 ` [PATCH v2 14/20] sunxi: A523: add DDR3 DRAM support Andre Przywara
2025-07-25 4:44 ` Mikhail Kalashnikov
2025-07-25 23:48 ` Andre Przywara
2025-07-26 0:04 ` [PATCH] FIXUP! a523: DDR3: rework Andre Przywara
2025-07-17 23:54 ` [PATCH v2 15/20] sunxi: add basic A523 support Andre Przywara
2025-07-17 23:54 ` [PATCH v2 16/20] arm64: dts: allwinner: Add Allwinner A523 .dtsi file Andre Przywara
2025-07-17 23:54 ` [PATCH v2 17/20] arm64: dts: allwinner: a523: add X96Q-Pro+ support Andre Przywara
2025-07-17 23:54 ` [PATCH v2 18/20] arm64: dts: allwinner: a523: add Radxa A5E support Andre Przywara
2025-07-17 23:54 ` [PATCH v2 19/20] arm64: dts: allwinner: a523: add Avaota-A1 router support Andre Przywara
2025-07-17 23:54 ` [PATCH v2 20/20] sunxi: A523: add defconfigs for three boards Andre Przywara
2025-07-21 9:18 ` ZHANG Yuntian
2025-07-23 11:09 ` Yixun Lan
2025-07-23 14:19 ` Andre Przywara
2025-07-22 0:35 ` Andre Przywara
2025-07-22 2:49 ` Yixun Lan
2025-07-22 10:30 ` Andre Przywara
2025-07-19 2:05 ` Yixun Lan [this message]
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