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From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Deepak Gupta <debug@rivosinc.com>,
	stable@vger.kernel.org, Alexandre Ghiti <alexghiti@rivosinc.com>
Subject: [PATCH v2 2/4] riscv: use lw when reading int cpu in asm_per_cpu
Date: Fri, 25 Jul 2025 18:54:10 +0200	[thread overview]
Message-ID: <20250725165410.2896641-5-rkrcmar@ventanamicro.com> (raw)
In-Reply-To: <20250725165410.2896641-3-rkrcmar@ventanamicro.com>

REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: be97d0db5f44 ("riscv: VMAP_STACK overflow detection thread-safe")
Cc: <stable@vger.kernel.org>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
---
v2: split for stable [Alex]
---
 arch/riscv/include/asm/asm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index a8a2af6dfe9d..2a16e88e13de 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -91,7 +91,7 @@
 #endif
 
 .macro asm_per_cpu dst sym tmp
-	REG_L \tmp, TASK_TI_CPU_NUM(tp)
+	lw    \tmp, TASK_TI_CPU_NUM(tp)
 	slli  \tmp, \tmp, PER_CPU_OFFSET_SHIFT
 	la    \dst, __per_cpu_offset
 	add   \dst, \dst, \tmp
-- 
2.50.0


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WARNING: multiple messages have this Message-ID (diff)
From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Deepak Gupta <debug@rivosinc.com>,
	stable@vger.kernel.org, Alexandre Ghiti <alexghiti@rivosinc.com>
Subject: [PATCH v2 2/4] riscv: use lw when reading int cpu in asm_per_cpu
Date: Fri, 25 Jul 2025 18:54:10 +0200	[thread overview]
Message-ID: <20250725165410.2896641-5-rkrcmar@ventanamicro.com> (raw)
In-Reply-To: <20250725165410.2896641-3-rkrcmar@ventanamicro.com>

REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: be97d0db5f44 ("riscv: VMAP_STACK overflow detection thread-safe")
Cc: <stable@vger.kernel.org>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
---
v2: split for stable [Alex]
---
 arch/riscv/include/asm/asm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index a8a2af6dfe9d..2a16e88e13de 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -91,7 +91,7 @@
 #endif
 
 .macro asm_per_cpu dst sym tmp
-	REG_L \tmp, TASK_TI_CPU_NUM(tp)
+	lw    \tmp, TASK_TI_CPU_NUM(tp)
 	slli  \tmp, \tmp, PER_CPU_OFFSET_SHIFT
 	la    \dst, __per_cpu_offset
 	add   \dst, \dst, \tmp
-- 
2.50.0


  parent reply	other threads:[~2025-07-25 16:59 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-25 16:54 [PATCH v2 0/4] riscv: minor thread_info.cpu improvements Radim Krčmář
2025-07-25 16:54 ` Radim Krčmář
2025-07-25 16:54 ` [PATCH v2 1/4] riscv: use lw when reading int cpu in new_vmalloc_check Radim Krčmář
2025-07-25 16:54   ` Radim Krčmář
2025-07-25 16:54 ` Radim Krčmář [this message]
2025-07-25 16:54   ` [PATCH v2 2/4] riscv: use lw when reading int cpu in asm_per_cpu Radim Krčmář
2025-07-25 16:54 ` [PATCH v2 3/4] riscv: use TASK_TI_CPU instead of TASK_TI_CPU_NUM Radim Krčmář
2025-07-25 16:54   ` Radim Krčmář
2025-07-25 16:54 ` [PATCH v2 4/4] riscv: pack rv64 thread_info better Radim Krčmář
2025-07-25 16:54   ` Radim Krčmář
2025-07-31 13:22 ` [PATCH v2 0/4] riscv: minor thread_info.cpu improvements Alexandre Ghiti
2025-07-31 13:22   ` Alexandre Ghiti
2025-08-06 17:15 ` patchwork-bot+linux-riscv
2025-08-06 17:15   ` patchwork-bot+linux-riscv

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