[PATCH V2 0/2] Mask the replay timer timeout of AER for GL9763e

[PATCH V2 0/2] Mask the replay timer timeout of AER for GL9763e

[Victor Shih]

From: Victor Shih <victor.shih@genesyslogic.com.tw>

These patches add a sdhci_gli_mask_replay_timer_timeout() function
to simplify some of the code and mask the replay timer timeout of AER
for the GL9763e chipset.

Changes in v2 (July. 25, 2025)
* Rebase on latest mmc/next.
* Patch#1: Add a sdhci_gli_mask_replay_timer_timeout() function
           to simplify some of the code.
* Patch#2: Mask replay timer timeout of AER for the GL9763e.
* Patch#2: Rename the gli_set_gl9763e() to gl9763e_hw_setting()
           for consistency.

----------------- original cover letter from v1 -----------------
Due to a flaw in the hardware design, the GL9763e replay timer frequently
times out when ASPM is enabled. As a result, the warning messages will
often appear in the system log when the system accesses the GL9763e
PCI config. Therefore, the replay timer timeout must be masked.

Changes in v1 (July. 16, 2025)
* Rebase on latest mmc/next.
* Mask replay timer timeout of AER for the GL9763e.

Victor Shih (2):
  mmc: sdhci-pci-gli: Add a new function to simplify the code
  mmc: sdhci-pci-gli: GL9763e: Mask the replay timer timeout of AER

 drivers/mmc/host/sdhci-pci-gli.c | 37 ++++++++++++++++++--------------
 1 file changed, 21 insertions(+), 16 deletions(-)

-- 
2.43.0

[PATCH V2 1/2] mmc: sdhci-pci-gli: Add a new function to simplify the code

[Victor Shih]

From: Victor Shih <victor.shih@genesyslogic.com.tw>

Add a sdhci_gli_mask_replay_timer_timeout() function
to simplify some of the code, allowing it to be re-used.

Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
Cc: stable@vger.kernel.org
---
 drivers/mmc/host/sdhci-pci-gli.c | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
index 4c2ae71770f7..98ee3191b02f 100644
--- a/drivers/mmc/host/sdhci-pci-gli.c
+++ b/drivers/mmc/host/sdhci-pci-gli.c
@@ -287,6 +287,20 @@
 #define GLI_MAX_TUNING_LOOP 40
 
 /* Genesys Logic chipset */
+static void sdhci_gli_mask_replay_timer_timeout(struct pci_dev *dev)
+{
+	int aer;
+	u32 value;
+
+	/* mask the replay timer timeout of AER */
+	aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
+	if (aer) {
+		pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
+		value |= PCI_ERR_COR_REP_TIMER;
+		pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
+	}
+}
+
 static inline void gl9750_wt_on(struct sdhci_host *host)
 {
 	u32 wt_value;
@@ -607,7 +621,6 @@ static void gl9750_hw_setting(struct sdhci_host *host)
 {
 	struct sdhci_pci_slot *slot = sdhci_priv(host);
 	struct pci_dev *pdev;
-	int aer;
 	u32 value;
 
 	pdev = slot->chip->pdev;
@@ -626,12 +639,7 @@ static void gl9750_hw_setting(struct sdhci_host *host)
 	pci_set_power_state(pdev, PCI_D0);
 
 	/* mask the replay timer timeout of AER */
-	aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
-	if (aer) {
-		pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
-		value |= PCI_ERR_COR_REP_TIMER;
-		pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
-	}
+	sdhci_gli_mask_replay_timer_timeout(pdev);
 
 	gl9750_wt_off(host);
 }
@@ -806,7 +814,6 @@ static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
 static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
 {
 	struct pci_dev *pdev = slot->chip->pdev;
-	int aer;
 	u32 value;
 
 	gl9755_wt_on(pdev);
@@ -841,12 +848,7 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
 	pci_set_power_state(pdev, PCI_D0);
 
 	/* mask the replay timer timeout of AER */
-	aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
-	if (aer) {
-		pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
-		value |= PCI_ERR_COR_REP_TIMER;
-		pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
-	}
+	sdhci_gli_mask_replay_timer_timeout(pdev);
 
 	gl9755_wt_off(pdev);
 }
-- 
2.43.0

[PATCH V2 2/2] mmc: sdhci-pci-gli: GL9763e: Mask the replay timer timeout of AER

[Victor Shih]

From: Victor Shih <victor.shih@genesyslogic.com.tw>

Due to a flaw in the hardware design, the GL9763e replay timer frequently
times out when ASPM is enabled. As a result, the warning messages will
often appear in the system log when the system accesses the GL9763e
PCI config. Therefore, the replay timer timeout must be masked.

Also rename the gli_set_gl9763e() to gl9763e_hw_setting() for consistency.

Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
Cc: stable@vger.kernel.org
---
 drivers/mmc/host/sdhci-pci-gli.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
index 98ee3191b02f..7165dde9b6b8 100644
--- a/drivers/mmc/host/sdhci-pci-gli.c
+++ b/drivers/mmc/host/sdhci-pci-gli.c
@@ -1753,7 +1753,7 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot)
 	return ret;
 }
 
-static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
+static void gl9763e_hw_setting(struct sdhci_pci_slot *slot)
 {
 	struct pci_dev *pdev = slot->chip->pdev;
 	u32 value;
@@ -1782,6 +1782,9 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
 	value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
 	pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
 
+	/* mask the replay timer timeout of AER */
+	sdhci_gli_mask_replay_timer_timeout(pdev);
+
 	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
 	value &= ~GLI_9763E_VHS_REV;
 	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
@@ -1925,7 +1928,7 @@ static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
 	gli_pcie_enable_msi(slot);
 	host->mmc_host_ops.hs400_enhanced_strobe =
 					gl9763e_hs400_enhanced_strobe;
-	gli_set_gl9763e(slot);
+	gl9763e_hw_setting(slot);
 	sdhci_enable_v4_mode(host);
 
 	return 0;
-- 
2.43.0

Re: [PATCH V2 1/2] mmc: sdhci-pci-gli: Add a new function to simplify the code

[kernel test robot]

Hi Victor,

kernel test robot noticed the following build errors:

[auto build test ERROR on linus/master]
[also build test ERROR on ulf-hansson-mmc-mirror/next v6.16-rc7 next-20250725]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Victor-Shih/mmc-sdhci-pci-gli-Add-a-new-function-to-simplify-the-code/20250725-185611
base:   linus/master
patch link:    https://lore.kernel.org/r/20250725105257.59145-2-victorshihgli%40gmail.com
patch subject: [PATCH V2 1/2] mmc: sdhci-pci-gli: Add a new function to simplify the code
config: i386-buildonly-randconfig-001-20250726 (https://download.01.org/0day-ci/archive/20250726/202507261828.pgCE5fRD-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14+deb12u1) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250726/202507261828.pgCE5fRD-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202507261828.pgCE5fRD-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/mmc/host/sdhci-pci-gli.c: In function 'sdhci_gli_mask_replay_timer_timeout':
>> drivers/mmc/host/sdhci-pci-gli.c:296:39: error: 'pdev' undeclared (first use in this function); did you mean 'dev'?
     296 |         aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
         |                                       ^~~~
         |                                       dev
   drivers/mmc/host/sdhci-pci-gli.c:296:39: note: each undeclared identifier is reported only once for each function it appears in


vim +296 drivers/mmc/host/sdhci-pci-gli.c

   288	
   289	/* Genesys Logic chipset */
   290	static void sdhci_gli_mask_replay_timer_timeout(struct pci_dev *dev)
   291	{
   292		int aer;
   293		u32 value;
   294	
   295		/* mask the replay timer timeout of AER */
 > 296		aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
   297		if (aer) {
   298			pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
   299			value |= PCI_ERR_COR_REP_TIMER;
   300			pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
   301		}
   302	}
   303	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH V2 1/2] mmc: sdhci-pci-gli: Add a new function to simplify the code

[Adrian Hunter]

On 25/07/2025 13:52, Victor Shih wrote:
> From: Victor Shih <victor.shih@genesyslogic.com.tw>
> 

Need to explain in the commit message, why it has a stable tag, say:

	In preparation to fix replay timer timeout, add
	sdhci_gli_mask_replay_timer_timeout() to simplify some of the code, allowing
	it to be re-used.

> Add a sdhci_gli_mask_replay_timer_timeout() function
> to simplify some of the code, allowing it to be re-used.
> 
> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>

It is preferred to have a fixes tag as well.  What about

Fixes: 1ae1d2d6e555e ("mmc: sdhci-pci-gli: Add Genesys Logic GL9763E support")

> Cc: stable@vger.kernel.org
> ---
>  drivers/mmc/host/sdhci-pci-gli.c | 30 ++++++++++++++++--------------
>  1 file changed, 16 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index 4c2ae71770f7..98ee3191b02f 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -287,6 +287,20 @@
>  #define GLI_MAX_TUNING_LOOP 40
>  
>  /* Genesys Logic chipset */
> +static void sdhci_gli_mask_replay_timer_timeout(struct pci_dev *dev)

dev -> pdev

> +{
> +	int aer;
> +	u32 value;
> +
> +	/* mask the replay timer timeout of AER */
> +	aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> +	if (aer) {
> +		pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> +		value |= PCI_ERR_COR_REP_TIMER;
> +		pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> +	}
> +}
> +
>  static inline void gl9750_wt_on(struct sdhci_host *host)
>  {
>  	u32 wt_value;
> @@ -607,7 +621,6 @@ static void gl9750_hw_setting(struct sdhci_host *host)
>  {
>  	struct sdhci_pci_slot *slot = sdhci_priv(host);
>  	struct pci_dev *pdev;
> -	int aer;
>  	u32 value;
>  
>  	pdev = slot->chip->pdev;
> @@ -626,12 +639,7 @@ static void gl9750_hw_setting(struct sdhci_host *host)
>  	pci_set_power_state(pdev, PCI_D0);
>  
>  	/* mask the replay timer timeout of AER */
> -	aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> -	if (aer) {
> -		pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> -		value |= PCI_ERR_COR_REP_TIMER;
> -		pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> -	}
> +	sdhci_gli_mask_replay_timer_timeout(pdev);
>  
>  	gl9750_wt_off(host);
>  }
> @@ -806,7 +814,6 @@ static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
>  static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
>  {
>  	struct pci_dev *pdev = slot->chip->pdev;
> -	int aer;
>  	u32 value;
>  
>  	gl9755_wt_on(pdev);
> @@ -841,12 +848,7 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
>  	pci_set_power_state(pdev, PCI_D0);
>  
>  	/* mask the replay timer timeout of AER */
> -	aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> -	if (aer) {
> -		pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> -		value |= PCI_ERR_COR_REP_TIMER;
> -		pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> -	}
> +	sdhci_gli_mask_replay_timer_timeout(pdev);
>  
>  	gl9755_wt_off(pdev);
>  }

Re: [PATCH V2 2/2] mmc: sdhci-pci-gli: GL9763e: Mask the replay timer timeout of AER

[Adrian Hunter]

On 25/07/2025 13:52, Victor Shih wrote:
> From: Victor Shih <victor.shih@genesyslogic.com.tw>
> 
> Due to a flaw in the hardware design, the GL9763e replay timer frequently
> times out when ASPM is enabled. As a result, the warning messages will
> often appear in the system log when the system accesses the GL9763e
> PCI config. Therefore, the replay timer timeout must be masked.
> 
> Also rename the gli_set_gl9763e() to gl9763e_hw_setting() for consistency.

Should be a separate patch

> 
> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>

It is preferred to have a fixes tag as well.  What about

Fixes: 1ae1d2d6e555e ("mmc: sdhci-pci-gli: Add Genesys Logic GL9763E support")

> Cc: stable@vger.kernel.org
> ---
>  drivers/mmc/host/sdhci-pci-gli.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index 98ee3191b02f..7165dde9b6b8 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -1753,7 +1753,7 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot)
>  	return ret;
>  }
>  
> -static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> +static void gl9763e_hw_setting(struct sdhci_pci_slot *slot)
>  {
>  	struct pci_dev *pdev = slot->chip->pdev;
>  	u32 value;
> @@ -1782,6 +1782,9 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
>  	value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
>  	pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
>  
> +	/* mask the replay timer timeout of AER */
> +	sdhci_gli_mask_replay_timer_timeout(pdev);
> +
>  	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
>  	value &= ~GLI_9763E_VHS_REV;
>  	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
> @@ -1925,7 +1928,7 @@ static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
>  	gli_pcie_enable_msi(slot);
>  	host->mmc_host_ops.hs400_enhanced_strobe =
>  					gl9763e_hs400_enhanced_strobe;
> -	gli_set_gl9763e(slot);
> +	gl9763e_hw_setting(slot);
>  	sdhci_enable_v4_mode(host);
>  
>  	return 0;

Re: [PATCH V2 1/2] mmc: sdhci-pci-gli: Add a new function to simplify the code

[Victor Shih]

On Mon, Jul 28, 2025 at 2:55 PM Adrian Hunter <adrian.hunter@intel.com> wrote:
>
> On 25/07/2025 13:52, Victor Shih wrote:
> > From: Victor Shih <victor.shih@genesyslogic.com.tw>
> >
>
> Need to explain in the commit message, why it has a stable tag, say:
>
>         In preparation to fix replay timer timeout, add
>         sdhci_gli_mask_replay_timer_timeout() to simplify some of the code, allowing
>         it to be re-used.
>

Hi, Adrian

I will update it in the next version.

Thanks, Victor Shih

> > Add a sdhci_gli_mask_replay_timer_timeout() function
> > to simplify some of the code, allowing it to be re-used.
> >
> > Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
>
> It is preferred to have a fixes tag as well.  What about
>
> Fixes: 1ae1d2d6e555e ("mmc: sdhci-pci-gli: Add Genesys Logic GL9763E support")
>

Hi, Adrian

I will add this fixes tag in the next version.

Thanks, Victor Shih

> > Cc: stable@vger.kernel.org
> > ---
> >  drivers/mmc/host/sdhci-pci-gli.c | 30 ++++++++++++++++--------------
> >  1 file changed, 16 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> > index 4c2ae71770f7..98ee3191b02f 100644
> > --- a/drivers/mmc/host/sdhci-pci-gli.c
> > +++ b/drivers/mmc/host/sdhci-pci-gli.c
> > @@ -287,6 +287,20 @@
> >  #define GLI_MAX_TUNING_LOOP 40
> >
> >  /* Genesys Logic chipset */
> > +static void sdhci_gli_mask_replay_timer_timeout(struct pci_dev *dev)
>
> dev -> pdev
>

Hi, Adrian

Sorry, that's my mistake, it should be "(struct pci_dev *pdev)".
I will update it in the next version.

Thanks, Victor Shih

> > +{
> > +     int aer;
> > +     u32 value;
> > +
> > +     /* mask the replay timer timeout of AER */
> > +     aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> > +     if (aer) {
> > +             pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> > +             value |= PCI_ERR_COR_REP_TIMER;
> > +             pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> > +     }
> > +}
> > +
> >  static inline void gl9750_wt_on(struct sdhci_host *host)
> >  {
> >       u32 wt_value;
> > @@ -607,7 +621,6 @@ static void gl9750_hw_setting(struct sdhci_host *host)
> >  {
> >       struct sdhci_pci_slot *slot = sdhci_priv(host);
> >       struct pci_dev *pdev;
> > -     int aer;
> >       u32 value;
> >
> >       pdev = slot->chip->pdev;
> > @@ -626,12 +639,7 @@ static void gl9750_hw_setting(struct sdhci_host *host)
> >       pci_set_power_state(pdev, PCI_D0);
> >
> >       /* mask the replay timer timeout of AER */
> > -     aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> > -     if (aer) {
> > -             pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> > -             value |= PCI_ERR_COR_REP_TIMER;
> > -             pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> > -     }
> > +     sdhci_gli_mask_replay_timer_timeout(pdev);
> >
> >       gl9750_wt_off(host);
> >  }
> > @@ -806,7 +814,6 @@ static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
> >  static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
> >  {
> >       struct pci_dev *pdev = slot->chip->pdev;
> > -     int aer;
> >       u32 value;
> >
> >       gl9755_wt_on(pdev);
> > @@ -841,12 +848,7 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
> >       pci_set_power_state(pdev, PCI_D0);
> >
> >       /* mask the replay timer timeout of AER */
> > -     aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> > -     if (aer) {
> > -             pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> > -             value |= PCI_ERR_COR_REP_TIMER;
> > -             pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> > -     }
> > +     sdhci_gli_mask_replay_timer_timeout(pdev);
> >
> >       gl9755_wt_off(pdev);
> >  }
>

Re: [PATCH V2 2/2] mmc: sdhci-pci-gli: GL9763e: Mask the replay timer timeout of AER

[Victor Shih]

On Mon, Jul 28, 2025 at 2:56 PM Adrian Hunter <adrian.hunter@intel.com> wrote:
>
> On 25/07/2025 13:52, Victor Shih wrote:
> > From: Victor Shih <victor.shih@genesyslogic.com.tw>
> >
> > Due to a flaw in the hardware design, the GL9763e replay timer frequently
> > times out when ASPM is enabled. As a result, the warning messages will
> > often appear in the system log when the system accesses the GL9763e
> > PCI config. Therefore, the replay timer timeout must be masked.
> >
> > Also rename the gli_set_gl9763e() to gl9763e_hw_setting() for consistency.
>
> Should be a separate patch
>

Hi, Adrian

I will split it into two patches in the next version.

Thanks, Victor Shih

> >
> > Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
>
> It is preferred to have a fixes tag as well.  What about
>
> Fixes: 1ae1d2d6e555e ("mmc: sdhci-pci-gli: Add Genesys Logic GL9763E support")
>

Hi, Adrian

I will add this fixes tag in the next version.

Thanks, Victor Shih

> > Cc: stable@vger.kernel.org
> > ---
> >  drivers/mmc/host/sdhci-pci-gli.c | 7 +++++--
> >  1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> > index 98ee3191b02f..7165dde9b6b8 100644
> > --- a/drivers/mmc/host/sdhci-pci-gli.c
> > +++ b/drivers/mmc/host/sdhci-pci-gli.c
> > @@ -1753,7 +1753,7 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot)
> >       return ret;
> >  }
> >
> > -static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> > +static void gl9763e_hw_setting(struct sdhci_pci_slot *slot)
> >  {
> >       struct pci_dev *pdev = slot->chip->pdev;
> >       u32 value;
> > @@ -1782,6 +1782,9 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> >       value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
> >       pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
> >
> > +     /* mask the replay timer timeout of AER */
> > +     sdhci_gli_mask_replay_timer_timeout(pdev);
> > +
> >       pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
> >       value &= ~GLI_9763E_VHS_REV;
> >       value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
> > @@ -1925,7 +1928,7 @@ static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
> >       gli_pcie_enable_msi(slot);
> >       host->mmc_host_ops.hs400_enhanced_strobe =
> >                                       gl9763e_hs400_enhanced_strobe;
> > -     gli_set_gl9763e(slot);
> > +     gl9763e_hw_setting(slot);
> >       sdhci_enable_v4_mode(host);
> >
> >       return 0;
>