* [PATCH 2/6] ARM: dts: r9a06g032: Add GPIO controllers
2025-07-25 15:26 [PATCH 0/6] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC Herve Codina
@ 2025-07-25 15:26 ` Herve Codina
0 siblings, 0 replies; 2+ messages in thread
From: Herve Codina @ 2025-07-25 15:26 UTC (permalink / raw)
To: Hoan Tran, Linus Walleij, Bartosz Golaszewski, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Magnus Damm, Saravana Kannan, Serge Semin, Herve Codina
Cc: Phil Edworthy, linux-gpio, devicetree, linux-kernel,
linux-renesas-soc, Miquel Raynal, Thomas Petazzoni
Add GPIO controllers (Synosys DesignWare IPs) available in the
r9a06g032 (RZ/N1D) SoC.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
arch/arm/boot/dts/renesas/r9a06g032.dtsi | 127 +++++++++++++++++++++++
1 file changed, 127 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index 80ad1fdc77a0..7f71c01af409 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -499,6 +499,133 @@ gic: interrupt-controller@44101000 {
<GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ /*
+ * The GPIO mapping to the corresponding pins is not obvious.
+ * See the hardware documentation for details.
+ */
+ gpio0: gpio@5000b000 {
+ compatible = "renesas,r9a06g032-gpio", "renesas,rzn1-gpio", "snps,dw-apb-gpio";
+ reg = <0x5000b000 0x80>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&sysctrl R9A06G032_HCLK_GPIO0>;
+ clock-names = "bus";
+ status = "disabled";
+
+ /* GPIO0a[0] connected to pin GPIO0 */
+ /* GPIO0a[1..2] connected to pins GPIO3..4 */
+ /* GPIO0a[3..4] connected to pins GPIO9..10 */
+ /* GPIO0a[5] connected to pin GPIO12 */
+ /* GPIO0a[6..7] connected to pins GPIO15..16 */
+ /* GPIO0a[8..9] connected to pins GPIO21..22 */
+ /* GPIO0a[10] connected to pin GPIO24 */
+ /* GPIO0a[11..12] connected to pins GPIO27..28 */
+ /* GPIO0a[13..14] connected to pins GPIO33..34 */
+ /* GPIO0a[15] connected to pin GPIO36 */
+ /* GPIO0a[16..17] connected to pins GPIO39..40 */
+ /* GPIO0a[18..19] connected to pins GPIO45..46 */
+ /* GPIO0a[20] connected to pin GPIO48 */
+ /* GPIO0a[21..22] connected to pins GPIO51..52 */
+ /* GPIO0a[23..24] connected to pins GPIO57..58 */
+ /* GPIO0a[25..31] connected to pins GPIO62..68 */
+ gpio0a: gpio@0 {
+ compatible = "snps,dw-apb-gpio-port";
+ bank-name = "gpio0a";
+ gpio-controller;
+ #gpio-cells = <2>;
+ snps,nr-gpios = <32>;
+ reg = <0>;
+ };
+
+ /* GPIO0b[0..1] connected to pins GPIO1..2 */
+ /* GPIO0b[2..5] connected to pins GPIO5..8 */
+ /* GPIO0b[6] connected to pin GPIO11 */
+ /* GPIO0b[7..8] connected to pins GPIO13..14 */
+ /* GPIO0b[9..12] connected to pins GPIO17..20 */
+ /* GPIO0b[13] connected to pin GPIO23 */
+ /* GPIO0b[14..15] connected to pins GPIO25..26 */
+ /* GPIO0b[16..19] connected to pins GPIO29..32 */
+ /* GPIO0b[20] connected to pin GPIO35 */
+ /* GPIO0b[21..22] connected to pins GPIO37..38 */
+ /* GPIO0b[23..26] connected to pins GPIO41..44 */
+ /* GPIO0b[27] connected to pin GPIO47 */
+ /* GPIO0b[28..29] connected to pins GPIO49..50 */
+ /* GPIO0b[30..31] connected to pins GPIO53..54 */
+ gpio0b: gpio@1 {
+ compatible = "snps,dw-apb-gpio-port";
+ bank-name = "gpio0b";
+ gpio-controller;
+ #gpio-cells = <2>;
+ snps,nr-gpios = <32>;
+ reg = <1>;
+ };
+ };
+
+ gpio1: gpio@5000c000 {
+ compatible = "renesas,r9a06g032-gpio", "renesas,rzn1-gpio", "snps,dw-apb-gpio";
+ reg = <0x5000c000 0x80>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&sysctrl R9A06G032_HCLK_GPIO1>;
+ clock-names = "bus";
+ status = "disabled";
+
+ /* GPIO1a[0..4] connected to pins GPIO69..73 */
+ /* GPIO1a[5..31] connected to pins GPIO95..121 */
+ gpio1a: gpio@0 {
+ compatible = "snps,dw-apb-gpio-port";
+ bank-name = "gpio1a";
+ gpio-controller;
+ #gpio-cells = <2>;
+ snps,nr-gpios = <32>;
+ reg = <0>;
+ };
+
+ /* GPIO1b[0..1] connected to pins GPIO55..56 */
+ /* GPIO1b[2..4] connected to pins GPIO59..61 */
+ /* GPIO1b[5..25] connected to pins GPIO74..94 */
+ /* GPIO1b[26..31] connected to pins GPIO150..155 */
+ gpio1b: gpio@1 {
+ compatible = "snps,dw-apb-gpio-port";
+ bank-name = "gpio1b";
+ gpio-controller;
+ #gpio-cells = <2>;
+ snps,nr-gpios = <32>;
+ reg = <1>;
+ };
+ };
+
+ gpio2: gpio@5000d000 {
+ compatible = "renesas,r9a06g032-gpio", "renesas,rzn1-gpio", "snps,dw-apb-gpio";
+ reg = <0x5000d000 0x80>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&sysctrl R9A06G032_HCLK_GPIO2>;
+ clock-names = "bus";
+ status = "disabled";
+
+ /* GPIO2a[0..27] connected to pins GPIO122..149 */
+ /* GPIO2a[28..31] connected to pins GPIO156..159 */
+ gpio2a: gpio@0 {
+ compatible = "snps,dw-apb-gpio-port";
+ bank-name = "gpio2a";
+ gpio-controller;
+ #gpio-cells = <2>;
+ snps,nr-gpios = <32>;
+ reg = <0>;
+ };
+
+ /* GPIO2b[0..9] connected to pins GPIO160..169 */
+ gpio2b: gpio@1 {
+ compatible = "snps,dw-apb-gpio-port";
+ bank-name = "gpio2b";
+ gpio-controller;
+ #gpio-cells = <2>;
+ snps,nr-gpios = <10>;
+ reg = <1>;
+ };
+ };
+
can0: can@52104000 {
compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
reg = <0x52104000 0x800>;
--
2.50.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 2/6] ARM: dts: r9a06g032: Add GPIO controllers
@ 2025-07-27 16:04 kernel test robot
0 siblings, 0 replies; 2+ messages in thread
From: kernel test robot @ 2025-07-27 16:04 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp
::::::
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
::::::
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250725152618.32886-3-herve.codina@bootlin.com>
References: <20250725152618.32886-3-herve.codina@bootlin.com>
TO: Herve Codina <herve.codina@bootlin.com>
TO: Hoan Tran <hoan@os.amperecomputing.com>
TO: Linus Walleij <linus.walleij@linaro.org>
TO: Bartosz Golaszewski <brgl@bgdev.pl>
TO: Rob Herring <robh@kernel.org>
TO: Krzysztof Kozlowski <krzk@kernel.org>
TO: Conor Dooley <conor+dt@kernel.org>
TO: Geert Uytterhoeven <geert+renesas@glider.be>
TO: Magnus Damm <magnus.damm@gmail.com>
TO: Saravana Kannan <saravanak@google.com>
TO: Serge Semin <fancer.lancer@gmail.com>
TO: Herve Codina <herve.codina@bootlin.com>
CC: Phil Edworthy <phil.edworthy@renesas.com>
CC: linux-gpio@vger.kernel.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-renesas-soc@vger.kernel.org
CC: Miquel Raynal <miquel.raynal@bootlin.com>
CC: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Hi Herve,
kernel test robot noticed the following build warnings:
[auto build test WARNING on geert-renesas-devel/next]
[also build test WARNING on robh/for-next brgl/gpio/for-next linus/master v6.16-rc7 next-20250725]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Herve-Codina/dt-bindings-gpio-snps-dw-apb-Add-support-for-Renesas-RZ-N1/20250725-233131
base: https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
patch link: https://lore.kernel.org/r/20250725152618.32886-3-herve.codina%40bootlin.com
patch subject: [PATCH 2/6] ARM: dts: r9a06g032: Add GPIO controllers
:::::: branch date: 2 days ago
:::::: commit date: 2 days ago
config: arm-randconfig-051-20250726 (https://download.01.org/0day-ci/archive/20250727/202507272330.DBMkYKqe-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 14.3.0
dtschema version: 2025.6.2.dev4+g8f79ddd
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250727/202507272330.DBMkYKqe-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202507272330.DBMkYKqe-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
arch/arm/boot/dts/renesas/r9a06g032.dtsi:439.27-488.5: Warning (avoid_unnecessary_addr_size): /soc/switch@44050000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: switch@44050000 (renesas,r9a06g032-a5psw): Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
from schema $id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#
>> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: gpio@5000b000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
>> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: gpio@5000c000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
>> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: gpio@5000d000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
--
arch/arm/boot/dts/renesas/r9a06g032.dtsi:439.27-488.5: Warning (avoid_unnecessary_addr_size): /soc/switch@44050000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: switch@44050000 (renesas,r9a06g032-a5psw): Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
from schema $id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#
>> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: gpio@5000b000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
>> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: gpio@5000c000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
>> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: gpio@5000d000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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