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From: Imre Deak <imre.deak@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <intel-xe@lists.freedesktop.org>
Subject: [PATCH 13/19] drm/i915/tc: Unify the way to get the pin assignment on all platforms
Date: Tue, 5 Aug 2025 10:36:54 +0300	[thread overview]
Message-ID: <20250805073700.642107-14-imre.deak@intel.com> (raw)
In-Reply-To: <20250805073700.642107-1-imre.deak@intel.com>

Unify the way to get the pin assignment on all platforms. This removes
the duplication in the helper functions in this and a follow-up change.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 47 ++++++++++++++-----------
 1 file changed, 27 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 20d0bc8257860..5b044ece815df 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -277,23 +277,32 @@ static u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
 	return lane_mask >> DP_LANE_ASSIGNMENT_SHIFT(tc->phy_fia_idx);
 }
 
-enum intel_tc_pin_assignment
-intel_tc_port_get_pin_assignment(struct intel_digital_port *dig_port)
+static enum intel_tc_pin_assignment
+get_pin_assignment(struct intel_tc_port *tc)
 {
-	struct intel_display *display = to_intel_display(dig_port);
-	struct intel_tc_port *tc = to_tc_port(dig_port);
+	struct intel_display *display = to_intel_display(tc->dig_port);
+	enum tc_port tc_port = intel_encoder_to_tc(&tc->dig_port->base);
 	enum intel_tc_pin_assignment pin_assignment;
 	intel_wakeref_t wakeref;
+	i915_reg_t reg;
+	u32 mask;
 	u32 val;
 
+	if (DISPLAY_VER(display) >= 20) {
+		reg = TCSS_DDI_STATUS(tc_port);
+		mask = TCSS_DDI_STATUS_PIN_ASSIGNMENT_MASK;
+	} else {
+		reg = PORT_TX_DFLEXPA1(tc->phy_fia);
+		mask = DP_PIN_ASSIGNMENT_MASK(tc->phy_fia_idx);
+	}
+
 	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref)
-		val = intel_de_read(display, PORT_TX_DFLEXPA1(tc->phy_fia));
+		val = intel_de_read(display, reg);
 
 	drm_WARN_ON(display->drm, val == 0xffffffff);
 	assert_tc_cold_blocked(tc);
 
-	pin_assignment = (val & DP_PIN_ASSIGNMENT_MASK(tc->phy_fia_idx)) >>
-			 DP_PIN_ASSIGNMENT_SHIFT(tc->phy_fia_idx);
+	pin_assignment = (val & mask) >> (ffs(mask) - 1);
 
 	switch (pin_assignment) {
 	case INTEL_TC_PIN_ASSIGNMENT_A:
@@ -315,21 +324,10 @@ intel_tc_port_get_pin_assignment(struct intel_digital_port *dig_port)
 
 static int lnl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
 {
-	struct intel_display *display = to_intel_display(dig_port);
-	enum tc_port tc_port = intel_encoder_to_tc(&dig_port->base);
 	struct intel_tc_port *tc = to_tc_port(dig_port);
 	enum intel_tc_pin_assignment pin_assignment;
-	intel_wakeref_t wakeref;
-	u32 val;
 
-	with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref)
-		val = intel_de_read(display, TCSS_DDI_STATUS(tc_port));
-
-	drm_WARN_ON(display->drm, val == 0xffffffff);
-	assert_tc_cold_blocked(tc);
-
-	pin_assignment =
-		REG_FIELD_GET(TCSS_DDI_STATUS_PIN_ASSIGNMENT_MASK, val);
+	pin_assignment = get_pin_assignment(tc);
 
 	switch (pin_assignment) {
 	case INTEL_TC_PIN_ASSIGNMENT_NONE:
@@ -347,9 +345,10 @@ static int lnl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
 
 static int mtl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
 {
+	struct intel_tc_port *tc = to_tc_port(dig_port);
 	enum intel_tc_pin_assignment pin_assignment;
 
-	pin_assignment = intel_tc_port_get_pin_assignment(dig_port);
+	pin_assignment = get_pin_assignment(tc);
 
 	switch (pin_assignment) {
 	case INTEL_TC_PIN_ASSIGNMENT_NONE:
@@ -420,6 +419,14 @@ int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port)
 	return tc->max_lane_count;
 }
 
+enum intel_tc_pin_assignment
+intel_tc_port_get_pin_assignment(struct intel_digital_port *dig_port)
+{
+	struct intel_tc_port *tc = to_tc_port(dig_port);
+
+	return get_pin_assignment(tc);
+}
+
 void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
 				      int required_lanes)
 {
-- 
2.49.1


  parent reply	other threads:[~2025-08-05  7:37 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-05  7:36 [PATCH 00/19] drm/i915/tc: Fix enabled/disconnected DP-alt sink handling Imre Deak
2025-08-05  7:36 ` [PATCH 01/19] drm/i915/lnl+/tc: Fix handling of an enabled/disconnected dp-alt sink Imre Deak
2025-08-07  7:06   ` Kahola, Mika
2025-08-07 10:59   ` Luca Coelho
2025-08-07 11:38     ` Imre Deak
2025-08-07 12:19       ` Jani Nikula
2025-08-07 12:32         ` Imre Deak
2025-08-07 12:50           ` Imre Deak
2025-08-07 13:05             ` Jani Nikula
2025-08-07 13:24               ` Imre Deak
2025-08-07 14:10             ` Luca Coelho
2025-08-05  7:36 ` [PATCH 02/19] drm/i915/icl+/tc: Cache the max lane count value Imre Deak
2025-08-05  9:33   ` [PATCH v2 " Imre Deak
2025-08-07  8:07     ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 03/19] drm/i915/lnl+/tc: Fix max lane count HW readout Imre Deak
2025-08-05  9:33   ` [PATCH v2 " Imre Deak
2025-08-07  8:36     ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 04/19] drm/i915/lnl+/tc: Use the cached max lane count value Imre Deak
2025-08-07  8:49   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 05/19] drm/i915/icl+/tc: Convert AUX powered WARN to a debug message Imre Deak
2025-08-07 12:29   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 06/19] drm/i915/tc: Use the cached max lane count value Imre Deak
2025-08-06 12:02   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 07/19] drm/i915/tc: Move getting the power domain before reading DFLEX registers Imre Deak
2025-08-06 12:56   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 08/19] drm/i915/tc: Move asserting the power state after reading TCSS_DDI_STATUS Imre Deak
2025-08-06 13:22   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 09/19] drm/i915/tc: Add an enum for the TypeC pin assignment Imre Deak
2025-08-07 12:39   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 10/19] drm/i915/tc: Pass pin assignment value around using the pin assignment enum Imre Deak
2025-08-07 12:56   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 11/19] drm/i915/tc: Handle pin assignment NONE on all platforms Imre Deak
2025-08-07 12:57   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 12/19] drm/i915/tc: Validate the pin assignment " Imre Deak
2025-08-07 13:08   ` Kahola, Mika
2025-08-05  7:36 ` Imre Deak [this message]
2025-08-08  6:44   ` [PATCH 13/19] drm/i915/tc: Unify the way to get " Kahola, Mika
2025-08-05  7:36 ` [PATCH 14/19] drm/i915/tc: Unify the way to get the max lane count value on MTL+ Imre Deak
2025-08-08  7:32   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 15/19] drm/i915/tc: Handle non-TC encoders when getting the pin assignment Imre Deak
2025-08-08  7:45   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 16/19] drm/i915/tc: Pass intel_tc_port to internal lane mask/count helpers Imre Deak
2025-08-08  8:25   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 17/19] dmc/i915/tc: Report pin assignment NONE in TBT-alt mode Imre Deak
2025-08-08  8:26   ` Kahola, Mika
2025-08-05  7:36 ` [PATCH 18/19] drm/i915/tc: Cache the pin assignment value Imre Deak
2025-08-08  8:27   ` Kahola, Mika
2025-08-05  7:37 ` [PATCH 19/19] drm/i915/tc: Debug print the pin assignment and max lane count Imre Deak
2025-08-08  8:28   ` Kahola, Mika
2025-08-05  7:46 ` ✗ CI.checkpatch: warning for drm/i915/tc: Fix enabled/disconnected DP-alt sink handling Patchwork
2025-08-05  7:47 ` ✓ CI.KUnit: success " Patchwork
2025-08-05  8:02 ` ✗ CI.checksparse: warning " Patchwork
2025-08-05  8:49 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-08-05  9:10 ` ✗ i915.CI.BAT: " Patchwork
2025-08-05 10:08 ` ✓ Xe.CI.Full: success " Patchwork
2025-08-05 10:47 ` ✓ i915.CI.BAT: success for drm/i915/tc: Fix enabled/disconnected DP-alt sink handling (rev3) Patchwork
2025-08-05 11:41 ` ✗ CI.checkpatch: warning " Patchwork
2025-08-05 11:42 ` ✓ CI.KUnit: success " Patchwork
2025-08-05 11:57 ` ✗ CI.checksparse: warning " Patchwork
2025-08-05 12:51 ` ✗ i915.CI.Full: failure " Patchwork
2025-08-13 12:43   ` Imre Deak
2025-08-05 13:02 ` ✓ Xe.CI.BAT: success " Patchwork
2025-08-05 15:31 ` ✓ Xe.CI.Full: " Patchwork
2025-08-06 11:44 ` [PATCH 00/19] drm/i915/tc: Fix enabled/disconnected DP-alt sink handling Luca Coelho
2025-08-06 11:54   ` Imre Deak
2025-08-06 12:54     ` Luca Coelho
2025-08-06 13:12       ` Imre Deak
2025-08-06 13:16         ` Luca Coelho

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