From: stuartsummers <stuart.summers@intel.com>
Cc: matthew.brost@intel.com, farah.kassabri@intel.com,
intel-xe@lists.freedesktop.org,
Stuart Summers <stuart.summers@intel.com>
Subject: [PATCH 3/8] drm/xe: Add xe_tlb_inval structure
Date: Wed, 6 Aug 2025 22:23:59 +0000 [thread overview]
Message-ID: <20250806222404.30333-4-stuart.summers@intel.com> (raw)
In-Reply-To: <20250806222404.30333-1-stuart.summers@intel.com>
From: Matthew Brost <matthew.brost@intel.com>
Extract TLB invalidation state into a structure to decouple TLB
invalidations from the GT, allowing the structure to be embedded
anywhere in the driver.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
---
drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h | 32 ++++++++++++++++++++++
drivers/gpu/drm/xe/xe_gt_types.h | 31 ++-------------------
2 files changed, 34 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
index 919430359103..8b37d0b8f545 100644
--- a/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
@@ -6,10 +6,42 @@
#ifndef _XE_GT_TLB_INVAL_TYPES_H_
#define _XE_GT_TLB_INVAL_TYPES_H_
+#include <linux/workqueue.h>
#include <linux/dma-fence.h>
struct xe_gt;
+/** struct xe_tlb_inval - TLB invalidation client */
+struct xe_tlb_inval {
+ /** @tlb_inval.seqno: TLB invalidation seqno, protected by CT lock */
+#define TLB_INVALIDATION_SEQNO_MAX 0x100000
+ int seqno;
+ /**
+ * @tlb_inval.seqno_recv: last received TLB invalidation seqno,
+ * protected by CT lock
+ */
+ int seqno_recv;
+ /**
+ * @tlb_inval.pending_fences: list of pending fences waiting TLB
+ * invaliations, protected by CT lock
+ */
+ struct list_head pending_fences;
+ /**
+ * @tlb_inval.pending_lock: protects @tlb_inval.pending_fences
+ * and updating @tlb_inval.seqno_recv.
+ */
+ spinlock_t pending_lock;
+ /**
+ * @tlb_inval.fence_tdr: schedules a delayed call to
+ * xe_gt_tlb_fence_timeout after the timeut interval is over.
+ */
+ struct delayed_work fence_tdr;
+ /** @wtlb_invalidation.wq: schedules GT TLB invalidation jobs */
+ struct workqueue_struct *job_wq;
+ /** @tlb_inval.lock: protects TLB invalidation fences */
+ spinlock_t lock;
+};
+
/**
* struct xe_gt_tlb_inval_fence - XE GT TLB invalidation fence
*
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index 38cdca4107c8..ed21bd63b001 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -12,6 +12,7 @@
#include "xe_gt_sriov_pf_types.h"
#include "xe_gt_sriov_vf_types.h"
#include "xe_gt_stats_types.h"
+#include "xe_gt_tlb_inval_types.h"
#include "xe_hw_engine_types.h"
#include "xe_hw_fence_types.h"
#include "xe_oa_types.h"
@@ -186,35 +187,7 @@ struct xe_gt {
} reset;
/** @tlb_inval: TLB invalidation state */
- struct {
- /** @tlb_inval.seqno: TLB invalidation seqno, protected by CT lock */
-#define TLB_INVALIDATION_SEQNO_MAX 0x100000
- int seqno;
- /**
- * @tlb_inval.seqno_recv: last received TLB invalidation seqno,
- * protected by CT lock
- */
- int seqno_recv;
- /**
- * @tlb_inval.pending_fences: list of pending fences waiting TLB
- * invaliations, protected by CT lock
- */
- struct list_head pending_fences;
- /**
- * @tlb_inval.pending_lock: protects @tlb_inval.pending_fences
- * and updating @tlb_inval.seqno_recv.
- */
- spinlock_t pending_lock;
- /**
- * @tlb_inval.fence_tdr: schedules a delayed call to
- * xe_gt_tlb_fence_timeout after the timeut interval is over.
- */
- struct delayed_work fence_tdr;
- /** @wtlb_invalidation.wq: schedules GT TLB invalidation jobs */
- struct workqueue_struct *job_wq;
- /** @tlb_inval.lock: protects TLB invalidation fences */
- spinlock_t lock;
- } tlb_inval;
+ struct xe_tlb_inval tlb_inval;
/**
* @ccs_mode: Number of compute engines enabled.
--
2.34.1
next prev parent reply other threads:[~2025-08-06 22:24 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-06 22:23 [PATCH 0/8] Add TLB invalidation abstraction stuartsummers
2025-08-06 22:23 ` [PATCH 1/8] drm/xe: Move explicit CT lock in TLB invalidation sequence stuartsummers
2025-08-07 17:10 ` Summers, Stuart
2025-08-07 17:40 ` Matthew Brost
2025-08-07 18:53 ` Summers, Stuart
2025-08-06 22:23 ` [PATCH 2/8] drm/xe: s/tlb_invalidation/tlb_inval stuartsummers
2025-08-06 22:23 ` stuartsummers [this message]
2025-08-06 22:24 ` [PATCH 4/8] drm/xe: Add xe_gt_tlb_invalidation_done_handler stuartsummers
2025-08-06 22:24 ` [PATCH 5/8] drm/xe: Decouple TLB invalidations from GT stuartsummers
2025-08-06 22:24 ` [PATCH 6/8] drm/xe: Prep TLB invalidation fence before sending stuartsummers
2025-08-06 22:24 ` [PATCH 7/8] drm/xe: Add helpers to send TLB invalidations stuartsummers
2025-08-06 22:24 ` [PATCH 8/8] drm/xe: Split TLB invalidation code in frontend and backend stuartsummers
2025-08-06 22:32 ` ✗ CI.checkpatch: warning for Add TLB invalidation abstraction (rev3) Patchwork
2025-08-06 22:33 ` ✓ CI.KUnit: success " Patchwork
2025-08-06 23:35 ` ✓ Xe.CI.BAT: " Patchwork
2025-08-07 0:57 ` ✗ Xe.CI.Full: failure " Patchwork
2025-08-07 14:58 ` Summers, Stuart
-- strict thread matches above, loose matches on Subject: below --
2025-08-07 20:39 [PATCH 0/8] Add TLB invalidation abstraction stuartsummers
2025-08-07 20:39 ` [PATCH 3/8] drm/xe: Add xe_tlb_inval structure stuartsummers
2025-08-07 19:36 [PATCH 0/8] Add TLB invalidation abstraction stuartsummers
2025-08-07 19:36 ` [PATCH 3/8] drm/xe: Add xe_tlb_inval structure stuartsummers
2025-07-30 20:45 [PATCH 0/8] Add TLB invalidation abstraction stuartsummers
2025-07-30 20:45 ` [PATCH 3/8] drm/xe: Add xe_tlb_inval structure stuartsummers
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