From: Bjorn Helgaas <helgaas@kernel.org>
To: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Cc: bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be,
magnus.damm@gmail.com, catalin.marinas@arm.com, will@kernel.org,
mturquette@baylibre.com, sboyd@kernel.org,
p.zabel@pengutronix.de, lizhi.hou@amd.com,
linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>,
Wolfram Sang <wsa+renesas@sang-engineering.com>
Subject: Re: [PATCH v3 4/9] dt-bindings: PCI: renesas,r9a08g045s33-pcie: Add documentation for the PCIe IP on Renesas RZ/G3S
Date: Fri, 8 Aug 2025 11:23:09 -0500 [thread overview]
Message-ID: <20250808162309.GA91528@bhelgaas> (raw)
In-Reply-To: <71d109a1-211a-45ee-8525-03f1859b789a@tuxon.dev>
On Fri, Aug 08, 2025 at 02:25:42PM +0300, Claudiu Beznea wrote:
> On 08.07.2025 19:34, Bjorn Helgaas wrote:
> > On Fri, Jul 04, 2025 at 07:14:04PM +0300, Claudiu wrote:
> >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >>
> >> The PCIe IP available on the Renesas RZ/G3S complies with the PCI Express
> >> Base Specification 4.0. It is designed for root complex applications and
> >> features a single-lane (x1) implementation. Add documentation for it.
> >
> >> +++ b/Documentation/devicetree/bindings/pci/renesas,r9a08g045s33-pcie.yaml
> >> + pcie@11e40000 {
> >> + compatible = "renesas,r9a08g045s33-pcie";
> >> + reg = <0 0x11e40000 0 0x10000>;
> >> + ranges = <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>;
> >> + dma-ranges = <0x42000000 0 0x48000000 0 0x48000000 0 0x38000000>;
> >> + bus-range = <0x0 0xff>;
> ...
> >> + device_type = "pci";
> >> + num-lanes = <1>;
> >> + #address-cells = <3>;
> >> + #size-cells = <2>;
> >> + power-domains = <&cpg>;
> >> + vendor-id = <0x1912>;
> >> + device-id = <0x0033>;
> >
> > Some of this is specific to a Root Port, not to the Root Complex
> > as a whole. E.g., device-type = "pci", num-lanes, vendor-id,
> > device-id, are Root Port properties. Some of the resets, clocks,
> > and interrupts might be as well.
> >
> > I really want to separate those out because even though this
> > particular version of this PCIe controller only supports a single
> > Root Port, there are other controllers (and possibly future
> > iterations of this controller) that support multiple Root Ports,
> > and it makes maintenance easier if the DT bindings and the driver
> > structures are similar.
>
> I'll ask the Renesas HW team about the resets and clocks as the HW
> manual don't offer any information about this.
>
> If they will confirm some of the clocks and/or resets could be
> controlled as part of a port then patch 3/9 "PCI: of_property:
> Restore the arguments of the next level parent" in this series will
> not be needed anymore. Would you prefer me to abandon it or post it
> as individual patch, if any?
[PATCH v3 3/9] ("PCI: of_property: Restore the arguments of the next
level parent") isn't specific to Renesas RZ/G3S and it doesn't look
like it has anything to do with clocks or resets. I don't understand
the patch well enough to know whether you should keep it, but it does
look like you should post it separate from the RZ/G3S driver.
When the devicetree contains required information specific to Root
Ports, I would prefer that to be in a separate "pcie@x,y" stanza, even
if there are clocks or resets that apply to all Root Ports.
"num-lanes" is obviously specific to an individual Root Port because
a Root Complex doesn't have lanes at all. But in the case of RZ/G3S,
I'm not sure "num-lanes" is required in the devicetree; I don't see it
being used in the driver. If it's not needed, I would just omit it.
It looks like the driver *does* need "vendor-id" and "device-id"
though, and those also are specific to a Root Port because a Root
Complex is not a PCI device and doesn't have its own Vendor or Device
ID. So I would like them to be in a per-Root Port stanza. If there
are resets or clocks that affect a Root Port but not the Root Complex
as a whole, they should also be in the Root Port stanza.
Bjorn
next prev parent reply other threads:[~2025-08-08 16:25 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-04 16:14 [PATCH v3 0/9] PCI: rzg3s-host: Add PCIe driver for Renesas RZ/G3S SoC Claudiu
2025-07-04 16:14 ` [PATCH v3 1/9] soc: renesas: rz-sysc: Add syscon/regmap support Claudiu
2025-07-04 16:14 ` [PATCH v3 2/9] clk: renesas: r9a08g045: Add clocks and resets support for PCIe Claudiu
2025-08-04 10:25 ` Geert Uytterhoeven
2025-07-04 16:14 ` [PATCH v3 3/9] PCI: of_property: Restore the arguments of the next level parent Claudiu
2025-08-20 17:47 ` Manivannan Sadhasivam
2025-08-21 7:40 ` Claudiu Beznea
2025-08-30 4:10 ` Manivannan Sadhasivam
2025-07-04 16:14 ` [PATCH v3 4/9] dt-bindings: PCI: renesas,r9a08g045s33-pcie: Add documentation for the PCIe IP on Renesas RZ/G3S Claudiu
2025-07-08 16:34 ` Bjorn Helgaas
2025-07-09 6:47 ` Krzysztof Kozlowski
2025-07-09 13:24 ` Bjorn Helgaas
2025-07-09 13:43 ` Krzysztof Kozlowski
2025-08-08 11:26 ` Claudiu Beznea
2025-08-08 12:03 ` Geert Uytterhoeven
2025-08-08 11:25 ` Claudiu Beznea
2025-08-08 16:23 ` Bjorn Helgaas [this message]
2025-08-28 19:11 ` claudiu beznea
2025-08-28 19:36 ` Bjorn Helgaas
2025-08-29 5:03 ` claudiu beznea
2025-07-04 16:14 ` [PATCH v3 5/9] PCI: rzg3s-host: Add Initial PCIe Host Driver for Renesas RZ/G3S SoC Claudiu
2025-07-08 19:24 ` Bjorn Helgaas
2025-08-08 11:24 ` Claudiu Beznea
2025-08-30 6:59 ` Manivannan Sadhasivam
2025-08-30 11:22 ` Claudiu Beznea
2025-08-31 4:07 ` Manivannan Sadhasivam
2025-09-01 9:25 ` Geert Uytterhoeven
2025-09-01 14:03 ` Manivannan Sadhasivam
2025-09-01 14:22 ` Geert Uytterhoeven
2025-09-01 15:54 ` Manivannan Sadhasivam
2025-09-08 13:06 ` Claudiu Beznea
2025-09-08 15:25 ` Manivannan Sadhasivam
2025-09-08 13:04 ` Claudiu Beznea
2025-09-09 12:48 ` Claudiu Beznea
2025-07-04 16:14 ` [PATCH v3 6/9] arm64: dts: renesas: r9a08g045s33: Add PCIe node Claudiu
2025-08-08 12:13 ` Geert Uytterhoeven
2025-07-04 16:14 ` [PATCH v3 7/9] arm64: dts: renesas: rzg3s-smarc-som: Update dma-ranges for PCIe Claudiu
2025-07-07 8:18 ` Biju Das
2025-07-08 10:09 ` Claudiu Beznea
2025-07-09 5:05 ` Biju Das
2025-08-08 11:28 ` Claudiu Beznea
2025-08-08 11:44 ` Biju Das
2025-08-08 12:03 ` Claudiu Beznea
2025-08-08 11:45 ` Geert Uytterhoeven
2025-07-08 16:55 ` Bjorn Helgaas
2025-08-08 11:24 ` Claudiu Beznea
2025-07-04 16:14 ` [PATCH v3 8/9] arm64: dts: renesas: rzg3s-smarc: Enable PCIe Claudiu
2025-07-04 16:14 ` [PATCH v3 9/9] arm64: defconfig: Enable PCIe for the Renesas RZ/G3S SoC Claudiu
2025-07-07 6:41 ` [PATCH v3 0/9] PCI: rzg3s-host: Add PCIe driver for " Wolfram Sang
2025-07-07 8:05 ` Claudiu Beznea
2025-07-07 12:01 ` Wolfram Sang
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