All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Hans Zhang <hans.zhang@cixtech.com>
Cc: mpillai@cadence.com, cix-kernel-upstream@cixtech.com,
	lpieralisi@kernel.org, bhelgaas@google.com,
	devicetree@vger.kernel.org, conor+dt@kernel.org,
	linux-pci@vger.kernel.org, mani@kernel.org, kw@linux.com,
	kwilczynski@kernel.org, krzk+dt@kernel.org,
	fugang.duan@cixtech.com, guoyin.chen@cixtech.com,
	peter.chen@cixtech.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 08/13] dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings
Date: Wed, 13 Aug 2025 10:43:28 -0500	[thread overview]
Message-ID: <20250813154328.GA114155-robh@kernel.org> (raw)
In-Reply-To: <cb35dfbd-2fa4-4125-bd87-9f86405983eb@cixtech.com>

On Wed, Aug 13, 2025 at 05:12:57PM +0800, Hans Zhang wrote:
> 
> 
> On 2025/8/13 16:31, Rob Herring (Arm) wrote:
> > EXTERNAL EMAIL
> > 
> > On Wed, 13 Aug 2025 12:23:26 +0800, hans.zhang@cixtech.com wrote:
> > > From: Hans Zhang <hans.zhang@cixtech.com>
> > > 
> > > Document the bindings for CIX Sky1 PCIe Controller configured in
> > > root complex mode with five root port.
> > > 
> > > Supports 4 INTx, MSI and MSI-x interrupts from the ARM GICv3 controller.
> > > 
> > > Signed-off-by: Hans Zhang <hans.zhang@cixtech.com>
> > > ---
> > >   .../bindings/pci/cix,sky1-pcie-host.yaml      | 79 +++++++++++++++++++
> > >   1 file changed, 79 insertions(+)
> > >   create mode 100644 Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> > > 
> > 
> > My bot found errors running 'make dt_binding_check' on your patch:
> > 
> > yamllint warnings/errors:
> > 
> > dtschema/dtc warnings/errors:
> > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dtb: /: 'compatible' is a required property
> >          from schema $id: http://devicetree.org/schemas/root-node.yaml#
> > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dtb: /: 'model' is a required property
> >          from schema $id: http://devicetree.org/schemas/root-node.yaml#
> > 
> > doc reference errors (make refcheckdocs):
> > 
> > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250813042331.1258272-9-hans.zhang@cixtech.com
> > 
> > The base for the series is generally the latest rc1. A different dependency
> > should be noted in *this* patch.
> > 
> > If you already ran 'make dt_binding_check' and didn't see the above
> > error(s), then make sure 'yamllint' is installed and dt-schema is up to
> > date:
> > 
> > pip3 install dtschema --upgrade
> > 
> > Please check and re-submit after running the above command yourself. Note
> > that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> > your schema. However, it must be unset to test all examples with your schema.
> > 
> 
> Dear Rob,
> 
> I'm very sorry. No errors were detected on my PC. I'll check my local
> environment and fix this issue in the next version.
> 
> If I have done anything wrong, please remind me.
> 
> 
> 
> hans@hans:~/code/kernel_org/linux$ export CROSS_COMPILE=/home/hans/cix/bringup_master/tools/gcc/arm-gnu-toolchain-12.3.rel1-x86_64-aarch64-none-linux-gnu/arm-gnu-toolchain-12.3.rel1-x86_64-aarch64-none-linux-gnu/bin/aarch64-none-linux-gnu-
> hans@hans:~/code/kernel_org/linux$ export ARCH=arm64
> hans@hans:~/code/kernel_org/linux$ make dt_binding_check
> DT_SCHEMA_FILES=Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
>   SCHEMA  Documentation/devicetree/bindings/processed-schema.json
>   CHKDT   ./Documentation/devicetree/bindings
>   LINT    ./Documentation/devicetree/bindings
>   DTEX Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dts
>   DTC [C]
> Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dtb
> hans@hans:~/code/kernel_org/linux$ make W=1 dt_binding_check
> DT_SCHEMA_FILES=Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml

DT_SCHEMA_FILES limits testing to only the matching pattern. 
Ultimately, you have to test without it.

Rob

  reply	other threads:[~2025-08-13 15:43 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-13  4:23 [PATCH v7 00/13] Enhance the PCIe controller driver for next generation controllers hans.zhang
2025-08-13  4:23 ` [PATCH v7 01/13] PCI: cadence: Add support for modules for cadence controller builds hans.zhang
2025-08-14 21:25   ` Bjorn Helgaas
2025-08-13  4:23 ` [PATCH v7 02/13] PCI: cadence: Split PCIe controller header file hans.zhang
2025-08-14 21:16   ` Bjorn Helgaas
2025-08-18  2:01     ` Manikandan Karunakaran Pillai
2025-08-13  4:23 ` [PATCH v7 03/13] PCI: cadence: Add register definitions for HPA(High Perf Architecture) hans.zhang
2025-08-13 19:17   ` Krzysztof Kozlowski
2025-08-14  1:29     ` Manikandan Karunakaran Pillai
2025-08-14 21:35   ` Bjorn Helgaas
2025-08-13  4:23 ` [PATCH v7 04/13] PCI: cadence: Split PCIe EP support into common and specific functions hans.zhang
2025-08-14 21:41   ` Bjorn Helgaas
2025-08-13  4:23 ` [PATCH v7 05/13] PCI: cadence: Split PCIe RP " hans.zhang
2025-08-14 21:48   ` Bjorn Helgaas
2025-08-13  4:23 ` [PATCH v7 06/13] PCI: cadence: Split the common functions for PCIe controller support hans.zhang
2025-08-13  4:23 ` [PATCH v7 07/13] PCI: cadence: Add support for High Performance Arch(HPA) controller hans.zhang
2025-08-14 22:14   ` Bjorn Helgaas
2025-08-13  4:23 ` [PATCH v7 08/13] dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings hans.zhang
2025-08-13  8:31   ` Rob Herring (Arm)
2025-08-13  9:12     ` Hans Zhang
2025-08-13 15:43       ` Rob Herring [this message]
2025-08-14  1:22         ` Hans Zhang
2025-08-13 19:08       ` Krzysztof Kozlowski
2025-08-14  1:26         ` Hans Zhang
2025-08-13 15:44   ` Rob Herring
2025-08-14  1:23     ` Hans Zhang
2025-08-13  4:23 ` [PATCH v7 09/13] PCI: Add Cix Technology Vendor and Device ID hans.zhang
2025-08-14 22:23   ` Bjorn Helgaas
2025-08-15  3:32     ` Peter Chen
2025-08-15 14:27       ` Bjorn Helgaas
2025-08-13  4:23 ` [PATCH v7 10/13] PCI: sky1: Add PCIe host support for CIX Sky1 hans.zhang
2025-08-13 19:16   ` Krzysztof Kozlowski
2025-08-14  1:29     ` Hans Zhang
2025-08-14 22:46   ` Bjorn Helgaas
2025-08-15  7:53     ` Hans Zhang
2025-08-13  4:23 ` [PATCH v7 11/13] MAINTAINERS: add entry for CIX Sky1 PCIe driver hans.zhang
2025-08-13  4:23 ` [PATCH v7 12/13] arm64: dts: cix: Add PCIe Root Complex on sky1 hans.zhang
2025-08-13  4:23 ` [PATCH v7 13/13] arm64: dts: cix: Enable PCIe on the Orion O6 board hans.zhang
2025-08-13 19:14 ` [PATCH v7 00/13] Enhance the PCIe controller driver for next generation controllers Krzysztof Kozlowski
2025-08-14  1:37   ` Hans Zhang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250813154328.GA114155-robh@kernel.org \
    --to=robh@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=cix-kernel-upstream@cixtech.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=fugang.duan@cixtech.com \
    --cc=guoyin.chen@cixtech.com \
    --cc=hans.zhang@cixtech.com \
    --cc=krzk+dt@kernel.org \
    --cc=kw@linux.com \
    --cc=kwilczynski@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=mani@kernel.org \
    --cc=mpillai@cadence.com \
    --cc=peter.chen@cixtech.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.