From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>, Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Cornelia Huck <cohuck@redhat.com>
Subject: [PATCH v3 2/6] KVM: arm64: Handle RASv1p1 registers
Date: Sun, 17 Aug 2025 21:21:54 +0100 [thread overview]
Message-ID: <20250817202158.395078-3-maz@kernel.org> (raw)
In-Reply-To: <20250817202158.395078-1-maz@kernel.org>
FEAT_RASv1p1 system registeres are not handled at all so far.
KVM will give an embarassed warning on the console and inject
an UNDEF, despite RASv1p1 being exposed to the guest on suitable HW.
Handle these registers similarly to FEAT_RAS, with the added fun
that there are *two* way to indicate the presence of FEAT_RASv1p1.
Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/sys_regs.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 82ffb3b3b3cf7..feb1a7a708e25 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2697,6 +2697,18 @@ static bool access_ras(struct kvm_vcpu *vcpu,
struct kvm *kvm = vcpu->kvm;
switch(reg_to_encoding(r)) {
+ case SYS_ERXPFGCDN_EL1:
+ case SYS_ERXPFGCTL_EL1:
+ case SYS_ERXPFGF_EL1:
+ case SYS_ERXMISC2_EL1:
+ case SYS_ERXMISC3_EL1:
+ if (!(kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1) ||
+ (kvm_has_feat_enum(kvm, ID_AA64PFR0_EL1, RAS, IMP) &&
+ kvm_has_feat(kvm, ID_AA64PFR1_EL1, RAS_frac, RASv1p1)))) {
+ kvm_inject_undefined(vcpu);
+ return false;
+ }
+ break;
default:
if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP)) {
kvm_inject_undefined(vcpu);
@@ -3063,8 +3075,13 @@ static const struct sys_reg_desc sys_reg_descs[] = {
{ SYS_DESC(SYS_ERXCTLR_EL1), access_ras },
{ SYS_DESC(SYS_ERXSTATUS_EL1), access_ras },
{ SYS_DESC(SYS_ERXADDR_EL1), access_ras },
+ { SYS_DESC(SYS_ERXPFGF_EL1), access_ras },
+ { SYS_DESC(SYS_ERXPFGCTL_EL1), access_ras },
+ { SYS_DESC(SYS_ERXPFGCDN_EL1), access_ras },
{ SYS_DESC(SYS_ERXMISC0_EL1), access_ras },
{ SYS_DESC(SYS_ERXMISC1_EL1), access_ras },
+ { SYS_DESC(SYS_ERXMISC2_EL1), access_ras },
+ { SYS_DESC(SYS_ERXMISC3_EL1), access_ras },
MTE_REG(TFSR_EL1),
MTE_REG(TFSRE0_EL1),
--
2.39.2
next prev parent reply other threads:[~2025-08-17 20:22 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-17 20:21 [PATCH v3 0/6] KVM: arm64: FEAT_RASv1p1 support and RAS selection Marc Zyngier
2025-08-17 20:21 ` [PATCH v3 1/6] arm64: Add capability denoting FEAT_RASv1p1 Marc Zyngier
2025-08-18 12:32 ` Cornelia Huck
2025-08-17 20:21 ` Marc Zyngier [this message]
2025-08-18 12:34 ` [PATCH v3 2/6] KVM: arm64: Handle RASv1p1 registers Cornelia Huck
2025-08-21 13:13 ` Ben Horgan
2025-08-21 13:37 ` Marc Zyngier
2025-08-21 13:44 ` Ben Horgan
2025-08-17 20:21 ` [PATCH v3 3/6] KVM: arm64: Ignore HCR_EL2.FIEN set by L1 guest's EL2 Marc Zyngier
2025-08-19 10:24 ` Joey Gouly
2025-08-17 20:21 ` [PATCH v3 4/6] KVM: arm64: Make ID_AA64PFR0_EL1.RAS writable Marc Zyngier
2025-08-18 12:37 ` Cornelia Huck
2025-08-17 20:21 ` [PATCH v3 5/6] KVM: arm64: Make ID_AA64PFR1_EL1.RAS_frac writable Marc Zyngier
2025-08-18 12:43 ` Cornelia Huck
2025-08-17 20:21 ` [PATCH v3 6/6] KVM: arm64: Get rid of ARM64_FEATURE_MASK() Marc Zyngier
2025-08-21 11:29 ` Ben Horgan
2025-08-21 13:43 ` Marc Zyngier
2025-08-22 0:01 ` [PATCH v3 0/6] KVM: arm64: FEAT_RASv1p1 support and RAS selection Oliver Upton
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