[PATCH v5 08/13] drm/stm: ltdc: handle lvds pixel clock

[PATCH v5 08/13] drm/stm: ltdc: handle lvds pixel clock

[Raphael Gallais-Pou]

From: Yannick Fertre <yannick.fertre@foss.st.com>

Handle LVDS pixel clock.

The LTDC operates with multiple clock domains for register access,
requiring all clocks to be provided during read/write operations.  This
imposes a dependency between the LVDS and LTDC to access correctly all
LTDC registers.  And because both IPs' pixel rates must be synchronized,
the LTDC has to handle the LVDS clock.

Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
---
 drivers/gpu/drm/stm/ltdc.c | 22 +++++++++++++++++++++-
 drivers/gpu/drm/stm/ltdc.h |  1 +
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 17548dd3484a0a3e1015c58c752b80f8892a0ff7..f84a9a8590f0653e422798ff61804d7c3966caef 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -837,6 +837,12 @@ ltdc_crtc_mode_valid(struct drm_crtc *crtc,
 	int target_max = target + CLK_TOLERANCE_HZ;
 	int result;
 
+	if (ldev->lvds_clk) {
+		result = clk_round_rate(ldev->lvds_clk, target);
+		drm_dbg_driver(crtc->dev, "lvds pixclk rate target %d, available %d\n",
+			       target, result);
+	}
+
 	result = clk_round_rate(ldev->pixel_clk, target);
 
 	DRM_DEBUG_DRIVER("clk rate target %d, available %d\n", target, result);
@@ -1878,6 +1884,8 @@ void ltdc_suspend(struct drm_device *ddev)
 	clk_disable_unprepare(ldev->pixel_clk);
 	if (ldev->bus_clk)
 		clk_disable_unprepare(ldev->bus_clk);
+	if (ldev->lvds_clk)
+		clk_disable_unprepare(ldev->lvds_clk);
 }
 
 int ltdc_resume(struct drm_device *ddev)
@@ -1895,8 +1903,16 @@ int ltdc_resume(struct drm_device *ddev)
 
 	if (ldev->bus_clk) {
 		ret = clk_prepare_enable(ldev->bus_clk);
-		if (ret)
+		if (ret) {
 			drm_err(ddev, "failed to enable bus clock (%d)\n", ret);
+			return ret;
+		}
+	}
+
+	if (ldev->lvds_clk) {
+		ret = clk_prepare_enable(ldev->lvds_clk);
+		if (ret)
+			drm_err(ddev, "failed to prepare lvds clock\n");
 	}
 
 	return ret;
@@ -1981,6 +1997,10 @@ int ltdc_load(struct drm_device *ddev)
 		}
 	}
 
+	ldev->lvds_clk = devm_clk_get(dev, "lvds");
+	if (IS_ERR(ldev->lvds_clk))
+		ldev->lvds_clk = NULL;
+
 	rstc = devm_reset_control_get_exclusive(dev, NULL);
 
 	mutex_init(&ldev->err_lock);
diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
index ddfa8ae61a7ba5dc446fae647562d0ec8e6953e1..17b51a7ce28eee5de6d24ca943ca3b1f48695dfd 100644
--- a/drivers/gpu/drm/stm/ltdc.h
+++ b/drivers/gpu/drm/stm/ltdc.h
@@ -48,6 +48,7 @@ struct ltdc_device {
 	void __iomem *regs;
 	struct regmap *regmap;
 	struct clk *pixel_clk;	/* lcd pixel clock */
+	struct clk *lvds_clk;	/* lvds pixel clock */
 	struct clk *bus_clk;	/* bus clock */
 	struct mutex err_lock;	/* protecting error_status */
 	struct ltdc_caps caps;

-- 
2.25.1

Re: [PATCH v5 08/13] drm/stm: ltdc: handle lvds pixel clock

[kernel test robot]

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250822-drm-misc-next-v5-8-9c825e28f733@foss.st.com>
References: <20250822-drm-misc-next-v5-8-9c825e28f733@foss.st.com>
TO: "Raphael Gallais-Pou" <raphael.gallais-pou@foss.st.com>
TO: Yannick Fertre <yannick.fertre@foss.st.com>
TO: Philippe Cornu <philippe.cornu@foss.st.com>
TO: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
TO: Maxime Ripard <mripard@kernel.org>
TO: Thomas Zimmermann <tzimmermann@suse.de>
TO: David Airlie <airlied@gmail.com>
TO: Simona Vetter <simona@ffwll.ch>
TO: Rob Herring <robh@kernel.org>
TO: Krzysztof Kozlowski <krzk@kernel.org>
TO: Conor Dooley <conor+dt@kernel.org>
TO: Maxime Coquelin <mcoquelin.stm32@gmail.com>
TO: Alexandre Torgue <alexandre.torgue@foss.st.com>
TO: Catalin Marinas <catalin.marinas@arm.com>
TO: Will Deacon <will@kernel.org>
TO: Christophe Roullier <christophe.roullier@foss.st.com>
CC: dri-devel@lists.freedesktop.org
CC: devicetree@vger.kernel.org
CC: linux-stm32@st-md-mailman.stormreply.com
CC: linux-arm-kernel@lists.infradead.org
CC: linux-kernel@vger.kernel.org

Hi Raphael,

kernel test robot noticed the following build warnings:

[auto build test WARNING on c8cea4371e5eca30cda8660aabb337747dabc51d]

url:    https://github.com/intel-lab-lkp/linux/commits/Raphael-Gallais-Pou/dt-bindings-display-st-add-two-new-compatibles-to-LTDC-device/20250822-224549
base:   c8cea4371e5eca30cda8660aabb337747dabc51d
patch link:    https://lore.kernel.org/r/20250822-drm-misc-next-v5-8-9c825e28f733%40foss.st.com
patch subject: [PATCH v5 08/13] drm/stm: ltdc: handle lvds pixel clock
:::::: branch date: 2 days ago
:::::: commit date: 2 days ago
config: arm-randconfig-r072-20250824 (https://download.01.org/0day-ci/archive/20250825/202508250449.oAIDCFbM-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 8.5.0

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>
| Closes: https://lore.kernel.org/r/202508250449.oAIDCFbM-lkp@intel.com/

New smatch warnings:
drivers/gpu/drm/stm/ltdc.c:1918 ltdc_resume() warn: 'ldev->bus_clk' from clk_prepare_enable() not released on lines: 1918.

Old smatch warnings:
drivers/gpu/drm/stm/ltdc.c:944 ltdc_crtc_mode_set_nofb() warn: pm_runtime_get_sync() also returns 1 on success
drivers/gpu/drm/stm/ltdc.c:1918 ltdc_resume() warn: 'ldev->pixel_clk' from clk_prepare_enable() not released on lines: 1908,1918.
drivers/gpu/drm/stm/ltdc.c:2097 ltdc_load() warn: 'ldev->bus_clk' from clk_prepare_enable() not released on lines: 2097.
drivers/gpu/drm/stm/ltdc.c:2097 ltdc_load() warn: 'ldev->pixel_clk' from clk_prepare_enable() not released on lines: 1963.

vim +1918 drivers/gpu/drm/stm/ltdc.c

df61c776657fa5 Yannick Fertré 2019-03-21  1890  
df61c776657fa5 Yannick Fertré 2019-03-21  1891  int ltdc_resume(struct drm_device *ddev)
df61c776657fa5 Yannick Fertré 2019-03-21  1892  {
df61c776657fa5 Yannick Fertré 2019-03-21  1893  	struct ltdc_device *ldev = ddev->dev_private;
df61c776657fa5 Yannick Fertré 2019-03-21  1894  	int ret;
df61c776657fa5 Yannick Fertré 2019-03-21  1895  
df61c776657fa5 Yannick Fertré 2019-03-21  1896  	DRM_DEBUG_DRIVER("\n");
df61c776657fa5 Yannick Fertré 2019-03-21  1897  
df61c776657fa5 Yannick Fertré 2019-03-21  1898  	ret = clk_prepare_enable(ldev->pixel_clk);
df61c776657fa5 Yannick Fertré 2019-03-21  1899  	if (ret) {
df61c776657fa5 Yannick Fertré 2019-03-21  1900  		DRM_ERROR("failed to enable pixel clock (%d)\n", ret);
df61c776657fa5 Yannick Fertré 2019-03-21  1901  		return ret;
df61c776657fa5 Yannick Fertré 2019-03-21  1902  	}
df61c776657fa5 Yannick Fertré 2019-03-21  1903  
4bc19104512f12 Yannick Fertre 2025-08-22  1904  	if (ldev->bus_clk) {
4bc19104512f12 Yannick Fertre 2025-08-22  1905  		ret = clk_prepare_enable(ldev->bus_clk);
8ed2dad23c5fb4 Yannick Fertre 2025-08-22  1906  		if (ret) {
4bc19104512f12 Yannick Fertre 2025-08-22  1907  			drm_err(ddev, "failed to enable bus clock (%d)\n", ret);
8ed2dad23c5fb4 Yannick Fertre 2025-08-22  1908  			return ret;
8ed2dad23c5fb4 Yannick Fertre 2025-08-22  1909  		}
8ed2dad23c5fb4 Yannick Fertre 2025-08-22  1910  	}
8ed2dad23c5fb4 Yannick Fertre 2025-08-22  1911  
8ed2dad23c5fb4 Yannick Fertre 2025-08-22  1912  	if (ldev->lvds_clk) {
8ed2dad23c5fb4 Yannick Fertre 2025-08-22  1913  		ret = clk_prepare_enable(ldev->lvds_clk);
8ed2dad23c5fb4 Yannick Fertre 2025-08-22  1914  		if (ret)
8ed2dad23c5fb4 Yannick Fertre 2025-08-22  1915  			drm_err(ddev, "failed to prepare lvds clock\n");
4bc19104512f12 Yannick Fertre 2025-08-22  1916  	}
4bc19104512f12 Yannick Fertre 2025-08-22  1917  
4bc19104512f12 Yannick Fertre 2025-08-22 @1918  	return ret;
df61c776657fa5 Yannick Fertré 2019-03-21  1919  }
df61c776657fa5 Yannick Fertré 2019-03-21  1920  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH v5 08/13] drm/stm: ltdc: handle lvds pixel clock

[Philippe CORNU]

On 8/22/25 16:34, Raphael Gallais-Pou wrote:
> From: Yannick Fertre <yannick.fertre@foss.st.com>
> 
> Handle LVDS pixel clock.
> 
> The LTDC operates with multiple clock domains for register access,
> requiring all clocks to be provided during read/write operations.  This
> imposes a dependency between the LVDS and LTDC to access correctly all
> LTDC registers.  And because both IPs' pixel rates must be synchronized,
> the LTDC has to handle the LVDS clock.
> 
> Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com>
> Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
> Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
> ---
>   drivers/gpu/drm/stm/ltdc.c | 22 +++++++++++++++++++++-
>   drivers/gpu/drm/stm/ltdc.h |  1 +
>   2 files changed, 22 insertions(+), 1 deletion(-)

Hi Raphael,

Acked-by: Philippe Cornu <philippe.cornu@foss.st.com>

Thanks a lot
Philippe :-)