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From: Andrew Jones <ajones@ventanamicro.com>
To: BillXiang <xiangwencheng@lanxincomputing.com>
Cc: anup@brainfault.org, kvm-riscv@lists.infradead.org,
	 linux-kernel@vger.kernel.org, paul.walmsley@sifive.com,
	palmer@dabbelt.com,  aou@eecs.berkeley.edu, alex@ghiti.fr,
	atishp@rivosinc.com
Subject: Re: [PATCH] riscv: Move user-visible sbi ext ids to uapi
Date: Wed, 24 Sep 2025 07:54:41 -0500	[thread overview]
Message-ID: <20250924-7e9764acec6722b5ef29ce7d@orel> (raw)
In-Reply-To: <1be32bd0-a3d1-4fea-8f22-e050f664907b@lanxincomputing.com>

On Wed, Sep 24, 2025 at 10:35:25AM +0800, BillXiang wrote:
> On 9/24/2025 4:14 AM, Andrew Jones wrote:
> > On Wed, Sep 17, 2025 at 04:52:46PM +0800, BillXiang wrote:
> >> Move those sbi ext ids to uapi because they will be forwarded
> >> to user space by kvm.
> > 
> > We don't need to publish the IDs in UAPI since they are already known to
> > userspace by reading the SBI spec. Indeed QEMU already defines all of
> > these except for the experimental range.>
> > What problem are you trying to solve?
> 
> 
> I'm working on rust-vmm[1], which auto-generates the ID constants
> from uapi/kvm.h via bindgen[2]. Any ID that isn't exported there is
> invisible to us. I expect other VMMs besides QEMU will need these
> numbers as well, so let's keep one canonical definition in the UAPI
> headers for everyone to share.

But KVM isn't the authority on these IDs, the spec is. KVM and its
userspaces are just some implementations of SBI. M-mode software
and other hypervisors also implements SBI.

For Rust you can use https://docs.rs/sbi-spec/latest/sbi_spec/ to get
the constants you're looking for.

Thanks,
drew

> 
> 
> [1] https://github.com/rust-vmm
> [2] https://crates.io/crates/bindgen
> 
> > 
> > Thanks,
> > drew
> > 
> >>
> >> Signed-off-by: BillXiang <xiangwencheng@lanxincomputing.com>
> >> ---
> >>   arch/riscv/include/asm/sbi.h      | 16 +-----------
> >>   arch/riscv/include/uapi/asm/sbi.h | 43 +++++++++++++++++++++++++++++++
> >>   2 files changed, 44 insertions(+), 15 deletions(-)
> >>   create mode 100644 arch/riscv/include/uapi/asm/sbi.h
> >>
> >> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> >> index 341e74238aa0..e196feaabb2e 100644
> >> --- a/arch/riscv/include/asm/sbi.h
> >> +++ b/arch/riscv/include/asm/sbi.h
> >> @@ -10,13 +10,12 @@
> >>   #include <linux/types.h>
> >>   #include <linux/cpumask.h>
> >>   #include <linux/jump_label.h>
> >> +#include <uapi/asm/sbi.h>
> >>   
> >>   #ifdef CONFIG_RISCV_SBI
> >>   enum sbi_ext_id {
> >>   #ifdef CONFIG_RISCV_SBI_V01
> >>   	SBI_EXT_0_1_SET_TIMER = 0x0,
> >> -	SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
> >> -	SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
> >>   	SBI_EXT_0_1_CLEAR_IPI = 0x3,
> >>   	SBI_EXT_0_1_SEND_IPI = 0x4,
> >>   	SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
> >> @@ -37,13 +36,6 @@ enum sbi_ext_id {
> >>   	SBI_EXT_NACL = 0x4E41434C,
> >>   	SBI_EXT_FWFT = 0x46574654,
> >>   
> >> -	/* Experimentals extensions must lie within this range */
> >> -	SBI_EXT_EXPERIMENTAL_START = 0x08000000,
> >> -	SBI_EXT_EXPERIMENTAL_END = 0x08FFFFFF,
> >> -
> >> -	/* Vendor extensions must lie within this range */
> >> -	SBI_EXT_VENDOR_START = 0x09000000,
> >> -	SBI_EXT_VENDOR_END = 0x09FFFFFF,
> >>   };
> >>   
> >>   enum sbi_ext_base_fid {
> >> @@ -263,12 +255,6 @@ enum sbi_pmu_ctr_type {
> >>   #define SBI_PMU_STOP_FLAG_RESET BIT(0)
> >>   #define SBI_PMU_STOP_FLAG_TAKE_SNAPSHOT BIT(1)
> >>   
> >> -enum sbi_ext_dbcn_fid {
> >> -	SBI_EXT_DBCN_CONSOLE_WRITE = 0,
> >> -	SBI_EXT_DBCN_CONSOLE_READ = 1,
> >> -	SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
> >> -};
> >> -
> >>   /* SBI STA (steal-time accounting) extension */
> >>   enum sbi_ext_sta_fid {
> >>   	SBI_EXT_STA_STEAL_TIME_SET_SHMEM = 0,
> >> diff --git a/arch/riscv/include/uapi/asm/sbi.h b/arch/riscv/include/uapi/asm/sbi.h
> >> new file mode 100644
> >> index 000000000000..d29ac0abeefe
> >> --- /dev/null
> >> +++ b/arch/riscv/include/uapi/asm/sbi.h
> >> @@ -0,0 +1,43 @@
> >> +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
> >> +/*
> >> + * Copyright (C) 2025 Lanxincomputing Corporation or its affiliates.
> >> + *
> >> + * Authors:
> >> + *     BillXiang <xiangwencheng@lanxincomputing.com>
> >> + */
> >> +
> >> +#ifndef _UAPI_ASM_RISCV_SBI_H
> >> +#define _UAPI_ASM_RISCV_SBI_H
> >> +
> >> +
> >> +enum SBI_EXT_ID {
> >> +	/*
> >> +	* The CONSOLE_GETCHAR/CONSOLE_PUTCHAR SBI calls cannot be
> >> +	* handled in kernel so they will be forwarded to userspace by kvm.
> >> +	*/
> >> +	SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
> >> +	SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
> >> +	/*
> >> +	* Both SBI experimental and vendor extensions are
> >> +	* unconditionally forwarded to userspace by kvm.
> >> +	*/
> >> +	/* Experimentals extensions must lie within this range */
> >> +	SBI_EXT_EXPERIMENTAL_START = 0x08000000,
> >> +	SBI_EXT_EXPERIMENTAL_END = 0x08FFFFFF,
> >> +
> >> +	/* Vendor extensions must lie within this range */
> >> +	SBI_EXT_VENDOR_START = 0x09000000,
> >> +	SBI_EXT_VENDOR_END = 0x09FFFFFF,
> >> +};
> >> +
> >> +/*
> >> +* The SBI debug console functions are unconditionally
> >> +* forwarded to the userspace by kvm.
> >> +*/
> >> +enum sbi_ext_dbcn_fid {
> >> +	SBI_EXT_DBCN_CONSOLE_WRITE = 0,
> >> +	SBI_EXT_DBCN_CONSOLE_READ = 1,
> >> +	SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
> >> +};
> >> +
> >> +#endif /* _UAPI_ASM_RISCV_SBI_H */
> >> \ No newline at end of file
> >> -- 
> >> 2.43.0

-- 
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: BillXiang <xiangwencheng@lanxincomputing.com>
Cc: anup@brainfault.org, kvm-riscv@lists.infradead.org,
	 linux-kernel@vger.kernel.org, paul.walmsley@sifive.com,
	palmer@dabbelt.com,  aou@eecs.berkeley.edu, alex@ghiti.fr,
	atishp@rivosinc.com
Subject: Re: [PATCH] riscv: Move user-visible sbi ext ids to uapi
Date: Wed, 24 Sep 2025 07:54:41 -0500	[thread overview]
Message-ID: <20250924-7e9764acec6722b5ef29ce7d@orel> (raw)
In-Reply-To: <1be32bd0-a3d1-4fea-8f22-e050f664907b@lanxincomputing.com>

On Wed, Sep 24, 2025 at 10:35:25AM +0800, BillXiang wrote:
> On 9/24/2025 4:14 AM, Andrew Jones wrote:
> > On Wed, Sep 17, 2025 at 04:52:46PM +0800, BillXiang wrote:
> >> Move those sbi ext ids to uapi because they will be forwarded
> >> to user space by kvm.
> > 
> > We don't need to publish the IDs in UAPI since they are already known to
> > userspace by reading the SBI spec. Indeed QEMU already defines all of
> > these except for the experimental range.>
> > What problem are you trying to solve?
> 
> 
> I'm working on rust-vmm[1], which auto-generates the ID constants
> from uapi/kvm.h via bindgen[2]. Any ID that isn't exported there is
> invisible to us. I expect other VMMs besides QEMU will need these
> numbers as well, so let's keep one canonical definition in the UAPI
> headers for everyone to share.

But KVM isn't the authority on these IDs, the spec is. KVM and its
userspaces are just some implementations of SBI. M-mode software
and other hypervisors also implements SBI.

For Rust you can use https://docs.rs/sbi-spec/latest/sbi_spec/ to get
the constants you're looking for.

Thanks,
drew

> 
> 
> [1] https://github.com/rust-vmm
> [2] https://crates.io/crates/bindgen
> 
> > 
> > Thanks,
> > drew
> > 
> >>
> >> Signed-off-by: BillXiang <xiangwencheng@lanxincomputing.com>
> >> ---
> >>   arch/riscv/include/asm/sbi.h      | 16 +-----------
> >>   arch/riscv/include/uapi/asm/sbi.h | 43 +++++++++++++++++++++++++++++++
> >>   2 files changed, 44 insertions(+), 15 deletions(-)
> >>   create mode 100644 arch/riscv/include/uapi/asm/sbi.h
> >>
> >> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> >> index 341e74238aa0..e196feaabb2e 100644
> >> --- a/arch/riscv/include/asm/sbi.h
> >> +++ b/arch/riscv/include/asm/sbi.h
> >> @@ -10,13 +10,12 @@
> >>   #include <linux/types.h>
> >>   #include <linux/cpumask.h>
> >>   #include <linux/jump_label.h>
> >> +#include <uapi/asm/sbi.h>
> >>   
> >>   #ifdef CONFIG_RISCV_SBI
> >>   enum sbi_ext_id {
> >>   #ifdef CONFIG_RISCV_SBI_V01
> >>   	SBI_EXT_0_1_SET_TIMER = 0x0,
> >> -	SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
> >> -	SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
> >>   	SBI_EXT_0_1_CLEAR_IPI = 0x3,
> >>   	SBI_EXT_0_1_SEND_IPI = 0x4,
> >>   	SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
> >> @@ -37,13 +36,6 @@ enum sbi_ext_id {
> >>   	SBI_EXT_NACL = 0x4E41434C,
> >>   	SBI_EXT_FWFT = 0x46574654,
> >>   
> >> -	/* Experimentals extensions must lie within this range */
> >> -	SBI_EXT_EXPERIMENTAL_START = 0x08000000,
> >> -	SBI_EXT_EXPERIMENTAL_END = 0x08FFFFFF,
> >> -
> >> -	/* Vendor extensions must lie within this range */
> >> -	SBI_EXT_VENDOR_START = 0x09000000,
> >> -	SBI_EXT_VENDOR_END = 0x09FFFFFF,
> >>   };
> >>   
> >>   enum sbi_ext_base_fid {
> >> @@ -263,12 +255,6 @@ enum sbi_pmu_ctr_type {
> >>   #define SBI_PMU_STOP_FLAG_RESET BIT(0)
> >>   #define SBI_PMU_STOP_FLAG_TAKE_SNAPSHOT BIT(1)
> >>   
> >> -enum sbi_ext_dbcn_fid {
> >> -	SBI_EXT_DBCN_CONSOLE_WRITE = 0,
> >> -	SBI_EXT_DBCN_CONSOLE_READ = 1,
> >> -	SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
> >> -};
> >> -
> >>   /* SBI STA (steal-time accounting) extension */
> >>   enum sbi_ext_sta_fid {
> >>   	SBI_EXT_STA_STEAL_TIME_SET_SHMEM = 0,
> >> diff --git a/arch/riscv/include/uapi/asm/sbi.h b/arch/riscv/include/uapi/asm/sbi.h
> >> new file mode 100644
> >> index 000000000000..d29ac0abeefe
> >> --- /dev/null
> >> +++ b/arch/riscv/include/uapi/asm/sbi.h
> >> @@ -0,0 +1,43 @@
> >> +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
> >> +/*
> >> + * Copyright (C) 2025 Lanxincomputing Corporation or its affiliates.
> >> + *
> >> + * Authors:
> >> + *     BillXiang <xiangwencheng@lanxincomputing.com>
> >> + */
> >> +
> >> +#ifndef _UAPI_ASM_RISCV_SBI_H
> >> +#define _UAPI_ASM_RISCV_SBI_H
> >> +
> >> +
> >> +enum SBI_EXT_ID {
> >> +	/*
> >> +	* The CONSOLE_GETCHAR/CONSOLE_PUTCHAR SBI calls cannot be
> >> +	* handled in kernel so they will be forwarded to userspace by kvm.
> >> +	*/
> >> +	SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
> >> +	SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
> >> +	/*
> >> +	* Both SBI experimental and vendor extensions are
> >> +	* unconditionally forwarded to userspace by kvm.
> >> +	*/
> >> +	/* Experimentals extensions must lie within this range */
> >> +	SBI_EXT_EXPERIMENTAL_START = 0x08000000,
> >> +	SBI_EXT_EXPERIMENTAL_END = 0x08FFFFFF,
> >> +
> >> +	/* Vendor extensions must lie within this range */
> >> +	SBI_EXT_VENDOR_START = 0x09000000,
> >> +	SBI_EXT_VENDOR_END = 0x09FFFFFF,
> >> +};
> >> +
> >> +/*
> >> +* The SBI debug console functions are unconditionally
> >> +* forwarded to the userspace by kvm.
> >> +*/
> >> +enum sbi_ext_dbcn_fid {
> >> +	SBI_EXT_DBCN_CONSOLE_WRITE = 0,
> >> +	SBI_EXT_DBCN_CONSOLE_READ = 1,
> >> +	SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
> >> +};
> >> +
> >> +#endif /* _UAPI_ASM_RISCV_SBI_H */
> >> \ No newline at end of file
> >> -- 
> >> 2.43.0

  reply	other threads:[~2025-09-24 12:54 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-17  8:52 [PATCH] riscv: Move user-visible sbi ext ids to uapi BillXiang
2025-09-17  8:52 ` BillXiang
2025-09-23 20:14 ` Andrew Jones
2025-09-23 20:14   ` Andrew Jones
2025-09-24  2:35   ` BillXiang
2025-09-24  2:35     ` BillXiang
2025-09-24 12:54     ` Andrew Jones [this message]
2025-09-24 12:54       ` Andrew Jones
2025-09-25  2:09       ` BillXiang
2025-09-25  2:09         ` BillXiang
  -- strict thread matches above, loose matches on Subject: below --
2025-09-17  9:21 BillXiang
2025-10-08 18:17 ` Paul Walmsley
2025-10-08 20:06   ` Andrew Jones
2025-10-08 20:37     ` Paul Walmsley
2025-10-09  7:27       ` BillXiang
2025-10-09 15:07         ` Andrew Jones

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