From: Jamin Lin via <qemu-arm@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
<kane_chen@aspeedtech.com>
Subject: [PATCH v1 12/16] hw/arm/aspeed_ast27x0-ssp: Change to use Aspeed27x0CoprocessorState
Date: Wed, 8 Oct 2025 11:21:57 +0800 [thread overview]
Message-ID: <20251008032207.593353-13-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20251008032207.593353-1-jamin_lin@aspeedtech.com>
Refactor the AST27x0 SSP implementation to use the unified
Aspeed27x0CoprocessorState structure shared between SSP and TSP.
Previously, SSP and TSP each defined separate state structures
(Aspeed27x0SSPSoCState and Aspeed27x0TSPSoCState), which contained
identical members and caused unnecessary code duplication.
This change removes Aspeed27x0SSPSoCState and replaces it with
Aspeed27x0CoprocessorState, consolidating shared coprocessor state fields
into a single definition in aspeed_coprocessor.h.
This refactor unifies SSP and TSP under the same coprocessor state type,
improving code maintainability and consistency across Aspeed coprocessor
implementations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
include/hw/arm/aspeed_coprocessor.h | 4 ++--
hw/arm/aspeed_ast27x0-fc.c | 2 +-
hw/arm/aspeed_ast27x0-ssp.c | 8 ++++----
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/hw/arm/aspeed_coprocessor.h b/include/hw/arm/aspeed_coprocessor.h
index 2c10327456..89e46100a5 100644
--- a/include/hw/arm/aspeed_coprocessor.h
+++ b/include/hw/arm/aspeed_coprocessor.h
@@ -42,7 +42,7 @@ struct AspeedCoprocessorClass {
qemu_irq (*get_irq)(void *ctx, int dev);
};
-struct Aspeed27x0SSPSoCState {
+struct Aspeed27x0CoprocessorState {
AspeedCoprocessorState parent;
AspeedINTCState intc[2];
UnimplementedDeviceState ipc[2];
@@ -52,7 +52,7 @@ struct Aspeed27x0SSPSoCState {
};
#define TYPE_ASPEED27X0SSP_SOC "aspeed27x0ssp-soc"
-OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0SSPSoCState, ASPEED27X0SSP_SOC)
+OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0CoprocessorState, ASPEED27X0SSP_SOC)
struct Aspeed27x0TSPSoCState {
AspeedCoprocessorState parent;
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index b34cd54e4e..cd09a2dcf0 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -42,7 +42,7 @@ struct Ast2700FCState {
Clock *tsp_sysclk;
Aspeed27x0SoCState ca35;
- Aspeed27x0SSPSoCState ssp;
+ Aspeed27x0CoprocessorState ssp;
Aspeed27x0TSPSoCState tsp;
bool mmio_exec;
diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
index 0e68c0f6a8..e3cf4e87f3 100644
--- a/hw/arm/aspeed_ast27x0-ssp.c
+++ b/hw/arm/aspeed_ast27x0-ssp.c
@@ -108,7 +108,7 @@ static struct nvic_intc_irq_info ast2700_ssp_intcmap[] = {
static qemu_irq aspeed_soc_ast27x0ssp_get_irq(void *ctx, int dev)
{
AspeedCoprocessorState *s = (AspeedCoprocessorState *)ctx;
- Aspeed27x0SSPSoCState *a = ASPEED27X0SSP_SOC(s);
+ Aspeed27x0CoprocessorState *a = ASPEED27X0SSP_SOC(s);
AspeedCoprocessorClass *sc = ASPEED_COPROCESSOR_GET_CLASS(s);
int or_idx;
@@ -130,7 +130,7 @@ static qemu_irq aspeed_soc_ast27x0ssp_get_irq(void *ctx, int dev)
static void aspeed_soc_ast27x0ssp_init(Object *obj)
{
- Aspeed27x0SSPSoCState *a = ASPEED27X0SSP_SOC(obj);
+ Aspeed27x0CoprocessorState *a = ASPEED27X0SSP_SOC(obj);
AspeedCoprocessorState *s = ASPEED_COPROCESSOR(obj);
AspeedCoprocessorClass *sc = ASPEED_COPROCESSOR_GET_CLASS(s);
int i;
@@ -161,7 +161,7 @@ static void aspeed_soc_ast27x0ssp_init(Object *obj)
static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
{
- Aspeed27x0SSPSoCState *a = ASPEED27X0SSP_SOC(dev_soc);
+ Aspeed27x0CoprocessorState *a = ASPEED27X0SSP_SOC(dev_soc);
AspeedCoprocessorState *s = ASPEED_COPROCESSOR(dev_soc);
AspeedCoprocessorClass *sc = ASPEED_COPROCESSOR_GET_CLASS(s);
DeviceState *armv7m;
@@ -289,7 +289,7 @@ static const TypeInfo aspeed_soc_ast27x0ssp_types[] = {
{
.name = TYPE_ASPEED27X0SSP_SOC,
.parent = TYPE_ASPEED_COPROCESSOR,
- .instance_size = sizeof(Aspeed27x0SSPSoCState),
+ .instance_size = sizeof(Aspeed27x0CoprocessorState),
.instance_init = aspeed_soc_ast27x0ssp_init,
.class_init = aspeed_soc_ast27x0ssp_class_init,
},
--
2.43.0
WARNING: multiple messages have this Message-ID (diff)
From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
<kane_chen@aspeedtech.com>
Subject: [PATCH v1 12/16] hw/arm/aspeed_ast27x0-ssp: Change to use Aspeed27x0CoprocessorState
Date: Wed, 8 Oct 2025 11:21:57 +0800 [thread overview]
Message-ID: <20251008032207.593353-13-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20251008032207.593353-1-jamin_lin@aspeedtech.com>
Refactor the AST27x0 SSP implementation to use the unified
Aspeed27x0CoprocessorState structure shared between SSP and TSP.
Previously, SSP and TSP each defined separate state structures
(Aspeed27x0SSPSoCState and Aspeed27x0TSPSoCState), which contained
identical members and caused unnecessary code duplication.
This change removes Aspeed27x0SSPSoCState and replaces it with
Aspeed27x0CoprocessorState, consolidating shared coprocessor state fields
into a single definition in aspeed_coprocessor.h.
This refactor unifies SSP and TSP under the same coprocessor state type,
improving code maintainability and consistency across Aspeed coprocessor
implementations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
include/hw/arm/aspeed_coprocessor.h | 4 ++--
hw/arm/aspeed_ast27x0-fc.c | 2 +-
hw/arm/aspeed_ast27x0-ssp.c | 8 ++++----
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/hw/arm/aspeed_coprocessor.h b/include/hw/arm/aspeed_coprocessor.h
index 2c10327456..89e46100a5 100644
--- a/include/hw/arm/aspeed_coprocessor.h
+++ b/include/hw/arm/aspeed_coprocessor.h
@@ -42,7 +42,7 @@ struct AspeedCoprocessorClass {
qemu_irq (*get_irq)(void *ctx, int dev);
};
-struct Aspeed27x0SSPSoCState {
+struct Aspeed27x0CoprocessorState {
AspeedCoprocessorState parent;
AspeedINTCState intc[2];
UnimplementedDeviceState ipc[2];
@@ -52,7 +52,7 @@ struct Aspeed27x0SSPSoCState {
};
#define TYPE_ASPEED27X0SSP_SOC "aspeed27x0ssp-soc"
-OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0SSPSoCState, ASPEED27X0SSP_SOC)
+OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0CoprocessorState, ASPEED27X0SSP_SOC)
struct Aspeed27x0TSPSoCState {
AspeedCoprocessorState parent;
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index b34cd54e4e..cd09a2dcf0 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -42,7 +42,7 @@ struct Ast2700FCState {
Clock *tsp_sysclk;
Aspeed27x0SoCState ca35;
- Aspeed27x0SSPSoCState ssp;
+ Aspeed27x0CoprocessorState ssp;
Aspeed27x0TSPSoCState tsp;
bool mmio_exec;
diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
index 0e68c0f6a8..e3cf4e87f3 100644
--- a/hw/arm/aspeed_ast27x0-ssp.c
+++ b/hw/arm/aspeed_ast27x0-ssp.c
@@ -108,7 +108,7 @@ static struct nvic_intc_irq_info ast2700_ssp_intcmap[] = {
static qemu_irq aspeed_soc_ast27x0ssp_get_irq(void *ctx, int dev)
{
AspeedCoprocessorState *s = (AspeedCoprocessorState *)ctx;
- Aspeed27x0SSPSoCState *a = ASPEED27X0SSP_SOC(s);
+ Aspeed27x0CoprocessorState *a = ASPEED27X0SSP_SOC(s);
AspeedCoprocessorClass *sc = ASPEED_COPROCESSOR_GET_CLASS(s);
int or_idx;
@@ -130,7 +130,7 @@ static qemu_irq aspeed_soc_ast27x0ssp_get_irq(void *ctx, int dev)
static void aspeed_soc_ast27x0ssp_init(Object *obj)
{
- Aspeed27x0SSPSoCState *a = ASPEED27X0SSP_SOC(obj);
+ Aspeed27x0CoprocessorState *a = ASPEED27X0SSP_SOC(obj);
AspeedCoprocessorState *s = ASPEED_COPROCESSOR(obj);
AspeedCoprocessorClass *sc = ASPEED_COPROCESSOR_GET_CLASS(s);
int i;
@@ -161,7 +161,7 @@ static void aspeed_soc_ast27x0ssp_init(Object *obj)
static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
{
- Aspeed27x0SSPSoCState *a = ASPEED27X0SSP_SOC(dev_soc);
+ Aspeed27x0CoprocessorState *a = ASPEED27X0SSP_SOC(dev_soc);
AspeedCoprocessorState *s = ASPEED_COPROCESSOR(dev_soc);
AspeedCoprocessorClass *sc = ASPEED_COPROCESSOR_GET_CLASS(s);
DeviceState *armv7m;
@@ -289,7 +289,7 @@ static const TypeInfo aspeed_soc_ast27x0ssp_types[] = {
{
.name = TYPE_ASPEED27X0SSP_SOC,
.parent = TYPE_ASPEED_COPROCESSOR,
- .instance_size = sizeof(Aspeed27x0SSPSoCState),
+ .instance_size = sizeof(Aspeed27x0CoprocessorState),
.instance_init = aspeed_soc_ast27x0ssp_init,
.class_init = aspeed_soc_ast27x0ssp_class_init,
},
--
2.43.0
next prev parent reply other threads:[~2025-10-08 3:23 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-08 3:21 [PATCH v1 00/16] Introduce AspeedCoprocessor class and base implementation Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 01/16] hw/arm/aspeed: Remove AspeedSoCState dependency from aspeed_uart_first() API Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 02/16] hw/arm/aspeed: Remove AspeedSoCClass dependency from aspeed_uart_last() API Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 03/16] hw/arm/aspeed: Remove AspeedSoCState dependency from aspeed_soc_uart_set_chr() API Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 04/16] hw/arm/aspeed: Remove AspeedSoCClass dependency from aspeed_soc_cpu_type() API Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 05/16] hw/arm/aspeed: Remove AspeedSoCState dependency from aspeed_mmio_map() API Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 06/16] hw/arm/aspeed: Remove AspeedSoCState dependency from aspeed_mmio_map_unimplemented() API Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 07/16] hw/arm/aspeed: Remove AspeedSoCState dependency from aspeed_soc_get_irq() API Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 08/16] hw/arm/aspeed: Remove AspeedSoCState dependency from aspeed_soc_uart_realize() API Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 09/16] hw/arm/aspeed: Introduce AspeedCoprocessor class and base implementation Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 16:14 ` [SPAM] " Cédric Le Goater
2025-10-09 1:18 ` Jamin Lin
2025-10-08 3:21 ` [PATCH v1 10/16] hw/arm/aspeed_ast27x0-ssp: Make AST27x0 SSP inherit from AspeedCoprocessor instead of AspeedSoC Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 11/16] hw/arm/aspeed_ast27x0-tsp: Make AST27x0 TSP " Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via [this message]
2025-10-08 3:21 ` [PATCH v1 12/16] hw/arm/aspeed_ast27x0-ssp: Change to use Aspeed27x0CoprocessorState Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 13/16] hw/arm/aspeed_ast27x0-tsp: " Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:21 ` [PATCH v1 14/16] hw/arm/aspeed_ast27x0-ssp: Rename type to TYPE_ASPEED27X0SSP_COPROCESSOR Jamin Lin via
2025-10-08 3:21 ` Jamin Lin via
2025-10-08 3:22 ` [PATCH v1 15/16] hw/arm/aspeed_ast27x0-tsp: Rename type to TYPE_ASPEED27X0TSP_COPROCESSOR Jamin Lin via
2025-10-08 3:22 ` Jamin Lin via
2025-10-08 3:22 ` [PATCH v1 16/16] hw/arm/aspeed_ast27x0-{ssp,tsp}: Fix coding style Jamin Lin via
2025-10-08 3:22 ` Jamin Lin via
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