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From: Joel Fernandes <joelagnelf@nvidia.com>
To: Alexandre Courbot <acourbot@nvidia.com>
Cc: "Danilo Krummrich" <dakr@kernel.org>,
	"Yury Norov" <yury.norov@gmail.com>,
	"Jesung Yang" <y.j3ms.n@gmail.com>,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Alex Gaynor" <alex.gaynor@gmail.com>,
	"Boqun Feng" <boqun.feng@gmail.com>,
	"Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Trevor Gross" <tmgross@umich.edu>,
	nouveau@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	rust-for-linux@vger.kernel.org, "Edwin Peer" <epeer@nvidia.com>
Subject: Re: [PATCH RFC v2 1/3] gpu: nova-core: register: use field type for Into implementation
Date: Thu, 16 Oct 2025 10:51:06 -0400	[thread overview]
Message-ID: <20251016145106.GA1174880@joelbox2> (raw)
In-Reply-To: <20251009-bounded_ints-v2-1-ff3d7fee3ffd@nvidia.com>

On Thu, Oct 09, 2025 at 09:37:08PM +0900, Alexandre Courbot wrote:
> The getter method of a field works with the field type, but its setter
> expects the type of the register. This leads to an asymmetry in the
> From/Into implementations required for a field with a dedicated type.
> For instance, a field declared as
> 
>     pub struct ControlReg(u32) {
>         3:0 mode as u8 ?=> Mode;
>         ...
>     }
> 
> currently requires the following implementations:
> 
>     impl TryFrom<u8> for Mode {
>       ...
>     }
> 
>     impl From<Mode> for u32 {
>       ...
>     }
> 
> Change this so the `From<Mode>` now needs to be implemented for `u8`,
> i.e. the primitive type of the field. This is more consistent, and will
> become a requirement once we start using the TryFrom/Into derive macros
> to implement these automatically.
> 
> Reported-by: Edwin Peer <epeer@nvidia.com>
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>

Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com>

thanks,

 - Joel

> ---
>  drivers/gpu/nova-core/falcon.rs      | 38 +++++++++++++++++++++++++-----------
>  drivers/gpu/nova-core/regs/macros.rs | 10 +++++-----
>  2 files changed, 32 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
> index 37e6298195e4..3f505b870601 100644
> --- a/drivers/gpu/nova-core/falcon.rs
> +++ b/drivers/gpu/nova-core/falcon.rs
> @@ -22,11 +22,11 @@
>  pub(crate) mod sec2;
>  
>  // TODO[FPRI]: Replace with `ToPrimitive`.
> -macro_rules! impl_from_enum_to_u32 {
> +macro_rules! impl_from_enum_to_u8 {
>      ($enum_type:ty) => {
> -        impl From<$enum_type> for u32 {
> +        impl From<$enum_type> for u8 {
>              fn from(value: $enum_type) -> Self {
> -                value as u32
> +                value as u8
>              }
>          }
>      };
> @@ -46,7 +46,7 @@ pub(crate) enum FalconCoreRev {
>      Rev6 = 6,
>      Rev7 = 7,
>  }
> -impl_from_enum_to_u32!(FalconCoreRev);
> +impl_from_enum_to_u8!(FalconCoreRev);
>  
>  // TODO[FPRI]: replace with `FromPrimitive`.
>  impl TryFrom<u8> for FalconCoreRev {
> @@ -81,7 +81,7 @@ pub(crate) enum FalconCoreRevSubversion {
>      Subversion2 = 2,
>      Subversion3 = 3,
>  }
> -impl_from_enum_to_u32!(FalconCoreRevSubversion);
> +impl_from_enum_to_u8!(FalconCoreRevSubversion);
>  
>  // TODO[FPRI]: replace with `FromPrimitive`.
>  impl TryFrom<u8> for FalconCoreRevSubversion {
> @@ -125,7 +125,7 @@ pub(crate) enum FalconSecurityModel {
>      /// Also known as High-Secure, Privilege Level 3 or PL3.
>      Heavy = 3,
>  }
> -impl_from_enum_to_u32!(FalconSecurityModel);
> +impl_from_enum_to_u8!(FalconSecurityModel);
>  
>  // TODO[FPRI]: replace with `FromPrimitive`.
>  impl TryFrom<u8> for FalconSecurityModel {
> @@ -157,7 +157,7 @@ pub(crate) enum FalconModSelAlgo {
>      #[default]
>      Rsa3k = 1,
>  }
> -impl_from_enum_to_u32!(FalconModSelAlgo);
> +impl_from_enum_to_u8!(FalconModSelAlgo);
>  
>  // TODO[FPRI]: replace with `FromPrimitive`.
>  impl TryFrom<u8> for FalconModSelAlgo {
> @@ -179,7 +179,7 @@ pub(crate) enum DmaTrfCmdSize {
>      #[default]
>      Size256B = 0x6,
>  }
> -impl_from_enum_to_u32!(DmaTrfCmdSize);
> +impl_from_enum_to_u8!(DmaTrfCmdSize);
>  
>  // TODO[FPRI]: replace with `FromPrimitive`.
>  impl TryFrom<u8> for DmaTrfCmdSize {
> @@ -202,7 +202,6 @@ pub(crate) enum PeregrineCoreSelect {
>      /// RISC-V core is active.
>      Riscv = 1,
>  }
> -impl_from_enum_to_u32!(PeregrineCoreSelect);
>  
>  impl From<bool> for PeregrineCoreSelect {
>      fn from(value: bool) -> Self {
> @@ -213,6 +212,15 @@ fn from(value: bool) -> Self {
>      }
>  }
>  
> +impl From<PeregrineCoreSelect> for bool {
> +    fn from(value: PeregrineCoreSelect) -> Self {
> +        match value {
> +            PeregrineCoreSelect::Falcon => false,
> +            PeregrineCoreSelect::Riscv => true,
> +        }
> +    }
> +}
> +
>  /// Different types of memory present in a falcon core.
>  #[derive(Debug, Clone, Copy, PartialEq, Eq)]
>  pub(crate) enum FalconMem {
> @@ -236,7 +244,7 @@ pub(crate) enum FalconFbifTarget {
>      /// Non-coherent system memory (System DRAM).
>      NoncoherentSysmem = 2,
>  }
> -impl_from_enum_to_u32!(FalconFbifTarget);
> +impl_from_enum_to_u8!(FalconFbifTarget);
>  
>  // TODO[FPRI]: replace with `FromPrimitive`.
>  impl TryFrom<u8> for FalconFbifTarget {
> @@ -263,7 +271,6 @@ pub(crate) enum FalconFbifMemType {
>      /// Physical memory addresses.
>      Physical = 1,
>  }
> -impl_from_enum_to_u32!(FalconFbifMemType);
>  
>  /// Conversion from a single-bit register field.
>  impl From<bool> for FalconFbifMemType {
> @@ -275,6 +282,15 @@ fn from(value: bool) -> Self {
>      }
>  }
>  
> +impl From<FalconFbifMemType> for bool {
> +    fn from(value: FalconFbifMemType) -> Self {
> +        match value {
> +            FalconFbifMemType::Virtual => false,
> +            FalconFbifMemType::Physical => true,
> +        }
> +    }
> +}
> +
>  /// Type used to represent the `PFALCON` registers address base for a given falcon engine.
>  pub(crate) struct PFalconBase(());
>  
> diff --git a/drivers/gpu/nova-core/regs/macros.rs b/drivers/gpu/nova-core/regs/macros.rs
> index 754c14ee7f40..73811a115762 100644
> --- a/drivers/gpu/nova-core/regs/macros.rs
> +++ b/drivers/gpu/nova-core/regs/macros.rs
> @@ -482,7 +482,7 @@ impl $name {
>          register!(
>              @leaf_accessor $name $hi:$lo $field
>              { |f| <$into_type>::from(if f != 0 { true } else { false }) }
> -            $into_type => $into_type $(, $comment)?;
> +            bool $into_type => $into_type $(, $comment)?;
>          );
>      };
>  
> @@ -499,7 +499,7 @@ impl $name {
>              $(, $comment:literal)?;
>      ) => {
>          register!(@leaf_accessor $name $hi:$lo $field
> -            { |f| <$try_into_type>::try_from(f as $type) } $try_into_type =>
> +            { |f| <$try_into_type>::try_from(f as $type) } $type $try_into_type =>
>              ::core::result::Result<
>                  $try_into_type,
>                  <$try_into_type as ::core::convert::TryFrom<$type>>::Error
> @@ -513,7 +513,7 @@ impl $name {
>              $(, $comment:literal)?;
>      ) => {
>          register!(@leaf_accessor $name $hi:$lo $field
> -            { |f| <$into_type>::from(f as $type) } $into_type => $into_type $(, $comment)?;);
> +            { |f| <$into_type>::from(f as $type) } $type $into_type => $into_type $(, $comment)?;);
>      };
>  
>      // Shortcut for non-boolean fields defined without the `=>` or `?=>` syntax.
> @@ -527,7 +527,7 @@ impl $name {
>      // Generates the accessor methods for a single field.
>      (
>          @leaf_accessor $name:ident $hi:tt:$lo:tt $field:ident
> -            { $process:expr } $to_type:ty => $res_type:ty $(, $comment:literal)?;
> +            { $process:expr } $prim_type:tt $to_type:ty => $res_type:ty $(, $comment:literal)?;
>      ) => {
>          ::kernel::macros::paste!(
>          const [<$field:upper _RANGE>]: ::core::ops::RangeInclusive<u8> = $lo..=$hi;
> @@ -559,7 +559,7 @@ pub(crate) fn $field(self) -> $res_type {
>          pub(crate) fn [<set_ $field>](mut self, value: $to_type) -> Self {
>              const MASK: u32 = $name::[<$field:upper _MASK>];
>              const SHIFT: u32 = $name::[<$field:upper _SHIFT>];
> -            let value = (u32::from(value) << SHIFT) & MASK;
> +            let value = (u32::from($prim_type::from(value)) << SHIFT) & MASK;
>              self.0 = (self.0 & !MASK) | value;
>  
>              self
> 
> -- 
> 2.51.0
> 

  parent reply	other threads:[~2025-10-16 14:51 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-09 12:37 [RFC PATCH v2 0/3] rust: bounded integer types and use in register macro Alexandre Courbot
2025-10-09 12:37 ` [PATCH RFC v2 1/3] gpu: nova-core: register: use field type for Into implementation Alexandre Courbot
2025-10-09 15:17   ` Joel Fernandes
2025-10-09 15:41     ` Joel Fernandes
2025-10-10  8:24       ` Alexandre Courbot
2025-10-10  8:26         ` Alexandre Courbot
2025-10-10 14:59           ` Joel Fernandes
2025-10-09 20:10   ` Edwin Peer
2025-10-16 14:51   ` Joel Fernandes [this message]
2025-10-09 12:37 ` [PATCH RFC v2 2/3] rust: kernel: add bounded integer types Alexandre Courbot
2025-10-09 21:33   ` Joel Fernandes
2025-10-10  8:49     ` Alexandre Courbot
2025-10-10 15:23       ` Joel Fernandes
2025-10-11 10:33   ` Alice Ryhl
2025-10-09 12:37 ` [PATCH RFC v2 3/3] gpu: nova-core: use BoundedInt Alexandre Courbot
2025-10-09 16:40   ` Yury Norov
2025-10-09 17:18     ` Danilo Krummrich
2025-10-09 18:28       ` Yury Norov
2025-10-09 18:37         ` Joel Fernandes
2025-10-09 19:19         ` Miguel Ojeda
2025-10-09 19:34         ` Danilo Krummrich
2025-10-09 18:29     ` Joel Fernandes
2025-10-10  9:19     ` Alexandre Courbot
2025-10-10 17:20       ` Yury Norov
2025-10-10 17:58         ` Danilo Krummrich
2025-10-13 13:58         ` Joel Fernandes

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