* [PATCH v2 0/2] MT8189 SMI SUPPORT @ 2025-10-27 12:14 Zhengnan Chen 2025-10-27 12:14 ` [PATCH v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 Zhengnan Chen 2025-10-27 12:14 ` [PATCH v2 2/2] memory: mtk-smi: Add mt8189 support Zhengnan Chen 0 siblings, 2 replies; 6+ messages in thread From: Zhengnan Chen @ 2025-10-27 12:14 UTC (permalink / raw) To: Yong Wu, Krzysztof Kozlowski, Rob Herring, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno Cc: linux-mediatek, linux-kernel, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group, Zhengnan Chen Based on tag: next-20251024, linux-next/master This patchset add mt8189 smi support. --- Changes in v2: Just modify the mediatek,smi-common.yaml file as follows: - Add schematic diagram explanation between smi-common and smi-sub-common - Change the clock numbers of smi-sub-common to minimum 2, the third clock is optional - Link to v1: https://lore.kernel.org/all/20250919081014.14100-1-zhengnan.chen@mediatek.com/ --- Zhengnan Chen (2): dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 memory: mtk-smi: Add mt8189 support .../mediatek,smi-common.yaml | 25 ++++++++++- .../memory-controllers/mediatek,smi-larb.yaml | 3 ++ drivers/memory/mtk-smi.c | 44 +++++++++++++++++++ 3 files changed, 70 insertions(+), 2 deletions(-) -- 2.46.0 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 2025-10-27 12:14 [PATCH v2 0/2] MT8189 SMI SUPPORT Zhengnan Chen @ 2025-10-27 12:14 ` Zhengnan Chen 2025-10-29 11:45 ` AngeloGioacchino Del Regno 2025-10-30 16:43 ` Rob Herring 2025-10-27 12:14 ` [PATCH v2 2/2] memory: mtk-smi: Add mt8189 support Zhengnan Chen 1 sibling, 2 replies; 6+ messages in thread From: Zhengnan Chen @ 2025-10-27 12:14 UTC (permalink / raw) To: Yong Wu, Krzysztof Kozlowski, Rob Herring, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno Cc: linux-mediatek, linux-kernel, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group, Zhengnan Chen Add binding description for mt8189. The clocks number of mt8189 smi-sub common has a bit difference. Its clock count is 2, while mt8195 has 3. Therefore, the minimum number of clocks is changed to 2, with the third one being optional. About what smi-sub-common is, please check the below diagram, we add it in mediatek,smi-common.yaml file. Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.com> --- Hi Angelo, We add a diagram in the smi-common yaml, We are not sure if you agree with this. thus I remove your R-b. Thanks. --- --- .../mediatek,smi-common.yaml | 25 +++++++++++++++++-- .../memory-controllers/mediatek,smi-larb.yaml | 3 +++ 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml index 0762e0ff66ef..454d11a83973 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml @@ -25,6 +25,21 @@ description: | SMI generation 1 to transform the smi clock into emi clock domain, but that is not needed for SMI generation 2. + The smi-common connects with smi-larb and IOMMU. The maximum inputs number of + a smi-common is 8. In SMI generation 2, the engines number may be over 8. + In this case, we use a smi-sub-common to merge some larbs. + The block diagram something is like: + + IOMMU + | | + smi-common + --------------------------- + | | ... + larb0 sub-common ... <-max number is 8 + ---------------- + | | ... + larb1 larbX ... <-max number is 8 + properties: compatible: oneOf: @@ -40,6 +55,8 @@ properties: - mediatek,mt8186-smi-common - mediatek,mt8188-smi-common-vdo - mediatek,mt8188-smi-common-vpp + - mediatek,mt8189-smi-common + - mediatek,mt8189-smi-sub-common - mediatek,mt8192-smi-common - mediatek,mt8195-smi-common-vdo - mediatek,mt8195-smi-common-vpp @@ -108,19 +125,23 @@ allOf: compatible: contains: enum: + - mediatek,mt8189-smi-sub-common - mediatek,mt8195-smi-sub-common then: required: - mediatek,smi properties: clocks: - minItems: 3 + minItems: 2 maxItems: 3 clock-names: + minItems: 2 + maxItems: 3 items: - const: apb - const: smi - - const: gals0 + additionalItems: + const: gals0 else: properties: mediatek,smi: false diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml index 2e7fac4b5094..9a5dafd7c07e 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml @@ -27,6 +27,7 @@ properties: - mediatek,mt8183-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8192-smi-larb - mediatek,mt8195-smi-larb @@ -85,6 +86,7 @@ allOf: - mediatek,mt8183-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8195-smi-larb then: @@ -119,6 +121,7 @@ allOf: - mediatek,mt6779-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8192-smi-larb - mediatek,mt8195-smi-larb -- 2.46.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 2025-10-27 12:14 ` [PATCH v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 Zhengnan Chen @ 2025-10-29 11:45 ` AngeloGioacchino Del Regno 2025-10-30 16:43 ` Rob Herring 1 sibling, 0 replies; 6+ messages in thread From: AngeloGioacchino Del Regno @ 2025-10-29 11:45 UTC (permalink / raw) To: Zhengnan Chen, Yong Wu, Krzysztof Kozlowski, Rob Herring, Conor Dooley, Matthias Brugger Cc: linux-mediatek, linux-kernel, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group Il 27/10/25 13:14, Zhengnan Chen ha scritto: > Add binding description for mt8189. > > The clocks number of mt8189 smi-sub common has a bit difference. > Its clock count is 2, while mt8195 has 3. Therefore, the minimum > number of clocks is changed to 2, with the third one being optional. > > About what smi-sub-common is, please check the below diagram, > we add it in mediatek,smi-common.yaml file. > > Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.com> > --- > Hi Angelo, > We add a diagram in the smi-common yaml, We are not sure if you agree > with this. thus I remove your R-b. I agree with that, and the diagram looks good. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > > Thanks. > --- > --- > .../mediatek,smi-common.yaml | 25 +++++++++++++++++-- > .../memory-controllers/mediatek,smi-larb.yaml | 3 +++ > 2 files changed, 26 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > index 0762e0ff66ef..454d11a83973 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > @@ -25,6 +25,21 @@ description: | > SMI generation 1 to transform the smi clock into emi clock domain, but that is > not needed for SMI generation 2. > > + The smi-common connects with smi-larb and IOMMU. The maximum inputs number of > + a smi-common is 8. In SMI generation 2, the engines number may be over 8. > + In this case, we use a smi-sub-common to merge some larbs. > + The block diagram something is like: > + > + IOMMU > + | | > + smi-common > + --------------------------- > + | | ... > + larb0 sub-common ... <-max number is 8 > + ---------------- > + | | ... > + larb1 larbX ... <-max number is 8 > + > properties: > compatible: > oneOf: > @@ -40,6 +55,8 @@ properties: > - mediatek,mt8186-smi-common > - mediatek,mt8188-smi-common-vdo > - mediatek,mt8188-smi-common-vpp > + - mediatek,mt8189-smi-common > + - mediatek,mt8189-smi-sub-common > - mediatek,mt8192-smi-common > - mediatek,mt8195-smi-common-vdo > - mediatek,mt8195-smi-common-vpp > @@ -108,19 +125,23 @@ allOf: > compatible: > contains: > enum: > + - mediatek,mt8189-smi-sub-common > - mediatek,mt8195-smi-sub-common > then: > required: > - mediatek,smi > properties: > clocks: > - minItems: 3 > + minItems: 2 > maxItems: 3 > clock-names: > + minItems: 2 > + maxItems: 3 > items: > - const: apb > - const: smi > - - const: gals0 > + additionalItems: > + const: gals0 > else: > properties: > mediatek,smi: false > diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml > index 2e7fac4b5094..9a5dafd7c07e 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml > @@ -27,6 +27,7 @@ properties: > - mediatek,mt8183-smi-larb > - mediatek,mt8186-smi-larb > - mediatek,mt8188-smi-larb > + - mediatek,mt8189-smi-larb > - mediatek,mt8192-smi-larb > - mediatek,mt8195-smi-larb > > @@ -85,6 +86,7 @@ allOf: > - mediatek,mt8183-smi-larb > - mediatek,mt8186-smi-larb > - mediatek,mt8188-smi-larb > + - mediatek,mt8189-smi-larb > - mediatek,mt8195-smi-larb > > then: > @@ -119,6 +121,7 @@ allOf: > - mediatek,mt6779-smi-larb > - mediatek,mt8186-smi-larb > - mediatek,mt8188-smi-larb > + - mediatek,mt8189-smi-larb > - mediatek,mt8192-smi-larb > - mediatek,mt8195-smi-larb > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 2025-10-27 12:14 ` [PATCH v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 Zhengnan Chen 2025-10-29 11:45 ` AngeloGioacchino Del Regno @ 2025-10-30 16:43 ` Rob Herring 2025-11-01 8:49 ` Zhengnan Chen (陈征南) 1 sibling, 1 reply; 6+ messages in thread From: Rob Herring @ 2025-10-30 16:43 UTC (permalink / raw) To: Zhengnan Chen Cc: Yong Wu, Krzysztof Kozlowski, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno, linux-mediatek, linux-kernel, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group On Mon, Oct 27, 2025 at 08:14:27PM +0800, Zhengnan Chen wrote: > Add binding description for mt8189. > > The clocks number of mt8189 smi-sub common has a bit difference. > Its clock count is 2, while mt8195 has 3. Therefore, the minimum > number of clocks is changed to 2, with the third one being optional. > > About what smi-sub-common is, please check the below diagram, > we add it in mediatek,smi-common.yaml file. > > Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.com> > --- > Hi Angelo, > We add a diagram in the smi-common yaml, We are not sure if you agree > with this. thus I remove your R-b. > > Thanks. > --- > --- > .../mediatek,smi-common.yaml | 25 +++++++++++++++++-- > .../memory-controllers/mediatek,smi-larb.yaml | 3 +++ > 2 files changed, 26 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > index 0762e0ff66ef..454d11a83973 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > @@ -25,6 +25,21 @@ description: | > SMI generation 1 to transform the smi clock into emi clock domain, but that is > not needed for SMI generation 2. > > + The smi-common connects with smi-larb and IOMMU. The maximum inputs number of > + a smi-common is 8. In SMI generation 2, the engines number may be over 8. > + In this case, we use a smi-sub-common to merge some larbs. > + The block diagram something is like: > + > + IOMMU > + | | > + smi-common > + --------------------------- > + | | ... > + larb0 sub-common ... <-max number is 8 > + ---------------- > + | | ... > + larb1 larbX ... <-max number is 8 > + > properties: > compatible: > oneOf: > @@ -40,6 +55,8 @@ properties: > - mediatek,mt8186-smi-common > - mediatek,mt8188-smi-common-vdo > - mediatek,mt8188-smi-common-vpp > + - mediatek,mt8189-smi-common > + - mediatek,mt8189-smi-sub-common > - mediatek,mt8192-smi-common > - mediatek,mt8195-smi-common-vdo > - mediatek,mt8195-smi-common-vpp > @@ -108,19 +125,23 @@ allOf: > compatible: > contains: > enum: > + - mediatek,mt8189-smi-sub-common > - mediatek,mt8195-smi-sub-common > then: > required: > - mediatek,smi > properties: > clocks: > - minItems: 3 > + minItems: 2 So now 2 clocks is valid for mt8195? > maxItems: 3 > clock-names: > + minItems: 2 > + maxItems: 3 > items: > - const: apb > - const: smi > - - const: gals0 > + additionalItems: > + const: gals0 > else: > properties: > mediatek,smi: false > diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml > index 2e7fac4b5094..9a5dafd7c07e 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml > @@ -27,6 +27,7 @@ properties: > - mediatek,mt8183-smi-larb > - mediatek,mt8186-smi-larb > - mediatek,mt8188-smi-larb > + - mediatek,mt8189-smi-larb > - mediatek,mt8192-smi-larb > - mediatek,mt8195-smi-larb > > @@ -85,6 +86,7 @@ allOf: > - mediatek,mt8183-smi-larb > - mediatek,mt8186-smi-larb > - mediatek,mt8188-smi-larb > + - mediatek,mt8189-smi-larb > - mediatek,mt8195-smi-larb > > then: > @@ -119,6 +121,7 @@ allOf: > - mediatek,mt6779-smi-larb > - mediatek,mt8186-smi-larb > - mediatek,mt8188-smi-larb > + - mediatek,mt8189-smi-larb > - mediatek,mt8192-smi-larb > - mediatek,mt8195-smi-larb > > -- > 2.46.0 > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 2025-10-30 16:43 ` Rob Herring @ 2025-11-01 8:49 ` Zhengnan Chen (陈征南) 0 siblings, 0 replies; 6+ messages in thread From: Zhengnan Chen (陈征南) @ 2025-11-01 8:49 UTC (permalink / raw) To: robh@kernel.org Cc: linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, krzk@kernel.org, devicetree@vger.kernel.org, Yong Wu (吴勇), conor+dt@kernel.org, Project_Global_Chrome_Upstream_Group, linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com, AngeloGioacchino Del Regno On Thu, 2025-10-30 at 11:43 -0500, Rob Herring wrote: > External email : Please do not click links or open attachments until > you have verified the sender or the content. > > > On Mon, Oct 27, 2025 at 08:14:27PM +0800, Zhengnan Chen wrote: > > Add binding description for mt8189. > > > > The clocks number of mt8189 smi-sub common has a bit difference. > > Its clock count is 2, while mt8195 has 3. Therefore, the minimum > > number of clocks is changed to 2, with the third one being > > optional. > > > > About what smi-sub-common is, please check the below diagram, > > we add it in mediatek,smi-common.yaml file. > > > > Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.com> > > --- > > Hi Angelo, > > We add a diagram in the smi-common yaml, We are not sure if you > > agree > > with this. thus I remove your R-b. > > > > Thanks. > > --- > > --- > > .../mediatek,smi-common.yaml | 25 > > +++++++++++++++++-- > > .../memory-controllers/mediatek,smi-larb.yaml | 3 +++ > > 2 files changed, 26 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/memory- > > controllers/mediatek,smi-common.yaml > > b/Documentation/devicetree/bindings/memory- > > controllers/mediatek,smi-common.yaml > > index 0762e0ff66ef..454d11a83973 100644 > > --- a/Documentation/devicetree/bindings/memory- > > controllers/mediatek,smi-common.yaml > > +++ b/Documentation/devicetree/bindings/memory- > > controllers/mediatek,smi-common.yaml > > @@ -25,6 +25,21 @@ description: | > > SMI generation 1 to transform the smi clock into emi clock > > domain, but that is > > not needed for SMI generation 2. > > > > + The smi-common connects with smi-larb and IOMMU. The maximum > > inputs number of > > + a smi-common is 8. In SMI generation 2, the engines number may > > be over 8. > > + In this case, we use a smi-sub-common to merge some larbs. > > + The block diagram something is like: > > + > > + IOMMU > > + | | > > + smi-common > > + --------------------------- > > + | | ... > > + larb0 sub-common ... <-max number is 8 > > + ---------------- > > + | | ... > > + larb1 larbX ... <-max number is 8 > > + > > properties: > > compatible: > > oneOf: > > @@ -40,6 +55,8 @@ properties: > > - mediatek,mt8186-smi-common > > - mediatek,mt8188-smi-common-vdo > > - mediatek,mt8188-smi-common-vpp > > + - mediatek,mt8189-smi-common > > + - mediatek,mt8189-smi-sub-common > > - mediatek,mt8192-smi-common > > - mediatek,mt8195-smi-common-vdo > > - mediatek,mt8195-smi-common-vpp > > @@ -108,19 +125,23 @@ allOf: > > compatible: > > contains: > > enum: > > + - mediatek,mt8189-smi-sub-common > > - mediatek,mt8195-smi-sub-common > > then: > > required: > > - mediatek,smi > > properties: > > clocks: > > - minItems: 3 > > + minItems: 2 > > So now 2 clocks is valid for mt8195? > No, the mt8195 still requires 3 clock cycles. This approach can accommodate ICs that require 2 or 3 clocks simultaneously. > > maxItems: 3 > > clock-names: > > + minItems: 2 > > + maxItems: 3 > > items: > > - const: apb > > - const: smi > > - - const: gals0 > > + additionalItems: > > + const: gals0 > > else: > > properties: > > mediatek,smi: false > > diff --git a/Documentation/devicetree/bindings/memory- > > controllers/mediatek,smi-larb.yaml > > b/Documentation/devicetree/bindings/memory- > > controllers/mediatek,smi-larb.yaml > > index 2e7fac4b5094..9a5dafd7c07e 100644 > > --- a/Documentation/devicetree/bindings/memory- > > controllers/mediatek,smi-larb.yaml > > +++ b/Documentation/devicetree/bindings/memory- > > controllers/mediatek,smi-larb.yaml > > @@ -27,6 +27,7 @@ properties: > > - mediatek,mt8183-smi-larb > > - mediatek,mt8186-smi-larb > > - mediatek,mt8188-smi-larb > > + - mediatek,mt8189-smi-larb > > - mediatek,mt8192-smi-larb > > - mediatek,mt8195-smi-larb > > > > @@ -85,6 +86,7 @@ allOf: > > - mediatek,mt8183-smi-larb > > - mediatek,mt8186-smi-larb > > - mediatek,mt8188-smi-larb > > + - mediatek,mt8189-smi-larb > > - mediatek,mt8195-smi-larb > > > > then: > > @@ -119,6 +121,7 @@ allOf: > > - mediatek,mt6779-smi-larb > > - mediatek,mt8186-smi-larb > > - mediatek,mt8188-smi-larb > > + - mediatek,mt8189-smi-larb > > - mediatek,mt8192-smi-larb > > - mediatek,mt8195-smi-larb > > > > -- > > 2.46.0 > > ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] memory: mtk-smi: Add mt8189 support 2025-10-27 12:14 [PATCH v2 0/2] MT8189 SMI SUPPORT Zhengnan Chen 2025-10-27 12:14 ` [PATCH v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 Zhengnan Chen @ 2025-10-27 12:14 ` Zhengnan Chen 1 sibling, 0 replies; 6+ messages in thread From: Zhengnan Chen @ 2025-10-27 12:14 UTC (permalink / raw) To: Yong Wu, Krzysztof Kozlowski, Rob Herring, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno Cc: linux-mediatek, linux-kernel, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group, Zhengnan Chen Add the necessary platform data and ostdl setting to enable support for mt8189 smi. Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/memory/mtk-smi.c | 44 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index 733e22f695ab..80af9c214c83 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -401,6 +401,30 @@ static const u8 mtk_smi_larb_mt8188_ostd[][SMI_LARB_PORT_NR_MAX] = { [25] = {0x01}, }; +static const u8 mtk_smi_larb_mt8189_ostd[][SMI_LARB_PORT_NR_MAX] = { + [0] = {0x8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x0,}, + [1] = {0x8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x0,}, + [2] = {0x7, 0x7, 0x4, 0x4, 0x0, 0x0, 0x2, 0x2, 0x7, 0x7, 0x0,}, + [4] = {0x2F, 0x1E, 0x9, 0x1, 0x1, 0x1, 0x1, 0x2, 0x2, 0x5, 0x1, 0x17,}, + [7] = {0x20, 0x2, 0x1, 0x1, 0x1, 0x4, 0x2, 0x1, 0x1, 0x2, 0x3, 0x2, + 0xA, 0xF, 0x4, 0x6, 0x5, 0x1,}, + [9] = {0x6, 0x3, 0xC, 0x6, 0x1, 0x4, 0x3, 0x1, 0x2, 0x4, 0x5, 0x2, + 0x4, 0x2, 0x3, 0xB, 0x1, 0x4, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, + 0x1, 0x1,}, + [11] = {0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, + 0x1, 0x1, 0x1, 0xB, 0x1, 0x4, 0x6, 0x5, 0x6, 0x1, 0x5, 0x2, + 0x9, 0x5,}, + [13] = {0x2, 0x8, 0x8, 0x8, 0x4, 0x4, 0x4, 0x4, 0x4, 0xE, 0x4, 0x1, + 0x6, 0x6, 0x2,}, + [14] = {0x1, 0x1, 0x1, 0x20, 0xE, 0x4, 0x8, 0x8, 0x6, 0x4,}, + [16] = {0x1E, 0xC, 0x2, 0x8, 0xE, 0x2, 0x1E, 0x10, 0x4, 0x2, 0x2, 0x2, + 0x2, 0x2, 0x4, 0x2, 0x4,}, + [17] = {0x1E, 0xC, 0x2, 0x8, 0xE, 0x2, 0x1E, 0x10, 0x4, 0x2, 0x2, 0x2, + 0x2, 0x2, 0x4, 0x2, 0x4,}, + [19] = {0x2, 0x1, 0x3, 0x1,}, + [20] = {0x7, 0x7, 0x3, 0x3, 0x1, 0x1,}, +}; + static const u8 mtk_smi_larb_mt8192_ostd[][SMI_LARB_PORT_NR_MAX] = { [0] = {0x2, 0x2, 0x28, 0xa, 0xc, 0x28,}, [1] = {0x2, 0x2, 0x18, 0x18, 0x18, 0xa, 0xc, 0x28,}, @@ -533,6 +557,13 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt8188 = { .ostd = mtk_smi_larb_mt8188_ostd, }; +static const struct mtk_smi_larb_gen mtk_smi_larb_mt8189 = { + .config_port = mtk_smi_larb_config_port_gen2_general, + .flags_general = MTK_SMI_FLAG_THRT_UPDATE | MTK_SMI_FLAG_SW_FLAG | + MTK_SMI_FLAG_SLEEP_CTL | MTK_SMI_FLAG_CFG_PORT_SEC_CTL, + .ostd = mtk_smi_larb_mt8189_ostd, +}; + static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192 = { .config_port = mtk_smi_larb_config_port_gen2_general, .ostd = mtk_smi_larb_mt8192_ostd, @@ -556,6 +587,7 @@ static const struct of_device_id mtk_smi_larb_of_ids[] = { {.compatible = "mediatek,mt8183-smi-larb", .data = &mtk_smi_larb_mt8183}, {.compatible = "mediatek,mt8186-smi-larb", .data = &mtk_smi_larb_mt8186}, {.compatible = "mediatek,mt8188-smi-larb", .data = &mtk_smi_larb_mt8188}, + {.compatible = "mediatek,mt8189-smi-larb", .data = &mtk_smi_larb_mt8189}, {.compatible = "mediatek,mt8192-smi-larb", .data = &mtk_smi_larb_mt8192}, {.compatible = "mediatek,mt8195-smi-larb", .data = &mtk_smi_larb_mt8195}, {} @@ -803,6 +835,16 @@ static const struct mtk_smi_common_plat mtk_smi_common_mt8188_vpp = { .init = mtk_smi_common_mt8195_init, }; +static const struct mtk_smi_common_plat mtk_smi_common_mt8189 = { + .type = MTK_SMI_GEN2, + .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(3) | F_MMU1_LARB(5) | + F_MMU1_LARB(7), +}; + +static const struct mtk_smi_common_plat mtk_smi_sub_common_mt8189 = { + .type = MTK_SMI_GEN2_SUB_COMM, +}; + static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = { .type = MTK_SMI_GEN2, .has_gals = true, @@ -847,6 +889,8 @@ static const struct of_device_id mtk_smi_common_of_ids[] = { {.compatible = "mediatek,mt8186-smi-common", .data = &mtk_smi_common_mt8186}, {.compatible = "mediatek,mt8188-smi-common-vdo", .data = &mtk_smi_common_mt8188_vdo}, {.compatible = "mediatek,mt8188-smi-common-vpp", .data = &mtk_smi_common_mt8188_vpp}, + {.compatible = "mediatek,mt8189-smi-common", .data = &mtk_smi_common_mt8189}, + {.compatible = "mediatek,mt8189-smi-sub-common", .data = &mtk_smi_sub_common_mt8189}, {.compatible = "mediatek,mt8192-smi-common", .data = &mtk_smi_common_mt8192}, {.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo}, {.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp}, -- 2.46.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-11-01 8:50 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-10-27 12:14 [PATCH v2 0/2] MT8189 SMI SUPPORT Zhengnan Chen 2025-10-27 12:14 ` [PATCH v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 Zhengnan Chen 2025-10-29 11:45 ` AngeloGioacchino Del Regno 2025-10-30 16:43 ` Rob Herring 2025-11-01 8:49 ` Zhengnan Chen (陈征南) 2025-10-27 12:14 ` [PATCH v2 2/2] memory: mtk-smi: Add mt8189 support Zhengnan Chen
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