[PATCH v3 3/3] arm64: dts: cix: add a compatible string for the cix sky1 SoC

[Jun Guo <jun.guo@cixtech.com>]

The SPI IP design for the cix sky1 SoC uses a FIFO with a data width
of 32 bits, instead of the default 8 bits. Therefore, a compatible
string is added to specify the FIFO data width configuration for the
cix sky1 SoC.

Signed-off-by: Jun Guo <jun.guo@cixtech.com>
---
 arch/arm64/boot/dts/cix/sky1.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index d21387224e79..189b9a3be55c 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -265,7 +265,7 @@ i2c7: i2c@4080000 {
 		};
 
 		spi0: spi@4090000 {
-			compatible = "cdns,spi-r1p6";
+			compatible = "cix,sky1-spi-r1p6", "cdns,spi-r1p6";
 			reg = <0x0 0x04090000 0x0 0x10000>;
 			clocks = <&scmi_clk CLK_TREE_FCH_SPI0_APB>,
 				 <&scmi_clk CLK_TREE_FCH_SPI0_APB>;
@@ -275,7 +275,7 @@ spi0: spi@4090000 {
 		};
 
 		spi1: spi@40a0000 {
-			compatible = "cdns,spi-r1p6";
+			compatible = "cix,sky1-spi-r1p6", "cdns,spi-r1p6";
 			reg = <0x0 0x040a0000 0x0 0x10000>;
 			clocks = <&scmi_clk CLK_TREE_FCH_SPI1_APB>,
 				 <&scmi_clk CLK_TREE_FCH_SPI1_APB>;
-- 
2.34.1