From: Jamin Lin via <qemu-arm@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
kane_chen@aspeedtech.com, "Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v4 12/30] hw/arm/aspeed: Split Supermicro X11SPI machine into a separate file for maintainability
Date: Tue, 4 Nov 2025 11:12:50 +0800 [thread overview]
Message-ID: <20251104031325.146374-13-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20251104031325.146374-1-jamin_lin@aspeedtech.com>
This commit moves the Supermicro X11SPI BMC machine definition from
aspeed.c into a new standalone file aspeed_ast2500_supermicro-x11spi.c,
and adds a dedicated I²C initialization function for the platform.
The refactor continues the effort to modularize Aspeed platform support,
ensuring each machine model is defined in its own source file. This improves
code organization, readability, and simplifies maintenance when adding or
modifying platform-specific behavior.
Previously, the Supermicro X11SPI machine reused
palmetto_bmc_i2c_init() for its I²C setup. To make the machine
definition fully self-contained, the function was copied and renamed
to supermicro_x11spi_bmc_i2c_init(). This ensures that the machine
can evolve independently without depending on Palmetto’s board logi
Key updates include:
- Moved SUPERMICRO_X11SPI_BMC_HW_STRAP1 macro and machine class init
(aspeed_machine_supermicro_x11spi_bmc_class_init) into a new file.
- Added new function supermicro_x11spi_bmc_i2c_init() copied from
palmetto_bmc_i2c_init() for independent control.
- Updated the machine definition to use the new I²C init function.
- Registered the new source file in meson.build.
- Removed all Supermicro X11SPI-related definitions from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 33 ----------
hw/arm/aspeed_ast2500_supermicro-x11spi.c | 78 +++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 79 insertions(+), 33 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_supermicro-x11spi.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index c31b281f55..e1fa95b2c3 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -71,16 +71,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
-/* TODO: Find the actual hardware value */
-#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \
- AST2500_HW_STRAP1_DEFAULTS | \
- SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
- SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
- SCU_AST2500_HW_STRAP_UART_DEBUG | \
- SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
- SCU_HW_STRAP_SPI_WIDTH | \
- SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN))
-
/* AST2500 evb hardware value: 0xF100C2E6 */
#define AST2500_EVB_HW_STRAP1 (( \
AST2500_HW_STRAP1_DEFAULTS | \
@@ -1187,24 +1177,6 @@ static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
}
-static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Supermicro X11 SPI BMC (ARM1176)";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1;
- amc->fmc_model = "mx25l25635e";
- amc->spi_model = "mx25l25635e";
- amc->num_cs = 1;
- amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
- amc->i2c_init = palmetto_bmc_i2c_init;
- mc->default_ram_size = 512 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-}
-
static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc,
const void *data)
{
@@ -1577,11 +1549,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicrox11_bmc_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2500-evb"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_supermicro-x11spi.c b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
new file mode 100644
index 0000000000..2217bcd017
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
@@ -0,0 +1,78 @@
+/*
+ * Supermicro X11 SPI
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/smbus_eeprom.h"
+
+/* TODO: Find the actual hardware value */
+#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \
+ AST2500_HW_STRAP1_DEFAULTS | \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_HW_STRAP_SPI_WIDTH | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN))
+
+static void supermicro_x11spi_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ DeviceState *dev;
+ uint8_t *eeprom_buf = g_malloc0(32 * 1024);
+
+ /*
+ * The palmetto platform expects a ds3231 RTC but a ds1338 is
+ * enough to provide basic RTC features. Alarms will be missing
+ */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68);
+
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50,
+ eeprom_buf);
+
+ /* add a TMP423 temperature sensor */
+ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
+ "tmp423", 0x4c));
+ object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
+}
+
+static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Supermicro X11 SPI BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1;
+ amc->fmc_model = "mx25l25635e";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 1;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
+ amc->i2c_init = supermicro_x11spi_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static const TypeInfo aspeed_ast2500_supermicro_x11spi_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_supermicro_x11spi_types)
+
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index ff6a856523..76a456c33f 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -48,6 +48,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2500_g220a.c',
'aspeed_ast2500_romulus.c',
'aspeed_ast2500_sonorapass.c',
+ 'aspeed_ast2500_supermicro-x11spi.c',
'aspeed_ast2500_tiogapass.c',
'aspeed_ast2500_witherspoon.c',
'aspeed_ast2500_yosemitev2.c',
--
2.43.0
WARNING: multiple messages have this Message-ID (diff)
From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
kane_chen@aspeedtech.com, "Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v4 12/30] hw/arm/aspeed: Split Supermicro X11SPI machine into a separate file for maintainability
Date: Tue, 4 Nov 2025 11:12:50 +0800 [thread overview]
Message-ID: <20251104031325.146374-13-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20251104031325.146374-1-jamin_lin@aspeedtech.com>
This commit moves the Supermicro X11SPI BMC machine definition from
aspeed.c into a new standalone file aspeed_ast2500_supermicro-x11spi.c,
and adds a dedicated I²C initialization function for the platform.
The refactor continues the effort to modularize Aspeed platform support,
ensuring each machine model is defined in its own source file. This improves
code organization, readability, and simplifies maintenance when adding or
modifying platform-specific behavior.
Previously, the Supermicro X11SPI machine reused
palmetto_bmc_i2c_init() for its I²C setup. To make the machine
definition fully self-contained, the function was copied and renamed
to supermicro_x11spi_bmc_i2c_init(). This ensures that the machine
can evolve independently without depending on Palmetto’s board logi
Key updates include:
- Moved SUPERMICRO_X11SPI_BMC_HW_STRAP1 macro and machine class init
(aspeed_machine_supermicro_x11spi_bmc_class_init) into a new file.
- Added new function supermicro_x11spi_bmc_i2c_init() copied from
palmetto_bmc_i2c_init() for independent control.
- Updated the machine definition to use the new I²C init function.
- Registered the new source file in meson.build.
- Removed all Supermicro X11SPI-related definitions from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 33 ----------
hw/arm/aspeed_ast2500_supermicro-x11spi.c | 78 +++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 79 insertions(+), 33 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_supermicro-x11spi.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index c31b281f55..e1fa95b2c3 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -71,16 +71,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
-/* TODO: Find the actual hardware value */
-#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \
- AST2500_HW_STRAP1_DEFAULTS | \
- SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
- SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
- SCU_AST2500_HW_STRAP_UART_DEBUG | \
- SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
- SCU_HW_STRAP_SPI_WIDTH | \
- SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN))
-
/* AST2500 evb hardware value: 0xF100C2E6 */
#define AST2500_EVB_HW_STRAP1 (( \
AST2500_HW_STRAP1_DEFAULTS | \
@@ -1187,24 +1177,6 @@ static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
}
-static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Supermicro X11 SPI BMC (ARM1176)";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1;
- amc->fmc_model = "mx25l25635e";
- amc->spi_model = "mx25l25635e";
- amc->num_cs = 1;
- amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
- amc->i2c_init = palmetto_bmc_i2c_init;
- mc->default_ram_size = 512 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-}
-
static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc,
const void *data)
{
@@ -1577,11 +1549,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicrox11_bmc_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2500-evb"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_supermicro-x11spi.c b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
new file mode 100644
index 0000000000..2217bcd017
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
@@ -0,0 +1,78 @@
+/*
+ * Supermicro X11 SPI
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/smbus_eeprom.h"
+
+/* TODO: Find the actual hardware value */
+#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \
+ AST2500_HW_STRAP1_DEFAULTS | \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_HW_STRAP_SPI_WIDTH | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN))
+
+static void supermicro_x11spi_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ DeviceState *dev;
+ uint8_t *eeprom_buf = g_malloc0(32 * 1024);
+
+ /*
+ * The palmetto platform expects a ds3231 RTC but a ds1338 is
+ * enough to provide basic RTC features. Alarms will be missing
+ */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68);
+
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50,
+ eeprom_buf);
+
+ /* add a TMP423 temperature sensor */
+ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
+ "tmp423", 0x4c));
+ object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
+}
+
+static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Supermicro X11 SPI BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1;
+ amc->fmc_model = "mx25l25635e";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 1;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
+ amc->i2c_init = supermicro_x11spi_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static const TypeInfo aspeed_ast2500_supermicro_x11spi_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_supermicro_x11spi_types)
+
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index ff6a856523..76a456c33f 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -48,6 +48,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2500_g220a.c',
'aspeed_ast2500_romulus.c',
'aspeed_ast2500_sonorapass.c',
+ 'aspeed_ast2500_supermicro-x11spi.c',
'aspeed_ast2500_tiogapass.c',
'aspeed_ast2500_witherspoon.c',
'aspeed_ast2500_yosemitev2.c',
--
2.43.0
next prev parent reply other threads:[~2025-11-04 3:15 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-04 3:12 [PATCH v4 00/30] Split AST2400, AST2500, AST2600, AST2700 and AST1030 SoC machines into separate source files for maintainability Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 01/30] hw/arm/aspeed: Move AspeedMachineState definition to common header for reuse Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 02/30] hw/arm/aspeed: Make aspeed_machine_class_init_cpus_defaults() globally accessible Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 03/30] hw/arm/aspeed: Export and rename create_pca9552() for reuse Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 04/30] hw/arm/aspeed: Rename and export create_pca9554() as aspeed_create_pca9554() Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 05/30] hw/arm/aspeed: Split FP5280G2 machine into a separate source file for maintenance Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 06/30] hw/arm/aspeed: Split G220A machine into a separate source file for better maintenance Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 07/30] hw/arm/aspeed: Split Tiogapass machine into a separate source file for cleanup Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 08/30] hw/arm/aspeed: Split YosemiteV2 machine into a separate source file for maintainability Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 09/30] hw/arm/aspeed: Split Witherspoon " Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 10/30] hw/arm/aspeed: Split Sonorapass " Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 11/30] hw/arm/aspeed: Split Romulus " Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via [this message]
2025-11-04 3:12 ` [PATCH v4 12/30] hw/arm/aspeed: Split Supermicro X11SPI machine into a separate " Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 13/30] hw/arm/aspeed: Split AST2500 EVB machine into a separate source " Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 14/30] hw/arm/aspeed: Split Quanta-Q71L " Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 15/30] hw/arm/aspeed: Split Supermicro X11 " Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 16/30] hw/arm/aspeed: Split Palmetto " Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 17/30] hw/arm/aspeed: Move ASPEED_RAM_SIZE() macro to common header for reuse Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 18/30] hw/arm/aspeed: Split Bletchley machine into a separate source file for maintainability Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 19/30] hw/arm/aspeed: Split FBY35 BMC " Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 20/30] hw/arm/aspeed: Split Fuji " Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:12 ` [PATCH v4 21/30] hw/arm/aspeed: Split QCOM Firework " Jamin Lin via
2025-11-04 3:12 ` Jamin Lin via
2025-11-04 3:13 ` [PATCH v4 22/30] hw/arm/aspeed: Split QCOM DC-SCM V1 " Jamin Lin via
2025-11-04 3:13 ` Jamin Lin via
2025-11-04 3:13 ` [PATCH v4 23/30] hw/arm/aspeed: Make aspeed_machine_ast2600_class_emmc_init() a common API for eMMC boot setup Jamin Lin via
2025-11-04 3:13 ` Jamin Lin via
2025-11-04 3:13 ` [PATCH v4 24/30] hw/arm/aspeed: Split GB200NVL machine into a separate source file for maintainability Jamin Lin via
2025-11-04 3:13 ` Jamin Lin via
2025-11-04 3:13 ` [PATCH v4 25/30] hw/arm/aspeed: Split Rainier " Jamin Lin via
2025-11-04 3:13 ` Jamin Lin via
2025-11-04 3:13 ` [PATCH v4 26/30] hw/arm/aspeed: Split Catalina " Jamin Lin via
2025-11-04 3:13 ` Jamin Lin via
2025-11-04 3:13 ` [PATCH v4 27/30] hw/arm/aspeed: Split AST2600 EVB " Jamin Lin via
2025-11-04 3:13 ` Jamin Lin via
2025-11-04 3:13 ` [PATCH v4 28/30] hw/arm/aspeed: Split AST2700 " Jamin Lin via
2025-11-04 3:13 ` Jamin Lin via
2025-11-04 3:13 ` [PATCH v4 29/30] hw/arm/aspeed: Rename and export connect_serial_hds_to_uarts() as aspeed_connect_serial_hds_to_uarts() Jamin Lin via
2025-11-04 3:13 ` Jamin Lin via
2025-11-04 3:13 ` [PATCH v4 30/30] hw/arm/aspeed: Split AST1030 EVB machine into a separate source file for maintainability Jamin Lin via
2025-11-04 3:13 ` Jamin Lin via
2025-11-04 6:52 ` [SPAM] [PATCH v4 00/30] Split AST2400, AST2500, AST2600, AST2700 and AST1030 SoC machines into separate source files " Cédric Le Goater
2025-11-04 8:14 ` Cédric Le Goater
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