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From: Jason Gunthorpe <jgg@nvidia.com>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Joerg Roedel <joro@8bytes.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <pjw@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Tomasz Jeznach <tjeznach@rivosinc.com>,
	Will Deacon <will@kernel.org>,
	iommu@lists.linux.dev, linux-riscv@lists.infradead.org,
	lihangjing@bytedance.com, Xu Lu <luxu.kernel@bytedance.com>,
	patches@lists.linux.dev, xieyongji@bytedance.com
Subject: Re: [PATCH 1/5] iommupt: Add the RISC-V page table format
Date: Wed, 5 Nov 2025 20:24:21 -0400	[thread overview]
Message-ID: <20251106002421.GY1537560@nvidia.com> (raw)
In-Reply-To: <CAJM55Z8SyipTBG8G2wU2euvJhzcjJDp4B8fjm2Djwoonz8xf-g@mail.gmail.com>

On Wed, Nov 05, 2025 at 08:17:38AM +0900, Emil Renner Berthing wrote:
> Quoting Jason Gunthorpe (2025-11-04 20:00:40)
> > diff --git a/include/linux/generic_pt/common.h b/include/linux/generic_pt/common.h
> > index 96f8a6a7d60e10..10b8250659b98b 100644
> > --- a/include/linux/generic_pt/common.h
> > +++ b/include/linux/generic_pt/common.h
> > @@ -151,6 +151,21 @@ enum {
> >         PT_FEAT_AMDV1_FORCE_COHERENCE,
> >  };
> >
> > +struct pt_riscv_32 {
> > +       struct pt_common common;
> > +};
> > +
> > +struct pt_riscv_64 {
> > +       struct pt_common common;
> > +};
> > +
> > +enum {
> > +       /*
> > +        * Support the 64k contiguous page size following the Svnapot extension.
> > +        */
> > +       PT_FEAT_RSICV_SVNAPOT_64K = PT_FEAT_FMT_START,
> 
> Is RSICV (not RISCV) on purpose?

No it is a typo, I fixed it.

Thanks,
Jason

WARNING: multiple messages have this Message-ID (diff)
From: Jason Gunthorpe <jgg@nvidia.com>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Joerg Roedel <joro@8bytes.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <pjw@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Tomasz Jeznach <tjeznach@rivosinc.com>,
	Will Deacon <will@kernel.org>,
	iommu@lists.linux.dev, linux-riscv@lists.infradead.org,
	lihangjing@bytedance.com, Xu Lu <luxu.kernel@bytedance.com>,
	patches@lists.linux.dev, xieyongji@bytedance.com
Subject: Re: [PATCH 1/5] iommupt: Add the RISC-V page table format
Date: Wed, 5 Nov 2025 20:24:21 -0400	[thread overview]
Message-ID: <20251106002421.GY1537560@nvidia.com> (raw)
In-Reply-To: <CAJM55Z8SyipTBG8G2wU2euvJhzcjJDp4B8fjm2Djwoonz8xf-g@mail.gmail.com>

On Wed, Nov 05, 2025 at 08:17:38AM +0900, Emil Renner Berthing wrote:
> Quoting Jason Gunthorpe (2025-11-04 20:00:40)
> > diff --git a/include/linux/generic_pt/common.h b/include/linux/generic_pt/common.h
> > index 96f8a6a7d60e10..10b8250659b98b 100644
> > --- a/include/linux/generic_pt/common.h
> > +++ b/include/linux/generic_pt/common.h
> > @@ -151,6 +151,21 @@ enum {
> >         PT_FEAT_AMDV1_FORCE_COHERENCE,
> >  };
> >
> > +struct pt_riscv_32 {
> > +       struct pt_common common;
> > +};
> > +
> > +struct pt_riscv_64 {
> > +       struct pt_common common;
> > +};
> > +
> > +enum {
> > +       /*
> > +        * Support the 64k contiguous page size following the Svnapot extension.
> > +        */
> > +       PT_FEAT_RSICV_SVNAPOT_64K = PT_FEAT_FMT_START,
> 
> Is RSICV (not RISCV) on purpose?

No it is a typo, I fixed it.

Thanks,
Jason

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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2025-11-06  0:24 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-04 19:00 [PATCH 0/5] Convert riscv to use the generic iommu page table Jason Gunthorpe
2025-11-04 19:00 ` Jason Gunthorpe
2025-11-04 19:00 ` [PATCH 1/5] iommupt: Add the RISC-V page table format Jason Gunthorpe
2025-11-04 19:00   ` Jason Gunthorpe
2025-11-04 23:17   ` Emil Renner Berthing
2025-11-04 23:17     ` Emil Renner Berthing
2025-11-06  0:24     ` Jason Gunthorpe [this message]
2025-11-06  0:24       ` Jason Gunthorpe
2025-11-04 19:00 ` [PATCH 2/5] iommu/riscv: Disable SADE Jason Gunthorpe
2025-11-04 19:00   ` Jason Gunthorpe
2025-11-04 19:00 ` [PATCH 3/5] iommu/riscv: Use the generic iommu page table Jason Gunthorpe
2025-11-04 19:00   ` Jason Gunthorpe
2025-11-04 19:00 ` [PATCH 4/5] iommu/riscv: Enable SVNAPOT support for contiguous ptes Jason Gunthorpe
2025-11-04 19:00   ` Jason Gunthorpe
2025-11-04 19:00 ` [PATCH 5/5] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST Jason Gunthorpe
2025-11-04 19:00   ` Jason Gunthorpe
2026-04-30  3:25 ` [PATCH 0/5] Convert riscv to use the generic iommu page table patchwork-bot+linux-riscv
2026-04-30  3:25   ` patchwork-bot+linux-riscv

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