From: Brian Sune <briansune@gmail.com>
To: Tom Rini <trini@konsulko.com>, u-boot@lists.denx.de
Subject: [PATCH v1] sync socfpga common u-boot dts
Date: Mon, 10 Nov 2025 13:00:40 +0800 [thread overview]
Message-ID: <20251110050040.183-1-briansune@gmail.com> (raw)
The dtsi for socfpga common should
turn on L2 and memory and no reason not
to do so
Signed-off-by: Brian Sune <briansune@gmail.com>
---
arch/arm/dts/socfpga-common-u-boot.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/socfpga-common-u-boot.dtsi b/arch/arm/dts/socfpga-common-u-boot.dtsi
index eb3d1039314..ff9da15665f 100644
--- a/arch/arm/dts/socfpga-common-u-boot.dtsi
+++ b/arch/arm/dts/socfpga-common-u-boot.dtsi
@@ -5,6 +5,10 @@
* Copyright (c) 2019 Simon Goldschmidt
*/
/{
+ memory {
+ bootph-all;
+ };
+
soc {
bootph-all;
};
@@ -14,6 +18,10 @@
bootph-all;
};
+&L2 {
+ bootph-all;
+};
+
&rst {
bootph-all;
};
--
2.25.1
next reply other threads:[~2025-11-10 5:01 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-10 5:00 Brian Sune [this message]
2025-11-12 16:35 ` [PATCH v1] sync socfpga common u-boot dts Sune Brian
2025-11-12 16:41 ` Tom Rini
2025-11-12 16:55 ` Sune Brian
2025-11-12 16:57 ` Tom Rini
2025-11-12 17:08 ` Sune Brian
2025-11-17 9:08 ` Chee, Tien Fong
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