[PATCH v1] sync socfpga common u-boot dts

[PATCH v1] sync socfpga common u-boot dts

[Brian Sune]

The dtsi for socfpga common should
turn on L2 and memory and no reason not
to do so

Signed-off-by: Brian Sune <briansune@gmail.com>
---
 arch/arm/dts/socfpga-common-u-boot.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/dts/socfpga-common-u-boot.dtsi b/arch/arm/dts/socfpga-common-u-boot.dtsi
index eb3d1039314..ff9da15665f 100644
--- a/arch/arm/dts/socfpga-common-u-boot.dtsi
+++ b/arch/arm/dts/socfpga-common-u-boot.dtsi
@@ -5,6 +5,10 @@
  * Copyright (c) 2019 Simon Goldschmidt
  */
 /{
+	memory {
+		bootph-all;
+	};
+
 	soc {
 		bootph-all;
 	};
@@ -14,6 +18,10 @@
 	bootph-all;
 };
 
+&L2 {
+	bootph-all;
+};
+
 &rst {
 	bootph-all;
 };
-- 
2.25.1

Re: [PATCH v1] sync socfpga common u-boot dts

[Sune Brian]

> The dtsi for socfpga common should
> turn on L2 and memory and no reason not
> to do so

Hi Tom,

Do TIENFONG still handles patches on SoCFPGA? Seems like there are
no action or response on all SoCFPGA related patches?

Brian

Re: [PATCH v1] sync socfpga common u-boot dts

[Tom Rini]

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On Thu, Nov 13, 2025 at 12:35:01AM +0800, Sune Brian wrote:
> > The dtsi for socfpga common should
> > turn on L2 and memory and no reason not
> > to do so
> 
> Hi Tom,
> 
> Do TIENFONG still handles patches on SoCFPGA? Seems like there are
> no action or response on all SoCFPGA related patches?

Yes, he's Tien Fong is still active, it's just that most subsystems are
fairly slow moving.

-- 
Tom

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Re: [PATCH v1] sync socfpga common u-boot dts

[Sune Brian]

> > Do TIENFONG still handles patches on SoCFPGA? Seems like there are
> > no action or response on all SoCFPGA related patches?
>
> Yes, he's Tien Fong is still active, it's just that most subsystems are
> fairly slow moving.

For patches that really affect normal boot should push back
to mainstream. Those patches really fixes the boot and w/o it
system completely stall.
For those that are more less critical can be handle in slower pace.

Brian

Re: [PATCH v1] sync socfpga common u-boot dts

[Tom Rini]

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On Thu, Nov 13, 2025 at 12:55:04AM +0800, Sune Brian wrote:
> > > Do TIENFONG still handles patches on SoCFPGA? Seems like there are
> > > no action or response on all SoCFPGA related patches?
> >
> > Yes, he's Tien Fong is still active, it's just that most subsystems are
> > fairly slow moving.
> 
> For patches that really affect normal boot should push back
> to mainstream. Those patches really fixes the boot and w/o it
> system completely stall.
> For those that are more less critical can be handle in slower pace.

If there's not a PR with them by rc4 or so, please do call out
individual patches that need to be picked up, that's typically how I
handle critical patches that haven't been grabbed yet. Thanks!

-- 
Tom

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Re: [PATCH v1] sync socfpga common u-boot dts

[Sune Brian]

> > > > Do TIENFONG still handles patches on SoCFPGA? Seems like there are
> > > > no action or response on all SoCFPGA related patches?
> > >
> > > Yes, he's Tien Fong is still active, it's just that most subsystems are
> > > fairly slow moving.
> >
> > For patches that really affect normal boot should push back
> > to mainstream. Those patches really fixes the boot and w/o it
> > system completely stall.
> > For those that are more less critical can be handle in slower pace.
>
> If there's not a PR with them by rc4 or so, please do call out
> individual patches that need to be picked up, that's typically how I
> handle critical patches that haven't been grabbed yet. Thanks!

There is one critical patch that breaks the boot completely.
"[v4] Altera SoCFpga Boot Stall Fix"
20251020133455.1870-1-briansune@gmail.com

The other patch that is less critical but SDRAM involves
communication will stall.
"FPGA2SDRAM setup fix"
20251020133554.1901-1-briansune@gmail.com

Other than that are all non-critical.
The original issue is Altera just consider the new
SoCFPGA series and accidentally remove the
if-else case for old GEN5.

Brian

Re: [PATCH v1] sync socfpga common u-boot dts

[Chee, Tien Fong]

On 10/11/2025 1:00 pm, Brian Sune wrote:
> The dtsi for socfpga common should
> turn on L2 and memory and no reason not
> to do so
>
> Signed-off-by: Brian Sune <briansune@gmail.com>
> ---
>   arch/arm/dts/socfpga-common-u-boot.dtsi | 8 ++++++++
>   1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/dts/socfpga-common-u-boot.dtsi b/arch/arm/dts/socfpga-common-u-boot.dtsi
> index eb3d1039314..ff9da15665f 100644
> --- a/arch/arm/dts/socfpga-common-u-boot.dtsi
> +++ b/arch/arm/dts/socfpga-common-u-boot.dtsi
> @@ -5,6 +5,10 @@
>    * Copyright (c) 2019 Simon Goldschmidt
>    */
>   /{
> +	memory {
> +		bootph-all;
> +	};
> +
>   	soc {
>   		bootph-all;
>   	};
> @@ -14,6 +18,10 @@
>   	bootph-all;
>   };
>   
> +&L2 {
> +	bootph-all;
> +};
> +
>   &rst {
>   	bootph-all;
>   };


Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>

Best regards,
Tien Fong