From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com,
palmer@dabbelt.com,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH v4 0/5] hw/riscv: Experimental Server Platform Reference Board
Date: Tue, 11 Nov 2025 15:29:39 -0300 [thread overview]
Message-ID: <20251111182944.2895892-1-dbarboza@ventanamicro.com> (raw)
Hi,
In this new version we addressed the comments from Chao Liu in patches 2
and 4.
We're also owning up the fact that the board is being contributed in an
incomplete status, given that we're missing 'sdext'.In theory we
shouldn't try to upstream it until we have 'sdext' implemented but this
board seems to be used by a lot of folks for for firmware development
and whatnot. Thus, I changed the board description in patch 3 to add an
'EXPERIMENTAL' tag.
This is how the board is presented with -M help:
$ ./build/qemu-system-riscv64 -M help Supported machines are:
amd-microblaze-v-generic AMD Microblaze-V generic platform
microchip-icicle-kit Microchip PolarFire SoC Icicle Kit none
empty machine rvsp-ref RISC-V Server SoC Reference board
(EXPERIMENTAL) (...)
Patch 5 adds documentation for the board. Again, making it clear that
this is an experimental board that will be subject to changes before
being 100% compliant with the spec.
Patches based on current master.
Changes in v4:
- patch 2:
- changed rvsp-ref CPU base type to BARE
- added a comment mentioning the lack of 'sdext'
- patch 3:
- changed the board description to add 'experimental'
- patch 4:
- fixed RVSP_IOMMU_SYS memmap addr: 0102000 -> 0x102000
- patch 5 (new):
- add board documentation
- v3 link: https://lore.kernel.org/qemu-riscv/20250528200129.1548259-1-dbarboza@ventanamicro.com/
Daniel Henrique Barboza (3):
target/riscv/cpu.c: remove 'bare' condition for .profile
hw/riscv/server_platform_ref.c: add riscv-iommu-sys
docs: add rvsp-ref.rst
Fei Wu (2):
target/riscv: Add server platform reference cpu
hw/riscv: experimental server platform reference machine
configs/devices/riscv64-softmmu/default.mak | 1 +
docs/system/riscv/rvsp-ref.rst | 28 +
docs/system/target-riscv.rst | 1 +
hw/riscv/Kconfig | 15 +
hw/riscv/meson.build | 1 +
hw/riscv/server_platform_ref.c | 1346 +++++++++++++++++++
target/riscv/cpu-qom.h | 1 +
target/riscv/cpu.c | 15 +-
8 files changed, 1407 insertions(+), 1 deletion(-)
create mode 100644 docs/system/riscv/rvsp-ref.rst
create mode 100644 hw/riscv/server_platform_ref.c
--
2.51.1
next reply other threads:[~2025-11-11 18:31 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-11 18:29 Daniel Henrique Barboza [this message]
2025-11-11 18:29 ` [PATCH v4 1/5] target/riscv/cpu.c: remove 'bare' condition for .profile Daniel Henrique Barboza
2025-11-24 2:02 ` Chao Liu
2025-11-11 18:29 ` [PATCH v4 2/5] target/riscv: Add server platform reference cpu Daniel Henrique Barboza
2025-11-11 23:05 ` Andrew Jones
2025-11-17 17:57 ` Daniel Henrique Barboza
2025-11-11 18:29 ` [PATCH v4 3/5] hw/riscv: experimental server platform reference machine Daniel Henrique Barboza
2025-11-11 23:36 ` Andrew Jones
2025-11-18 20:15 ` Daniel Henrique Barboza
2025-11-18 20:50 ` Andrew Jones
2025-11-12 7:13 ` Philippe Mathieu-Daudé
2025-11-24 1:56 ` Chao Liu
2025-11-25 11:24 ` Daniel Henrique Barboza
2025-11-25 15:39 ` Andrew Jones
2025-12-04 5:37 ` Anup Patel
2025-11-11 18:29 ` [PATCH v4 4/5] hw/riscv/server_platform_ref.c: add riscv-iommu-sys Daniel Henrique Barboza
2025-11-12 7:13 ` Philippe Mathieu-Daudé
2025-11-11 18:29 ` [PATCH v4 5/5] docs: add rvsp-ref.rst Daniel Henrique Barboza
2025-11-11 23:39 ` Andrew Jones
2025-11-24 2:06 ` Chao Liu
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