* [PATCH 1/2] tools/power/turbostat: Set per_cpu_msr_sum to NULL after free @ 2025-11-13 19:16 Emily Ehlert 2025-11-13 19:16 ` [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails Emily Ehlert 2025-11-25 18:06 ` [PATCH 1/2] tools/power/turbostat: Set per_cpu_msr_sum to NULL after free Len Brown 0 siblings, 2 replies; 11+ messages in thread From: Emily Ehlert @ 2025-11-13 19:16 UTC (permalink / raw) To: lenb; +Cc: linux-pm, linux-kernel, Emily Ehlert From: Emily Ehlert <ehemily@amazon.com> Set per_cpu_msr_sum to NULL after freeing it in the error path of msr_sum_record() to prevent potential use-after-free issues. Signed-off-by: Emily Ehlert <ehemily@amazon.com> --- tools/power/x86/turbostat/turbostat.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 72a280e7a9d5..9a2be201a3a6 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -6673,6 +6673,7 @@ void msr_sum_record(void) timer_delete(timerid); release_msr: free(per_cpu_msr_sum); + per_cpu_msr_sum = NULL; } /* -- 2.47.3 Amazon Web Services Development Center Germany GmbH Tamara-Danz-Str. 13 10243 Berlin Geschaeftsfuehrung: Christian Schlaeger, Christof Hellmis Eingetragen am Amtsgericht Charlottenburg unter HRB 257764 B Sitz: Berlin Ust-ID: DE 365 538 597 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails 2025-11-13 19:16 [PATCH 1/2] tools/power/turbostat: Set per_cpu_msr_sum to NULL after free Emily Ehlert @ 2025-11-13 19:16 ` Emily Ehlert 2025-11-25 18:13 ` Len Brown 2025-11-25 18:06 ` [PATCH 1/2] tools/power/turbostat: Set per_cpu_msr_sum to NULL after free Len Brown 1 sibling, 1 reply; 11+ messages in thread From: Emily Ehlert @ 2025-11-13 19:16 UTC (permalink / raw) To: lenb; +Cc: linux-pm, linux-kernel, Emily Ehlert From: Emily Ehlert <ehemily@amazon.com> turbostat uses hard coded features for CPU families and expects access to RAPL (Running Average Power Limit) MSRs. When RAPL or power info is not available, turbostat reads PKG_POWER_INFO MSR to calculate TDP with RAPL_POWER_UNIT MSR. If TDP calculation results in 0, no zero check is performed and the 0 TDP is used in division, resulting in an invalid rapl_joule_counter_range. This variable is later used in msr_sum_record() as a timer parameter to timer_settime() syscall, causing issues. Fix the issue by: - Introduce zero check for tdp in rapl_probe_intel() and rapl_probe_amd() - Introduce global variable no_rapl which is set to true if zero check fails - Skip RAPL-dependent functions when no_rapl is true - Add assertions and guards to prevent RAPL operations when disabled Signed-off-by: Emily Ehlert <ehemily@amazon.com> --- tools/power/x86/turbostat/turbostat.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 9a2be201a3a6..9c6ee0acbe12 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -531,6 +531,7 @@ static struct timeval procsysfs_tv_begin; int ignore_stdin; bool no_msr; bool no_perf; +bool no_rapl; enum gfx_sysfs_idx { GFX_rc6, @@ -3119,6 +3120,10 @@ int dump_counters(PER_THREAD_PARAMS) double rapl_counter_get_value(const struct rapl_counter *c, enum rapl_unit desired_unit, double interval) { + if (no_rapl) { + return NAN; + } + assert(desired_unit != RAPL_UNIT_INVALID); /* @@ -4696,6 +4701,8 @@ static size_t cstate_counter_info_count_perf(const struct cstate_counter_info_t void write_rapl_counter(struct rapl_counter *rc, struct rapl_counter_info_t *rci, unsigned int idx) { + assert(!no_rapl); + if (rci->source[idx] == COUNTER_SOURCE_NONE) return; @@ -4706,6 +4713,8 @@ void write_rapl_counter(struct rapl_counter *rc, struct rapl_counter_info_t *rci int get_rapl_counters(int cpu, unsigned int domain, struct core_data *c, struct pkg_data *p) { + assert(!no_rapl); + struct platform_counters *pplat_cnt = p == package_odd ? &platform_counters_odd : &platform_counters_even; unsigned long long perf_data[NUM_RAPL_COUNTERS + 1]; struct rapl_counter_info_t *rci; @@ -5147,7 +5156,7 @@ int get_counters(PER_THREAD_PARAMS) if (!is_cpu_first_thread_in_core(t, c, p)) goto done; - if (platform->has_per_core_rapl) { + if (platform->has_per_core_rapl && !no_rapl) { status = get_rapl_counters(cpu, get_rapl_domain_id(cpu), c, p); if (status != 0) return status; @@ -5213,7 +5222,7 @@ int get_counters(PER_THREAD_PARAMS) if (DO_BIC(BIC_SYS_LPI)) p->sys_lpi = cpuidle_cur_sys_lpi_us; - if (!platform->has_per_core_rapl) { + if (!platform->has_per_core_rapl && !no_rapl) { status = get_rapl_counters(cpu, get_rapl_domain_id(cpu), c, p); if (status != 0) return status; @@ -7650,6 +7659,12 @@ void rapl_probe_intel(void) tdp = get_tdp_intel(); + if (tdp == 0.0) { + no_rapl = true; + fprintf(outf, "RAPL: Could not calculate TDP (TDP: %.0f, MSR_RAPL_POWER_UNIT: %llx)\n", tdp, msr); + return; + } + rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; if (!quiet) fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp); @@ -7680,6 +7695,12 @@ void rapl_probe_amd(void) tdp = get_tdp_amd(); + if (tdp == 0.0) { + no_rapl = true; + fprintf(outf, "RAPL: Could not calculate TDP (TDP: %.0f, MSR_RAPL_POWER_UNIT: %llx)\n", tdp, msr); + return; + } + rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; if (!quiet) fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp); @@ -11215,7 +11236,7 @@ int main(int argc, char **argv) turbostat_init(); - if (!no_msr) + if (!no_msr && !no_rapl) msr_sum_record(); /* dump counters and exit */ -- 2.47.3 Amazon Web Services Development Center Germany GmbH Tamara-Danz-Str. 13 10243 Berlin Geschaeftsfuehrung: Christian Schlaeger, Christof Hellmis Eingetragen am Amtsgericht Charlottenburg unter HRB 257764 B Sitz: Berlin Ust-ID: DE 365 538 597 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails 2025-11-13 19:16 ` [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails Emily Ehlert @ 2025-11-25 18:13 ` Len Brown 2025-11-28 13:59 ` Ehlert, Emily 0 siblings, 1 reply; 11+ messages in thread From: Len Brown @ 2025-11-25 18:13 UTC (permalink / raw) To: Emily Ehlert; +Cc: linux-pm, linux-kernel, Emily Ehlert Can you share what system configuration went down this error path? I don't have a good feeling about this remedy. The reason we get TDP is to estimate if RAPL will overflow its undersized energy counters during the measurement interval. We arm a timer appropriately to accumulate RAPL if it looks like this will be possible. It is possible to run into that underlying issue, but it is not common usage. So my question is if you have a system where RAPL works fine, but we simply can't get TDP to build this safety net? If so, it may make more sense to adjust the safety net, say, using some conservative default timer interval, rather than not report RAPL at all. And if we do opt to disable RAPL, I'd rather uniformly use the existing build-in-counter macros for testing if a counter is actually present and enabled instead of a new global flag. thanks, -Len On Thu, Nov 13, 2025 at 2:17 PM Emily Ehlert <ehemily@amazon.de> wrote: > > From: Emily Ehlert <ehemily@amazon.com> > > turbostat uses hard coded features for CPU families and expects access to > RAPL (Running Average Power Limit) MSRs. When RAPL or power info is not > available, turbostat reads PKG_POWER_INFO MSR to calculate TDP with > RAPL_POWER_UNIT MSR. If TDP calculation results in 0, no zero check is > performed and the 0 TDP is used in division, resulting in an invalid > rapl_joule_counter_range. This variable is later used in msr_sum_record() > as a timer parameter to timer_settime() syscall, causing issues. > > Fix the issue by: > > - Introduce zero check for tdp in rapl_probe_intel() and rapl_probe_amd() > - Introduce global variable no_rapl which is set to true if zero check fails > - Skip RAPL-dependent functions when no_rapl is true > - Add assertions and guards to prevent RAPL operations when disabled > > Signed-off-by: Emily Ehlert <ehemily@amazon.com> > --- > tools/power/x86/turbostat/turbostat.c | 27 ++++++++++++++++++++++++--- > 1 file changed, 24 insertions(+), 3 deletions(-) > > diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c > index 9a2be201a3a6..9c6ee0acbe12 100644 > --- a/tools/power/x86/turbostat/turbostat.c > +++ b/tools/power/x86/turbostat/turbostat.c > @@ -531,6 +531,7 @@ static struct timeval procsysfs_tv_begin; > int ignore_stdin; > bool no_msr; > bool no_perf; > +bool no_rapl; > > enum gfx_sysfs_idx { > GFX_rc6, > @@ -3119,6 +3120,10 @@ int dump_counters(PER_THREAD_PARAMS) > > double rapl_counter_get_value(const struct rapl_counter *c, enum rapl_unit desired_unit, double interval) > { > + if (no_rapl) { > + return NAN; > + } > + > assert(desired_unit != RAPL_UNIT_INVALID); > > /* > @@ -4696,6 +4701,8 @@ static size_t cstate_counter_info_count_perf(const struct cstate_counter_info_t > > void write_rapl_counter(struct rapl_counter *rc, struct rapl_counter_info_t *rci, unsigned int idx) > { > + assert(!no_rapl); > + > if (rci->source[idx] == COUNTER_SOURCE_NONE) > return; > > @@ -4706,6 +4713,8 @@ void write_rapl_counter(struct rapl_counter *rc, struct rapl_counter_info_t *rci > > int get_rapl_counters(int cpu, unsigned int domain, struct core_data *c, struct pkg_data *p) > { > + assert(!no_rapl); > + > struct platform_counters *pplat_cnt = p == package_odd ? &platform_counters_odd : &platform_counters_even; > unsigned long long perf_data[NUM_RAPL_COUNTERS + 1]; > struct rapl_counter_info_t *rci; > @@ -5147,7 +5156,7 @@ int get_counters(PER_THREAD_PARAMS) > if (!is_cpu_first_thread_in_core(t, c, p)) > goto done; > > - if (platform->has_per_core_rapl) { > + if (platform->has_per_core_rapl && !no_rapl) { > status = get_rapl_counters(cpu, get_rapl_domain_id(cpu), c, p); > if (status != 0) > return status; > @@ -5213,7 +5222,7 @@ int get_counters(PER_THREAD_PARAMS) > if (DO_BIC(BIC_SYS_LPI)) > p->sys_lpi = cpuidle_cur_sys_lpi_us; > > - if (!platform->has_per_core_rapl) { > + if (!platform->has_per_core_rapl && !no_rapl) { > status = get_rapl_counters(cpu, get_rapl_domain_id(cpu), c, p); > if (status != 0) > return status; > @@ -7650,6 +7659,12 @@ void rapl_probe_intel(void) > > tdp = get_tdp_intel(); > > + if (tdp == 0.0) { > + no_rapl = true; > + fprintf(outf, "RAPL: Could not calculate TDP (TDP: %.0f, MSR_RAPL_POWER_UNIT: %llx)\n", tdp, msr); > + return; > + } > + > rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; > if (!quiet) > fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp); > @@ -7680,6 +7695,12 @@ void rapl_probe_amd(void) > > tdp = get_tdp_amd(); > > + if (tdp == 0.0) { > + no_rapl = true; > + fprintf(outf, "RAPL: Could not calculate TDP (TDP: %.0f, MSR_RAPL_POWER_UNIT: %llx)\n", tdp, msr); > + return; > + } > + > rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; > if (!quiet) > fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp); > @@ -11215,7 +11236,7 @@ int main(int argc, char **argv) > > turbostat_init(); > > - if (!no_msr) > + if (!no_msr && !no_rapl) > msr_sum_record(); > > /* dump counters and exit */ > -- > 2.47.3 > > > > > Amazon Web Services Development Center Germany GmbH > Tamara-Danz-Str. 13 > 10243 Berlin > Geschaeftsfuehrung: Christian Schlaeger, Christof Hellmis > Eingetragen am Amtsgericht Charlottenburg unter HRB 257764 B > Sitz: Berlin > Ust-ID: DE 365 538 597 > -- Len Brown, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails 2025-11-25 18:13 ` Len Brown @ 2025-11-28 13:59 ` Ehlert, Emily 2025-11-30 5:27 ` Len Brown 0 siblings, 1 reply; 11+ messages in thread From: Ehlert, Emily @ 2025-11-28 13:59 UTC (permalink / raw) To: Len Brown Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Emily Ehlert We are running turbostat inside a VM on the AWS Nitro Hypervisor. Guests are not provided with any power measurements. So reading the MSR_RAPL_POWER_UNIT will read 0. Since turbostat expects working RAPL for this CPU family, failing to read them leads to an exit (because setting the the timer fails). I agree that the patch should disable RAPL not after TPM but after the RAPL_POWER_UNIT MSR read. I am not experienced with the way turbostat uses the BIC counter macros. It seems like these are mostly used for enabling / disabling individual counters? How would I go about using them to disable RAPL in general without affecting other MSRs such as CPU%c1 which we can and want to read? I would appreciate some pointers or rough outline on how I can approach the issue. ________________________________________ From: Len Brown <lenb@kernel.org> Sent: Tuesday, November 25, 2025 7:13 PM To: Ehlert, Emily Cc: linux-pm@vger.kernel.org; linux-kernel@vger.kernel.org; Emily Ehlert Subject: RE: [EXTERNAL] [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you can confirm the sender and know the content is safe. Can you share what system configuration went down this error path? I don't have a good feeling about this remedy. The reason we get TDP is to estimate if RAPL will overflow its undersized energy counters during the measurement interval. We arm a timer appropriately to accumulate RAPL if it looks like this will be possible. It is possible to run into that underlying issue, but it is not common usage. So my question is if you have a system where RAPL works fine, but we simply can't get TDP to build this safety net? If so, it may make more sense to adjust the safety net, say, using some conservative default timer interval, rather than not report RAPL at all. And if we do opt to disable RAPL, I'd rather uniformly use the existing build-in-counter macros for testing if a counter is actually present and enabled instead of a new global flag. thanks, -Len On Thu, Nov 13, 2025 at 2:17 PM Emily Ehlert <ehemily@amazon.de> wrote: > > From: Emily Ehlert <ehemily@amazon.com> > > turbostat uses hard coded features for CPU families and expects access to > RAPL (Running Average Power Limit) MSRs. When RAPL or power info is not > available, turbostat reads PKG_POWER_INFO MSR to calculate TDP with > RAPL_POWER_UNIT MSR. If TDP calculation results in 0, no zero check is > performed and the 0 TDP is used in division, resulting in an invalid > rapl_joule_counter_range. This variable is later used in msr_sum_record() > as a timer parameter to timer_settime() syscall, causing issues. > > Fix the issue by: > > - Introduce zero check for tdp in rapl_probe_intel() and rapl_probe_amd() > - Introduce global variable no_rapl which is set to true if zero check fails > - Skip RAPL-dependent functions when no_rapl is true > - Add assertions and guards to prevent RAPL operations when disabled > > Signed-off-by: Emily Ehlert <ehemily@amazon.com> > --- > tools/power/x86/turbostat/turbostat.c | 27 ++++++++++++++++++++++++--- > 1 file changed, 24 insertions(+), 3 deletions(-) > > diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c > index 9a2be201a3a6..9c6ee0acbe12 100644 > --- a/tools/power/x86/turbostat/turbostat.c > +++ b/tools/power/x86/turbostat/turbostat.c > @@ -531,6 +531,7 @@ static struct timeval procsysfs_tv_begin; > int ignore_stdin; > bool no_msr; > bool no_perf; > +bool no_rapl; > > enum gfx_sysfs_idx { > GFX_rc6, > @@ -3119,6 +3120,10 @@ int dump_counters(PER_THREAD_PARAMS) > > double rapl_counter_get_value(const struct rapl_counter *c, enum rapl_unit desired_unit, double interval) > { > + if (no_rapl) { > + return NAN; > + } > + > assert(desired_unit != RAPL_UNIT_INVALID); > > /* > @@ -4696,6 +4701,8 @@ static size_t cstate_counter_info_count_perf(const struct cstate_counter_info_t > > void write_rapl_counter(struct rapl_counter *rc, struct rapl_counter_info_t *rci, unsigned int idx) > { > + assert(!no_rapl); > + > if (rci->source[idx] == COUNTER_SOURCE_NONE) > return; > > @@ -4706,6 +4713,8 @@ void write_rapl_counter(struct rapl_counter *rc, struct rapl_counter_info_t *rci > > int get_rapl_counters(int cpu, unsigned int domain, struct core_data *c, struct pkg_data *p) > { > + assert(!no_rapl); > + > struct platform_counters *pplat_cnt = p == package_odd ? &platform_counters_odd : &platform_counters_even; > unsigned long long perf_data[NUM_RAPL_COUNTERS + 1]; > struct rapl_counter_info_t *rci; > @@ -5147,7 +5156,7 @@ int get_counters(PER_THREAD_PARAMS) > if (!is_cpu_first_thread_in_core(t, c, p)) > goto done; > > - if (platform->has_per_core_rapl) { > + if (platform->has_per_core_rapl && !no_rapl) { > status = get_rapl_counters(cpu, get_rapl_domain_id(cpu), c, p); > if (status != 0) > return status; > @@ -5213,7 +5222,7 @@ int get_counters(PER_THREAD_PARAMS) > if (DO_BIC(BIC_SYS_LPI)) > p->sys_lpi = cpuidle_cur_sys_lpi_us; > > - if (!platform->has_per_core_rapl) { > + if (!platform->has_per_core_rapl && !no_rapl) { > status = get_rapl_counters(cpu, get_rapl_domain_id(cpu), c, p); > if (status != 0) > return status; > @@ -7650,6 +7659,12 @@ void rapl_probe_intel(void) > > tdp = get_tdp_intel(); > > + if (tdp == 0.0) { > + no_rapl = true; > + fprintf(outf, "RAPL: Could not calculate TDP (TDP: %.0f, MSR_RAPL_POWER_UNIT: %llx)\n", tdp, msr); > + return; > + } > + > rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; > if (!quiet) > fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp); > @@ -7680,6 +7695,12 @@ void rapl_probe_amd(void) > > tdp = get_tdp_amd(); > > + if (tdp == 0.0) { > + no_rapl = true; > + fprintf(outf, "RAPL: Could not calculate TDP (TDP: %.0f, MSR_RAPL_POWER_UNIT: %llx)\n", tdp, msr); > + return; > + } > + > rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; > if (!quiet) > fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp); > @@ -11215,7 +11236,7 @@ int main(int argc, char **argv) > > turbostat_init(); > > - if (!no_msr) > + if (!no_msr && !no_rapl) > msr_sum_record(); > > /* dump counters and exit */ > -- > 2.47.3 > > > > > Amazon Web Services Development Center Germany GmbH > Tamara-Danz-Str. 13 > 10243 Berlin > Geschaeftsfuehrung: Christian Schlaeger, Christof Hellmis > Eingetragen am Amtsgericht Charlottenburg unter HRB 257764 B > Sitz: Berlin > Ust-ID: DE 365 538 597 > -- Len Brown, Intel Open Source Technology Center Amazon Web Services Development Center Germany GmbH Tamara-Danz-Str. 13 10243 Berlin Geschaeftsfuehrung: Christian Schlaeger, Christof Hellmis Eingetragen am Amtsgericht Charlottenburg unter HRB 257764 B Sitz: Berlin Ust-ID: DE 365 538 597 ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails 2025-11-28 13:59 ` Ehlert, Emily @ 2025-11-30 5:27 ` Len Brown 2025-12-01 8:55 ` Ehlert, Emily 0 siblings, 1 reply; 11+ messages in thread From: Len Brown @ 2025-11-30 5:27 UTC (permalink / raw) To: Ehlert, Emily, Zhang, Rui Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Emily Ehlert On Fri, Nov 28, 2025 at 9:00 AM Ehlert, Emily <ehemily@amazon.de> wrote: > > We are running turbostat inside a VM on the AWS Nitro Hypervisor. > Guests are not provided with any power measurements. So reading the > MSR_RAPL_POWER_UNIT will read 0. Since turbostat expects working > RAPL for this CPU family, failing to read them leads to an exit (because > setting the the timer fails). I agree that the patch should disable RAPL > not after TPM but after the RAPL_POWER_UNIT MSR read. > > I am not experienced with the way turbostat uses the BIC counter macros. > It seems like these are mostly used for enabling / disabling individual counters? > How would I go about using them to disable RAPL in general without affecting > other MSRs such as CPU%c1 which we can and want to read? I would appreciate > some pointers or rough outline on how I can approach the issue. Thanks, that is helpful. I think we agree that this check should be earlier. In this scenario, we want to override platform->rapl_msrs -- clearing it because the MSRs are not actually available... I cut a patch to replace all the tests of platform->rapl_msrs with a global variable that was initialized to (read-only) platform->rapl_msrs, but was cleared before the test in rapl_probe_intel(), and when I run with --no-perf (so that turbostat must use MSRs) it seems to disable all the RAPL stuff cleanly. So the question becomes what test to use to determine that we should not believe platform->, and we should instead nuke RAPL support? Once upon a time we used to actually probe the RAPL msrs by trying to read them. If they failed to read or were zero, we would fail the probe and disable the couter. But that turned out to be problematic b/c some platforms had non-zero unsupported MSRs etc. so we moved to hard-coding the platform capabilities in a table. In the VM, does the MSR read fail entirely, or does it just return 0 values for unsupported MSRs? thanks, Len Brown, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails 2025-11-30 5:27 ` Len Brown @ 2025-12-01 8:55 ` Ehlert, Emily 2025-12-01 17:07 ` Len Brown 0 siblings, 1 reply; 11+ messages in thread From: Ehlert, Emily @ 2025-12-01 8:55 UTC (permalink / raw) To: Len Brown, Zhang, Rui Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Emily Ehlert > I cut a patch to replace all the tests of platform->rapl_msrs with a > global variable that was initialized to (read-only) platform->rapl_msrs, > but was cleared before the test in rapl_probe_intel(), and when I run > with --no-perf (so that turbostat must use MSRs) it seems to disable > all the RAPL stuff cleanly. That is very promising. > Once upon a time we used to actually probe the RAPL msrs by trying to read them. > If they failed to read or were zero, we would fail the probe and > disable the couter. > But that turned out to be problematic b/c some platforms had non-zero > unsupported MSRs etc. > so we moved to hard-coding the platform capabilities in a table. I can see how this creates problems. > In the VM, does the MSR read fail entirely, or does it just return 0 > values for unsupported MSRs? Reading the MSR succeeds, but the read value is 0. So at least for the Nitro Hypervisor testing for 0 would be sufficient. I am not sure how other hypervisor solutions handle this issue, but I assume it will either be 0 as well or not provide the /dev/cpu/*/msr file. Here is a log for the running the Ubuntu 24.04 bundled turbostat on a c7i.xlarge instance (Intel Saaphire Rapids CPU): ``` # turbostat -n 1 -i 1 turbostat version 2025.02.02 - Len Brown <lenb@kernel.org> Kernel command line: BOOT_IMAGE=/vmlinuz-6.14.0-1015-aws root=PARTUUID=cd553419-794d-4da4-9ba5-c355f5f9f74d ro console=tty1 console=ttyS0 nvme_core.io_timeout=4294967295 panic=-1 CPUID(0): GenuineIntel 0x1f CPUID levels CPUID(1): family:model:stepping 0x6:8f:8 (6:143:8) microcode 0x2b000643 CPUID(0x80000000): max_extended_levels: 0x80000008 CPUID(1): SSE3 MONITOR - - - TSC MSR - HT - CPUID(6): APERF, TURBO, No-DTS, No-PTM, No-HWP, No-HWPnotify, No-HWPwindow, No-HWPepp, No-HWPpkg, No-EPB cpu0: MSR_IA32_MISC_ENABLE: 0x00000001 (No-TCC No-EIST No-MWAIT PREFETCH TURBO) CPUID(7): No-SGX No-Hybrid CPUID(0x16): base_mhz: 0 max_mhz: 0 bus_mhz: 0 cpu0: MSR_PLATFORM_INFO: 0x80080001800 8 * 100.0 = 800.0 MHz max efficiency frequency 24 * 100.0 = 2400.0 MHz base frequency cpu0: MSR_TURBO_RATIO_LIMIT: 0x2020212123242526 cpu0: MSR_TURBO_RATIO_LIMIT1: 0x302e2c2a26221e18 32 * 100.0 = 3200.0 MHz max turbo 48 active cores 32 * 100.0 = 3200.0 MHz max turbo 46 active cores 33 * 100.0 = 3300.0 MHz max turbo 44 active cores 33 * 100.0 = 3300.0 MHz max turbo 42 active cores 35 * 100.0 = 3500.0 MHz max turbo 38 active cores 36 * 100.0 = 3600.0 MHz max turbo 34 active cores 37 * 100.0 = 3700.0 MHz max turbo 30 active cores 38 * 100.0 = 3800.0 MHz max turbo 24 active cores cpu0: MSR_CONFIG_TDP_NOMINAL: 0x00000000 (base_ratio=0) cpu0: MSR_CONFIG_TDP_LEVEL_1: 0x00000000 () cpu0: MSR_CONFIG_TDP_LEVEL_2: 0x00000000 () cpu0: MSR_CONFIG_TDP_CONTROL: 0x00000000 ( lock=0) cpu0: MSR_TURBO_ACTIVATION_RATIO: 0x00000000 (MAX_NON_TURBO_RATIO=0 lock=0) NSFOD /sys/devices/system/cpu/cpu0/cpufreq/scaling_driver cpu0: MSR_MISC_PWR_MGMT: 0x00000100 (ENable-EIST_Coordination DISable-EPB ENable-OOB) cpu0: MSR_IA32_POWER_CTL: 0x00000000 (C1E auto-promotion: DISabled) C-state Pre-wake: ENabled cpu0: MSR_PKG_CST_CONFIG_CONTROL: 0x00008000 (locked, pkg-cstate-limit=0 (pc0)) /dev/cpu_dma_latency: 2000000000 usec (default) current_driver: intel_idle current_governor: menu current_governor_ro: menu cpu0: POLL: CPUIDLE CORE POLL IDLE cpu0: C1: MWAIT 0x00 cpu0: C1E: MWAIT 0x01 cpu0: C6: MWAIT 0x20 cpu0: MSR_PKGC6_IRTL: 0x00000000 (NOTvalid, 0 ns) RAPL: inf sec. Joule Counter Range, at 0 Watts cpu0: MSR_RAPL_POWER_UNIT: 0x00000000 (1.000000 Watts, 1.000000 Joules, 0.000977 sec.) cpu0: MSR_PKG_POWER_INFO: 0x00000000 (0 W TDP, RAPL 0 - 0 W, 0.000000 sec.) cpu0: MSR_PKG_POWER_LIMIT: 0x00000000 (UNlocked) cpu0: PKG Limit #1: DISabled (0.000 Watts, 0.000977 sec, clamp DISabled) cpu0: PKG Limit #2: DISabled (0.000 Watts, 0.000977* sec, clamp DISabled) cpu0: MSR_VR_CURRENT_CONFIG: 0x00000000 cpu0: PKG Limit #4: 0.000000 Watts (UNlocked) cpu0: MSR_DRAM_POWER_INFO,: 0x00000000 (0 W TDP, RAPL 0 - 0 W, 0.000000 sec.) cpu0: MSR_DRAM_POWER_LIMIT: 0x00000000 (UNlocked) cpu0: DRAM Limit: DISabled (0.000 Watts, 0.000977 sec, clamp DISabled) cpu0: MSR_MISC_FEATURE_CONTROL: 0x00000000 (L2-Prefetch L2-Prefetch-pair L1-Prefetch L1-IP-Prefetch) Can not set timer. Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz IPC IRQ NMI SMI POLL C1 C1E C6 POLL% C1% C1E% C6% CPU%c1 CPU%c6 PKG_% RAM_% - - 18 0.57 3202 2400 0.09 118 0 0 0 0 34 1095 0.00 0.00 0.60 99.19 0.85 98.34 373518666955243456.00 226092884916511136.00 0 0 17 0.54 3201 2400 0.08 24 0 0 0 0 7 266 0.00 0.00 0.52 99.32 0.74 98.45 373628274941881472.00 226159231228225312.00 0 2 19 0.61 3202 2400 0.07 35 0 0 0 0 8 280 0.00 0.00 0.54 99.24 0.74 1 1 17 0.53 3200 2400 0.07 19 0 0 0 0 7 267 0.00 0.00 0.48 99.37 0.97 98.23 1 3 20 0.62 3205 2400 0.12 40 0 0 0 0 12 282 0.00 0.00 0.87 98.90 0.97 ``` ________________________________________ From: Len Brown <lenb@kernel.org> Sent: Sunday, November 30, 2025 6:27 AM To: Ehlert, Emily; Zhang, Rui Cc: linux-pm@vger.kernel.org; linux-kernel@vger.kernel.org; Emily Ehlert Subject: RE: [EXTERNAL] [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you can confirm the sender and know the content is safe. On Fri, Nov 28, 2025 at 9:00 AM Ehlert, Emily <ehemily@amazon.de> wrote: > > We are running turbostat inside a VM on the AWS Nitro Hypervisor. > Guests are not provided with any power measurements. So reading the > MSR_RAPL_POWER_UNIT will read 0. Since turbostat expects working > RAPL for this CPU family, failing to read them leads to an exit (because > setting the the timer fails). I agree that the patch should disable RAPL > not after TPM but after the RAPL_POWER_UNIT MSR read. > > I am not experienced with the way turbostat uses the BIC counter macros. > It seems like these are mostly used for enabling / disabling individual counters? > How would I go about using them to disable RAPL in general without affecting > other MSRs such as CPU%c1 which we can and want to read? I would appreciate > some pointers or rough outline on how I can approach the issue. Thanks, that is helpful. I think we agree that this check should be earlier. In this scenario, we want to override platform->rapl_msrs -- clearing it because the MSRs are not actually available... I cut a patch to replace all the tests of platform->rapl_msrs with a global variable that was initialized to (read-only) platform->rapl_msrs, but was cleared before the test in rapl_probe_intel(), and when I run with --no-perf (so that turbostat must use MSRs) it seems to disable all the RAPL stuff cleanly. So the question becomes what test to use to determine that we should not believe platform->, and we should instead nuke RAPL support? Once upon a time we used to actually probe the RAPL msrs by trying to read them. If they failed to read or were zero, we would fail the probe and disable the couter. But that turned out to be problematic b/c some platforms had non-zero unsupported MSRs etc. so we moved to hard-coding the platform capabilities in a table. In the VM, does the MSR read fail entirely, or does it just return 0 values for unsupported MSRs? thanks, Len Brown, Intel Open Source Technology Center Amazon Web Services Development Center Germany GmbH Tamara-Danz-Str. 13 10243 Berlin Geschaeftsfuehrung: Christian Schlaeger, Christof Hellmis Eingetragen am Amtsgericht Charlottenburg unter HRB 257764 B Sitz: Berlin Ust-ID: DE 365 538 597 ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails 2025-12-01 8:55 ` Ehlert, Emily @ 2025-12-01 17:07 ` Len Brown 2025-12-01 19:14 ` Len Brown 0 siblings, 1 reply; 11+ messages in thread From: Len Brown @ 2025-12-01 17:07 UTC (permalink / raw) To: Ehlert, Emily Cc: Zhang, Rui, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Emily Ehlert > Reading the MSR succeeds, but the read value is 0. So at least for the > Nitro Hypervisor testing for 0 would be sufficient. Great! > I am not sure how > other hypervisor solutions handle this issue, but I assume it will either > be 0 as well or not provide the /dev/cpu/*/msr file. Agreed. The historic probe strategy blindly read the MSRs and tried to determine anoint an MSR as present if it behaved according to some heuristics. Today we have MSRs enumerated in a table. So we can use the reverse probe strategy -- probe the enumerated MSRs and disqualify them if they don't read, or read 0. Indeed, RAPL Package Domain is universal -- if that doesn't work, then I think we can disqualify all of RAPL. I'll send you a patch for this later today. Len Brown, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails 2025-12-01 17:07 ` Len Brown @ 2025-12-01 19:14 ` Len Brown 2025-12-02 9:09 ` Ehlert, Emily 0 siblings, 1 reply; 11+ messages in thread From: Len Brown @ 2025-12-01 19:14 UTC (permalink / raw) To: Ehlert, Emily Cc: Zhang, Rui, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Emily Ehlert > I'll send you a patch for this later today. Please try the latest turbostat in my public tree: git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux.git turbostat The top commit should be this: commit 4b295ae45d3e6eb4d811c8fc2408b9e4e91c9474 (turbostat, next) Author: Len Brown <len.brown@intel.com> Date: Sun Nov 30 00:11:22 2025 -0500 tools/power turbostat: Validate that RAPL MSRs really exist Even though the platform->plat_rapl_msrs enumeration may be accurate, a VM may deny access to the underlying MSRs. Probe if PKG_ENERGY is readable and non-zero. If no, ignore all RAPL MSRs. Reported-by: Emily Ehlert <ehemily@amazon.de> Signed-off-by: Len Brown <len.brown@intel.com> ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails 2025-12-01 19:14 ` Len Brown @ 2025-12-02 9:09 ` Ehlert, Emily 2025-12-02 16:20 ` Len Brown 0 siblings, 1 reply; 11+ messages in thread From: Ehlert, Emily @ 2025-12-02 9:09 UTC (permalink / raw) To: Len Brown Cc: Zhang, Rui, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Emily Ehlert Thanks for the patch. I think there is one small mistake leading to RAPL not being disabled properly if the read is 0. This patch here should fix it and makes turbostat run with good values. ``` diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index c2b72b4e80c4..b5da37ce5ac7 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -7986,9 +7986,11 @@ void probe_rapl_msrs(void) fprintf(outf, "Can not read RAPL_PKG_ENERGY MSR(0x%llx)\n", (unsigned long long)offset); return; } - if (msr_value == 0) + if (msr_value == 0) { if (debug) fprintf(outf, "RAPL_PKG_ENERGY MSR(0x%llx) == ZERO: disabling all RAPL MSRs\n", (unsigned long long)offset); + return; + } valid_rapl_msrs = platform->plat_rapl_msrs; /* success */ } ``` Log output of turbostat with this patch applied: ``` turbostat version 2025.12.01 - Len Brown <lenb@kernel.org> Kernel command line: BOOT_IMAGE=/vmlinuz-6.14.0-1015-aws root=PARTUUID=cd553419-794d-4da4-9ba5-c355f5f9f74d ro console=tty1 console=ttyS0 nvme_core.io_timeout=4294967295 panic=-1 add_counter(msr0, cpuidle/state3/time, C6%, width64, scope0, type3, format2, flags2, id0) add_counter(msr0, cpuidle/state2/time, C1E%, width64, scope0, type3, format2, flags2, id0) find_msrp_by_name: C1E% C6% add_counter(msr0, cpuidle/state1/time, C1%, width64, scope0, type3, format2, flags2, id0) find_msrp_by_name: C1% C1E% find_msrp_by_name: C1% C6% add_counter(msr0, cpuidle/state0/time, POLL%, width64, scope0, type3, format2, flags2, id0) find_msrp_by_name: POLL% C1% find_msrp_by_name: POLL% C1E% find_msrp_by_name: POLL% C6% add_counter(msr0, cpuidle/state3/below, C6+, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: C6+ POLL% find_msrp_by_name: C6+ C1% find_msrp_by_name: C6+ C1E% find_msrp_by_name: C6+ C6% add_counter(msr0, cpuidle/state3/usage, C6, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: C6 C6+ find_msrp_by_name: C6 POLL% find_msrp_by_name: C6 C1% find_msrp_by_name: C6 C1E% find_msrp_by_name: C6 C6% add_counter(msr0, cpuidle/state3/above, C6-, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: C6- C6 find_msrp_by_name: C6- C6+ find_msrp_by_name: C6- POLL% find_msrp_by_name: C6- C1% find_msrp_by_name: C6- C1E% find_msrp_by_name: C6- C6% add_counter(msr0, cpuidle/state2/below, C1E+, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: C1E+ C6- find_msrp_by_name: C1E+ C6 find_msrp_by_name: C1E+ C6+ find_msrp_by_name: C1E+ POLL% find_msrp_by_name: C1E+ C1% find_msrp_by_name: C1E+ C1E% find_msrp_by_name: C1E+ C6% add_counter(msr0, cpuidle/state2/usage, C1E, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: C1E C1E+ find_msrp_by_name: C1E C6- find_msrp_by_name: C1E C6 find_msrp_by_name: C1E C6+ find_msrp_by_name: C1E POLL% find_msrp_by_name: C1E C1% find_msrp_by_name: C1E C1E% find_msrp_by_name: C1E C6% add_counter(msr0, cpuidle/state2/above, C1E-, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: C1E- C1E find_msrp_by_name: C1E- C1E+ find_msrp_by_name: C1E- C6- find_msrp_by_name: C1E- C6 find_msrp_by_name: C1E- C6+ find_msrp_by_name: C1E- POLL% find_msrp_by_name: C1E- C1% find_msrp_by_name: C1E- C1E% find_msrp_by_name: C1E- C6% add_counter(msr0, cpuidle/state1/below, C1+, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: C1+ C1E- find_msrp_by_name: C1+ C1E find_msrp_by_name: C1+ C1E+ find_msrp_by_name: C1+ C6- find_msrp_by_name: C1+ C6 find_msrp_by_name: C1+ C6+ find_msrp_by_name: C1+ POLL% find_msrp_by_name: C1+ C1% find_msrp_by_name: C1+ C1E% find_msrp_by_name: C1+ C6% add_counter(msr0, cpuidle/state1/usage, C1, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: C1 C1+ find_msrp_by_name: C1 C1E- find_msrp_by_name: C1 C1E find_msrp_by_name: C1 C1E+ find_msrp_by_name: C1 C6- find_msrp_by_name: C1 C6 find_msrp_by_name: C1 C6+ find_msrp_by_name: C1 POLL% find_msrp_by_name: C1 C1% find_msrp_by_name: C1 C1E% find_msrp_by_name: C1 C6% add_counter(msr0, cpuidle/state1/above, C1-, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: C1- C1 find_msrp_by_name: C1- C1+ find_msrp_by_name: C1- C1E- find_msrp_by_name: C1- C1E find_msrp_by_name: C1- C1E+ find_msrp_by_name: C1- C6- find_msrp_by_name: C1- C6 find_msrp_by_name: C1- C6+ find_msrp_by_name: C1- POLL% find_msrp_by_name: C1- C1% find_msrp_by_name: C1- C1E% find_msrp_by_name: C1- C6% add_counter(msr0, cpuidle/state0/usage, POLL, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: POLL C1- find_msrp_by_name: POLL C1 find_msrp_by_name: POLL C1+ find_msrp_by_name: POLL C1E- find_msrp_by_name: POLL C1E find_msrp_by_name: POLL C1E+ find_msrp_by_name: POLL C6- find_msrp_by_name: POLL C6 find_msrp_by_name: POLL C6+ find_msrp_by_name: POLL POLL% find_msrp_by_name: POLL C1% find_msrp_by_name: POLL C1E% find_msrp_by_name: POLL C6% add_counter(msr0, cpuidle/state0/above, POLL-, width64, scope0, type0, format1, flags2, id0) find_msrp_by_name: POLL- POLL find_msrp_by_name: POLL- C1- find_msrp_by_name: POLL- C1 find_msrp_by_name: POLL- C1+ find_msrp_by_name: POLL- C1E- find_msrp_by_name: POLL- C1E find_msrp_by_name: POLL- C1E+ find_msrp_by_name: POLL- C6- find_msrp_by_name: POLL- C6 find_msrp_by_name: POLL- C6+ find_msrp_by_name: POLL- POLL% find_msrp_by_name: POLL- C1% find_msrp_by_name: POLL- C1E% find_msrp_by_name: POLL- C6% cpu 0 pkg 0 die 0 l3 0 node 0 lnode 0 core 0 thread 0 cpu 1 pkg 0 die 0 l3 0 node 0 lnode 0 core 1 thread 0 cpu 2 pkg 0 die 0 l3 0 node 0 lnode 0 core 2 thread 0 cpu 3 pkg 0 die 0 l3 0 node 0 lnode 0 core 3 thread 0 cpu 4 pkg 0 die 0 l3 0 node 0 lnode 0 core 0 thread 1 cpu 5 pkg 0 die 0 l3 0 node 0 lnode 0 core 1 thread 1 cpu 6 pkg 0 die 0 l3 0 node 0 lnode 0 core 2 thread 1 cpu 7 pkg 0 die 0 l3 0 node 0 lnode 0 core 3 thread 1 CPUID(0): GenuineIntel 0x1f CPUID levels CPUID(1): family:model:stepping 0x6:8f:8 (6:143:8) microcode 0x2b000643 CPUID(0x80000000): max_extended_levels: 0x80000008 CPUID(1): SSE3 MONITOR - - - TSC MSR - HT - CPUID(6): APERF, TURBO, No-DTS, No-PTM, No-HWP, No-HWPnotify, No-HWPwindow, No-HWPepp, No-HWPpkg, No-EPB cpu0: MSR_IA32_MISC_ENABLE: 0x00000001 (No-TCC No-EIST No-MWAIT PREFETCH TURBO) CPUID(7): No-SGX No-Hybrid CPUID(0x16): base_mhz: 0 max_mhz: 0 bus_mhz: 0 cpu0: MSR_PLATFORM_INFO: 0x80080001800 8 * 100.0 = 800.0 MHz max efficiency frequency 24 * 100.0 = 2400.0 MHz base frequency cpu0: MSR_TURBO_RATIO_LIMIT: 0x2020212123242526 cpu0: MSR_TURBO_RATIO_LIMIT1: 0x302e2c2a26221e18 32 * 100.0 = 3200.0 MHz max turbo 48 active cores 32 * 100.0 = 3200.0 MHz max turbo 46 active cores 33 * 100.0 = 3300.0 MHz max turbo 44 active cores 33 * 100.0 = 3300.0 MHz max turbo 42 active cores 35 * 100.0 = 3500.0 MHz max turbo 38 active cores 36 * 100.0 = 3600.0 MHz max turbo 34 active cores 37 * 100.0 = 3700.0 MHz max turbo 30 active cores 38 * 100.0 = 3800.0 MHz max turbo 24 active cores cpu0: MSR_CONFIG_TDP_NOMINAL: 0x00000000 (base_ratio=0) cpu0: MSR_CONFIG_TDP_LEVEL_1: 0x00000000 () cpu0: MSR_CONFIG_TDP_LEVEL_2: 0x00000000 () cpu0: MSR_CONFIG_TDP_CONTROL: 0x00000000 ( lock=0) cpu0: MSR_TURBO_ACTIVATION_RATIO: 0x00000000 (MAX_NON_TURBO_RATIO=0 lock=0) NSFOD /sys/devices/system/cpu/cpu0/cpufreq/scaling_driver cpu0: MSR_MISC_PWR_MGMT: 0x00000100 (ENable-EIST_Coordination DISable-EPB ENable-OOB) cpu0: MSR_IA32_POWER_CTL: 0x00000000 (C1E auto-promotion: DISabled) C-state Pre-wake: ENabled cpu0: MSR_PKG_CST_CONFIG_CONTROL: 0x00008000 (locked, pkg-cstate-limit=0 (pc0)) /dev/cpu_dma_latency: 2000000000 usec (default) current_driver: intel_idle current_governor: menu current_governor_ro: menu cpu0: POLL: CPUIDLE CORE POLL IDLE cpu0: C1: MWAIT 0x00 cpu0: C1E: MWAIT 0x01 cpu0: C6: MWAIT 0x20 cpu0: MSR_PKGC6_IRTL: 0x00000000 (NOTvalid, 0 ns) RAPL_PKG_ENERGY MSR(0x611) == ZERO: disabling all RAPL MSRs cpu0: MSR_MISC_FEATURE_CONTROL: 0x00000000 (L2-Prefetch L2-Prefetch-pair L1-Prefetch L1-IP-Prefetch) add_msr_perf_counter: msr/aperf: 6 (cpu: 0) add_msr_perf_counter: msr/aperf: 7 (cpu: 1) add_msr_perf_counter: msr/aperf: 8 (cpu: 2) add_msr_perf_counter: msr/aperf: 9 (cpu: 3) add_msr_perf_counter: msr/aperf: 10 (cpu: 4) add_msr_perf_counter: msr/aperf: 11 (cpu: 5) add_msr_perf_counter: msr/aperf: 12 (cpu: 6) add_msr_perf_counter: msr/aperf: 13 (cpu: 7) add_msr_perf_counter: msr/mperf: 14 (cpu: 0) add_msr_perf_counter: msr/mperf: 15 (cpu: 1) add_msr_perf_counter: msr/mperf: 16 (cpu: 2) add_msr_perf_counter: msr/mperf: 17 (cpu: 3) add_msr_perf_counter: msr/mperf: 18 (cpu: 4) add_msr_perf_counter: msr/mperf: 19 (cpu: 5) add_msr_perf_counter: msr/mperf: 20 (cpu: 6) add_msr_perf_counter: msr/mperf: 21 (cpu: 7) add_msr_perf_counter: msr/smi: 22 (cpu: 0) add_msr_perf_counter: msr/smi: 23 (cpu: 1) add_msr_perf_counter: msr/smi: 24 (cpu: 2) add_msr_perf_counter: msr/smi: 25 (cpu: 3) add_msr_perf_counter: msr/smi: 26 (cpu: 4) add_msr_perf_counter: msr/smi: 27 (cpu: 5) add_msr_perf_counter: msr/smi: 28 (cpu: 6) add_msr_perf_counter: msr/smi: 29 (cpu: 7) Failed to parse perf counter info /sys/bus/event_source/devices/power/events/energy-pkg.scale Failed to parse perf counter info /sys/bus/event_source/devices/power/events/energy-pkg.scale Failed to parse perf counter info /sys/bus/event_source/devices/power/events/energy-cores.scale Failed to parse perf counter info /sys/bus/event_source/devices/power/events/energy-ram.scale Failed to parse perf counter info /sys/bus/event_source/devices/power/events/energy-gpu.scale Failed to parse perf counter info /sys/bus/event_source/devices/power/events/energy-psys.scale Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_core/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type Failed to parse perf counter info /sys/bus/event_source/devices/cstate_pkg/type usec Time_Of_Day_Seconds Core CPU APIC X2APIC Avg_MHz Busy% Bzy_MHz TSC_MHz IPC IRQ NMI SMI LLCkRPS LLC%hit POLL- POLL C1- C1 C1+ C1E- C1E C1E+ C6- C6 C6+ POLL% C1% C1E% C6% CPU%c1 CPU%c6 1632 1764666333.980537 - - - - 17 0.49 3502 2400 0.08 517 0 0 0 -nan 0 0 0 0 0 3 221 59 643 10722 0 0.00 0.00 0.17 99.70 0.35 99.00 148 1764666333.979303 0 0 0 0 20 0.58 3506 2400 0.12 99 0 0 0 -nan 0 0 0 0 0 0 24 11 130 1398 0 0.00 0.00 0.21 99.61 0.30 98.99 94 1764666333.979428 0 4 1 1 17 0.48 3504 2400 0.12 13 0 0 0 -nan 0 0 0 0 0 0 5 2 83 1337 0 0.00 0.00 0.04 99.84 0.30 169 1764666333.979757 1 1 2 2 17 0.48 3502 2400 0.06 65 0 0 0 -nan 0 0 0 0 0 0 10 2 89 1353 0 0.00 0.00 0.07 99.80 0.16 99.22 93 1764666333.979898 1 5 3 3 16 0.45 3501 2400 0.05 37 0 0 0 -nan 0 0 0 0 0 0 5 2 82 1337 0 0.00 0.00 0.04 99.86 0.16 106 1764666333.980159 2 2 4 4 15 0.44 3498 2400 0.05 25 0 0 0 -nan 0 0 0 0 0 1 9 4 30 1288 0 0.00 0.00 0.11 99.80 0.15 99.28 91 1764666333.980281 2 6 5 5 15 0.43 3499 2400 0.05 29 0 0 0 -nan 0 0 0 0 0 0 10 1 35 1290 0 0.00 0.00 0.05 99.86 0.15 104 1764666333.980417 3 3 6 6 19 0.55 3501 2400 0.08 172 0 0 0 -nan 0 0 0 0 0 1 116 29 109 1369 0 0.00 0.00 0.64 99.18 0.78 98.50 90 1764666333.980537 3 7 7 7 17 0.48 3504 2400 0.08 77 0 0 0 -nan 0 0 0 0 0 1 42 8 85 1350 0 0.00 0.00 0.21 99.67 0.78 usec Time_Of_Day_Seconds Core CPU APIC X2APIC Avg_MHz Busy% Bzy_MHz TSC_MHz IPC IRQ NMI SMI LLCkRPS LLC%hit POLL- POLL C1- C1 C1+ C1E- C1E C1E+ C6- C6 C6+ POLL% C1% C1E% C6% CPU%c1 CPU%c6 1894 1764666338.987679 - - - - 16 0.47 3501 2400 0.06 370 0 0 0 -nan 0 0 0 0 0 0 111 49 449 10553 0 0.00 0.00 0.12 99.76 0.29 99.08 142 1764666338.986310 0 0 0 0 20 0.58 3501 2400 0.08 134 0 0 0 -nan 0 0 0 0 0 0 47 30 113 1389 0 0.00 0.00 0.55 99.27 0.63 98.65 98 1764666338.986439 0 4 1 1 16 0.46 3497 2400 0.05 8 0 0 0 -nan 0 0 0 0 0 0 3 0 69 1326 0 0.00 0.00 0.02 99.89 0.63 162 1764666338.986756 1 1 2 2 16 0.46 3502 2400 0.06 41 0 0 0 -nan 0 0 0 0 0 0 6 0 49 1312 0 0.00 0.00 0.03 99.86 0.08 99.34 95 1764666338.986903 1 5 3 3 15 0.43 3501 2400 0.05 8 0 0 0 -nan 0 0 0 0 0 0 2 0 28 1286 0 0.00 0.00 0.01 99.91 0.08 109 1764666338.987175 2 2 4 4 16 0.44 3499 2400 0.05 28 0 0 0 -nan 0 0 0 0 0 0 2 1 36 1295 0 0.00 0.00 0.02 99.89 0.06 99.38 94 1764666338.987314 2 6 5 5 15 0.44 3500 2400 0.05 25 0 0 0 -nan 0 0 0 0 0 0 1 0 36 1293 0 0.00 0.00 0.01 99.90 0.06 104 1764666338.987548 3 3 6 6 16 0.47 3503 2400 0.05 76 0 0 0 -nan 0 0 0 0 0 0 37 11 57 1321 0 0.00 0.00 0.24 99.64 0.40 98.95 92 1764666338.987679 3 7 7 7 17 0.49 3507 2400 0.09 50 0 0 0 -nan 0 0 0 0 0 0 13 7 61 1331 0 0.00 0.00 0.11 99.75 0.40 usec Time_Of_Day_Seconds Core CPU APIC X2APIC Avg_MHz Busy% Bzy_MHz TSC_MHz IPC IRQ NMI SMI LLCkRPS LLC%hit POLL- POLL C1- C1 C1+ C1E- C1E C1E+ C6- C6 C6+ POLL% C1% C1E% C6% CPU%c1 CPU%c6 1824 1764666343.994695 - - - - 16 0.47 3501 2400 0.06 311 0 0 0 -nan 0 0 0 0 0 1 86 36 439 10519 0 0.00 0.00 0.09 99.80 0.23 99.15 169 1764666343.993351 0 0 0 0 21 0.59 3502 2400 0.08 114 0 0 0 -nan 0 0 0 0 0 0 52 29 83 1355 0 0.00 0.00 0.49 99.32 0.58 98.70 93 1764666343.993469 0 4 1 1 16 0.46 3497 2400 0.05 20 0 0 0 -nan 0 0 0 0 0 0 7 1 61 1315 0 0.00 0.00 0.04 99.86 0.58 139 1764666343.993843 1 1 2 2 17 0.47 3503 2400 0.05 60 0 0 0 -nan 0 0 0 0 0 0 5 0 68 1332 0 0.00 0.00 0.03 99.85 0.10 99.30 95 1764666343.993969 1 5 3 3 15 0.44 3501 2400 0.05 11 0 0 0 -nan 0 0 0 0 0 0 3 1 39 1293 0 0.00 0.00 0.03 99.88 0.10 103 1764666343.994201 2 2 4 4 17 0.48 3499 2400 0.06 67 0 0 0 -nan 0 0 0 0 0 1 10 3 94 1351 0 0.00 0.00 0.07 99.80 0.14 99.26 92 1764666343.994334 2 6 5 5 15 0.42 3497 2400 0.05 7 0 0 0 -nan 0 0 0 0 0 0 1 0 57 1314 0 0.00 0.00 0.00 99.91 0.14 107 1764666343.994572 3 3 6 6 15 0.44 3502 2400 0.05 21 0 0 0 -nan 0 0 0 0 0 0 6 1 19 1280 0 0.00 0.00 0.05 99.86 0.09 99.33 95 1764666343.994695 3 7 7 7 16 0.44 3504 2400 0.07 11 0 0 0 -nan 0 0 0 0 0 0 2 1 18 1279 0 0.00 0.00 0.02 99.88 0.09 usec Time_Of_Day_Seconds Core CPU APIC X2APIC Avg_MHz Busy% Bzy_MHz TSC_MHz IPC IRQ NMI SMI LLCkRPS LLC%hit POLL- POLL C1- C1 C1+ C1E- C1E C1E+ C6- C6 C6+ POLL% C1% C1E% C6% CPU%c1 CPU%c6 1754 1764666349.001690 - - - - 17 0.48 3500 2400 0.06 430 0 0 0 -nan 0 0 0 0 0 0 87 39 532 10614 0 0.00 0.00 0.09 99.79 0.22 99.15 146 1764666349.000359 0 0 0 0 18 0.52 3498 2400 0.06 69 0 0 0 -nan 0 0 0 0 0 0 5 5 74 1344 0 0.00 0.00 0.07 99.80 0.16 99.19 96 1764666349.000500 0 4 1 1 17 0.47 3499 2400 0.05 32 0 0 0 -nan 0 0 0 0 0 0 6 2 62 1315 0 0.00 0.00 0.04 99.85 0.16 128 1764666349.000765 1 1 2 2 17 0.48 3502 2400 0.06 59 0 0 0 -nan 0 0 0 0 0 0 1 0 72 1338 0 0.00 0.00 0.00 99.87 0.49 98.83 95 1764666349.000902 1 5 3 3 18 0.52 3505 2400 0.07 99 0 0 0 -nan 0 0 0 0 0 0 58 27 64 1324 0 0.00 0.00 0.46 99.37 0.49 112 1764666349.001167 2 2 4 4 17 0.48 3498 2400 0.06 73 0 0 0 -nan 0 0 0 0 0 0 6 2 89 1346 0 0.00 0.00 0.05 99.82 0.11 99.29 93 1764666349.001306 2 6 5 5 15 0.43 3498 2400 0.05 16 0 0 0 -nan 0 0 0 0 0 0 1 0 57 1314 0 0.00 0.00 0.00 99.91 0.11 108 1764666349.001574 3 3 6 6 17 0.48 3502 2400 0.06 61 0 0 0 -nan 0 0 0 0 0 0 6 2 74 1332 0 0.00 0.00 0.04 99.83 0.10 99.27 90 1764666349.001690 3 7 7 7 16 0.45 3503 2400 0.07 21 0 0 0 -nan 0 0 0 0 0 0 4 1 40 1301 0 0.00 0.00 0.02 99.88 0.10 usec Time_Of_Day_Seconds Core CPU APIC X2APIC Avg_MHz Busy% Bzy_MHz TSC_MHz IPC IRQ NMI SMI LLCkRPS LLC%hit POLL- POLL C1- C1 C1+ C1E- C1E C1E+ C6- C6 C6+ POLL% C1% C1E% C6% CPU%c1 CPU%c6 1978 1764666354.008912 - - - - 17 0.48 3499 2400 0.06 410 0 0 0 -nan 0 0 0 0 0 0 108 43 556 10701 0 0.00 0.00 0.11 99.77 0.26 99.09 141 1764666354.007538 0 0 0 0 20 0.56 3499 2400 0.06 100 0 0 0 -nan 0 0 0 0 0 0 45 22 65 1341 0 0.00 0.00 0.40 99.44 0.46 98.83 102 1764666354.007684 0 4 1 1 17 0.50 3497 2400 0.05 55 0 0 0 -nan 0 0 0 0 0 0 4 1 73 1328 0 0.00 0.00 0.04 99.84 0.46 135 1764666354.007989 1 1 2 2 16 0.46 3499 2400 0.06 44 0 0 0 -nan 0 0 0 0 0 0 5 1 51 1314 0 0.00 0.00 0.03 99.86 0.20 99.18 111 1764666354.008132 1 5 3 3 16 0.47 3499 2400 0.05 46 0 0 0 -nan 0 0 0 0 0 0 25 8 40 1296 0 0.00 0.00 0.16 99.73 0.20 107 1764666354.008362 2 2 4 4 18 0.51 3501 2400 0.07 80 0 0 0 -nan 0 0 0 0 0 0 14 6 141 1411 0 0.00 0.00 0.14 99.73 0.24 99.12 97 1764666354.008502 2 6 5 5 16 0.45 3499 2400 0.05 20 0 0 0 -nan 0 0 0 0 0 0 3 0 117 1379 0 0.00 0.00 0.02 99.89 0.24 109 1764666354.008776 3 3 6 6 17 0.48 3501 2400 0.06 47 0 0 0 -nan 0 0 0 0 0 0 6 1 41 1325 0 0.00 0.00 0.04 99.85 0.15 99.22 97 1764666354.008912 3 7 7 7 16 0.46 3500 2400 0.07 18 0 0 0 -nan 0 0 0 0 0 0 6 4 28 1307 0 0.00 0.00 0.08 99.82 0.15 ``` ________________________________________ From: Len Brown <lenb@kernel.org> Sent: Monday, December 1, 2025 8:14 PM To: Ehlert, Emily Cc: Zhang, Rui; linux-pm@vger.kernel.org; linux-kernel@vger.kernel.org; Emily Ehlert Subject: RE: [EXTERNAL] [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you can confirm the sender and know the content is safe. > I'll send you a patch for this later today. Please try the latest turbostat in my public tree: git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux.git turbostat The top commit should be this: commit 4b295ae45d3e6eb4d811c8fc2408b9e4e91c9474 (turbostat, next) Author: Len Brown <len.brown@intel.com> Date: Sun Nov 30 00:11:22 2025 -0500 tools/power turbostat: Validate that RAPL MSRs really exist Even though the platform->plat_rapl_msrs enumeration may be accurate, a VM may deny access to the underlying MSRs. Probe if PKG_ENERGY is readable and non-zero. If no, ignore all RAPL MSRs. Reported-by: Emily Ehlert <ehemily@amazon.de> Signed-off-by: Len Brown <len.brown@intel.com> Amazon Web Services Development Center Germany GmbH Tamara-Danz-Str. 13 10243 Berlin Geschaeftsfuehrung: Christian Schlaeger, Christof Hellmis Eingetragen am Amtsgericht Charlottenburg unter HRB 257764 B Sitz: Berlin Ust-ID: DE 365 538 597 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails 2025-12-02 9:09 ` Ehlert, Emily @ 2025-12-02 16:20 ` Len Brown 0 siblings, 0 replies; 11+ messages in thread From: Len Brown @ 2025-12-02 16:20 UTC (permalink / raw) To: Ehlert, Emily Cc: Zhang, Rui, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Emily Ehlert On Tue, Dec 2, 2025 at 4:09 AM Ehlert, Emily <ehemily@amazon.de> wrote: > - if (msr_value == 0) > + if (msr_value == 0) { Thanks! (and sorry for that careless mistake!) > Log output of turbostat with this patch applied: ... > RAPL_PKG_ENERGY MSR(0x611) == ZERO: disabling all RAPL MSRs Looks good -- thanks! -Len ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] tools/power/turbostat: Set per_cpu_msr_sum to NULL after free 2025-11-13 19:16 [PATCH 1/2] tools/power/turbostat: Set per_cpu_msr_sum to NULL after free Emily Ehlert 2025-11-13 19:16 ` [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails Emily Ehlert @ 2025-11-25 18:06 ` Len Brown 1 sibling, 0 replies; 11+ messages in thread From: Len Brown @ 2025-11-25 18:06 UTC (permalink / raw) To: Emily Ehlert; +Cc: linux-pm, linux-kernel, Emily Ehlert applied, thanks! On Thu, Nov 13, 2025 at 2:16 PM Emily Ehlert <ehemily@amazon.de> wrote: > > From: Emily Ehlert <ehemily@amazon.com> > > Set per_cpu_msr_sum to NULL after freeing it in the error path > of msr_sum_record() to prevent potential use-after-free issues. > > Signed-off-by: Emily Ehlert <ehemily@amazon.com> > --- > tools/power/x86/turbostat/turbostat.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c > index 72a280e7a9d5..9a2be201a3a6 100644 > --- a/tools/power/x86/turbostat/turbostat.c > +++ b/tools/power/x86/turbostat/turbostat.c > @@ -6673,6 +6673,7 @@ void msr_sum_record(void) > timer_delete(timerid); > release_msr: > free(per_cpu_msr_sum); > + per_cpu_msr_sum = NULL; > } > > /* > -- > 2.47.3 > > > > > Amazon Web Services Development Center Germany GmbH > Tamara-Danz-Str. 13 > 10243 Berlin > Geschaeftsfuehrung: Christian Schlaeger, Christof Hellmis > Eingetragen am Amtsgericht Charlottenburg unter HRB 257764 B > Sitz: Berlin > Ust-ID: DE 365 538 597 > -- Len Brown, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2025-12-02 16:21 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-11-13 19:16 [PATCH 1/2] tools/power/turbostat: Set per_cpu_msr_sum to NULL after free Emily Ehlert 2025-11-13 19:16 ` [PATCH 2/2] tools/power/turbostat: Fix division by zero when TDP calculation fails Emily Ehlert 2025-11-25 18:13 ` Len Brown 2025-11-28 13:59 ` Ehlert, Emily 2025-11-30 5:27 ` Len Brown 2025-12-01 8:55 ` Ehlert, Emily 2025-12-01 17:07 ` Len Brown 2025-12-01 19:14 ` Len Brown 2025-12-02 9:09 ` Ehlert, Emily 2025-12-02 16:20 ` Len Brown 2025-11-25 18:06 ` [PATCH 1/2] tools/power/turbostat: Set per_cpu_msr_sum to NULL after free Len Brown
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.