From: Conor Dooley <conor@kernel.org>
To: netdev@vger.kernel.org
Cc: conor@kernel.org, Conor Dooley <conor.dooley@microchip.com>,
Valentina.FernandezAlanis@microchip.com,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Daire McNamara <daire.mcnamara@microchip.com>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Claudiu Beznea <claudiu.beznea@tuxon.dev>,
Richard Cochran <richardcochran@gmail.com>,
Samuel Holland <samuel.holland@sifive.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org,
Neil Armstrong <narmstrong@baylibre.com>,
Dave Stevenson <dave.stevenson@raspberrypi.com>,
Sean Anderson <sean.anderson@linux.dev>,
Vineeth Karumanchi <vineeth.karumanchi@amd.com>,
Abin Joseph <abin.joseph@amd.com>
Subject: [RFC net-next v1 1/7] riscv: dts: microchip: add tsu clock to macb on mpfs
Date: Thu, 20 Nov 2025 16:26:03 +0000 [thread overview]
Message-ID: <20251120-ahead-filth-d4d9c560d213@spud> (raw)
In-Reply-To: <20251120-jubilant-purposely-67ec45ce4e2f@spud>
From: Conor Dooley <conor.dooley@microchip.com>
In increment mode, the tsu clock for the macb is provided separately to
the pck, usually the same clock as the reference to the rtc provided by
an off-chip oscillator. pclk is 150 MHz typically, and the reference is
either 100 MHz or 125 MHz, so having the tsu clock is required for
correct rate selection.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/boot/dts/microchip/Makefile.orig | 26 +++++++++++++++++++++
arch/riscv/boot/dts/microchip/mpfs.dtsi | 8 +++----
2 files changed, 30 insertions(+), 4 deletions(-)
create mode 100644 arch/riscv/boot/dts/microchip/Makefile.orig
diff --git a/arch/riscv/boot/dts/microchip/Makefile.orig b/arch/riscv/boot/dts/microchip/Makefile.orig
new file mode 100644
index 000000000000..e94f4096fd40
--- /dev/null
+++ b/arch/riscv/boot/dts/microchip/Makefile.orig
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0
+<<<<<<< HEAD
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-disco-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit-prod.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
+||||||| constructed fake ancestor
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
+=======
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-beaglev-fire.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-icicle-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-m100pfsevp.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-polarberry.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-sev-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-tysom-m.dtb
+>>>>>>> riscv: dts: microchip: remove POLARFIRE mention in Makefile
+dtb-$(CONFIG_ARCH_MICROCHIP) += pic64gx-curiosity-kit.dtb
diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
index 9883ca3554c5..68e130550130 100644
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -445,8 +445,8 @@ mac0: ethernet@20110000 {
interrupt-parent = <&plic>;
interrupts = <64>, <65>, <66>, <67>, <68>, <69>;
local-mac-address = [00 00 00 00 00 00];
- clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>;
- clock-names = "pclk", "hclk";
+ clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>, <&refclk>;
+ clock-names = "pclk", "hclk", "tsu_clk";
resets = <&clkcfg CLK_MAC0>;
status = "disabled";
};
@@ -459,8 +459,8 @@ mac1: ethernet@20112000 {
interrupt-parent = <&plic>;
interrupts = <70>, <71>, <72>, <73>, <74>, <75>;
local-mac-address = [00 00 00 00 00 00];
- clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>;
- clock-names = "pclk", "hclk";
+ clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>, <&refclk>;
+ clock-names = "pclk", "hclk", "tsu_clk";
resets = <&clkcfg CLK_MAC1>;
status = "disabled";
};
--
2.51.0
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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: netdev@vger.kernel.org
Cc: conor@kernel.org, Conor Dooley <conor.dooley@microchip.com>,
Valentina.FernandezAlanis@microchip.com,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Daire McNamara <daire.mcnamara@microchip.com>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Claudiu Beznea <claudiu.beznea@tuxon.dev>,
Richard Cochran <richardcochran@gmail.com>,
Samuel Holland <samuel.holland@sifive.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org,
Neil Armstrong <narmstrong@baylibre.com>,
Dave Stevenson <dave.stevenson@raspberrypi.com>,
Sean Anderson <sean.anderson@linux.dev>,
Vineeth Karumanchi <vineeth.karumanchi@amd.com>,
Abin Joseph <abin.joseph@amd.com>
Subject: [RFC net-next v1 1/7] riscv: dts: microchip: add tsu clock to macb on mpfs
Date: Thu, 20 Nov 2025 16:26:03 +0000 [thread overview]
Message-ID: <20251120-ahead-filth-d4d9c560d213@spud> (raw)
In-Reply-To: <20251120-jubilant-purposely-67ec45ce4e2f@spud>
From: Conor Dooley <conor.dooley@microchip.com>
In increment mode, the tsu clock for the macb is provided separately to
the pck, usually the same clock as the reference to the rtc provided by
an off-chip oscillator. pclk is 150 MHz typically, and the reference is
either 100 MHz or 125 MHz, so having the tsu clock is required for
correct rate selection.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/boot/dts/microchip/Makefile.orig | 26 +++++++++++++++++++++
arch/riscv/boot/dts/microchip/mpfs.dtsi | 8 +++----
2 files changed, 30 insertions(+), 4 deletions(-)
create mode 100644 arch/riscv/boot/dts/microchip/Makefile.orig
diff --git a/arch/riscv/boot/dts/microchip/Makefile.orig b/arch/riscv/boot/dts/microchip/Makefile.orig
new file mode 100644
index 000000000000..e94f4096fd40
--- /dev/null
+++ b/arch/riscv/boot/dts/microchip/Makefile.orig
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0
+<<<<<<< HEAD
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-disco-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit-prod.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
+||||||| constructed fake ancestor
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
+=======
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-beaglev-fire.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-icicle-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-m100pfsevp.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-polarberry.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-sev-kit.dtb
+dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-tysom-m.dtb
+>>>>>>> riscv: dts: microchip: remove POLARFIRE mention in Makefile
+dtb-$(CONFIG_ARCH_MICROCHIP) += pic64gx-curiosity-kit.dtb
diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
index 9883ca3554c5..68e130550130 100644
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -445,8 +445,8 @@ mac0: ethernet@20110000 {
interrupt-parent = <&plic>;
interrupts = <64>, <65>, <66>, <67>, <68>, <69>;
local-mac-address = [00 00 00 00 00 00];
- clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>;
- clock-names = "pclk", "hclk";
+ clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>, <&refclk>;
+ clock-names = "pclk", "hclk", "tsu_clk";
resets = <&clkcfg CLK_MAC0>;
status = "disabled";
};
@@ -459,8 +459,8 @@ mac1: ethernet@20112000 {
interrupt-parent = <&plic>;
interrupts = <70>, <71>, <72>, <73>, <74>, <75>;
local-mac-address = [00 00 00 00 00 00];
- clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>;
- clock-names = "pclk", "hclk";
+ clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>, <&refclk>;
+ clock-names = "pclk", "hclk", "tsu_clk";
resets = <&clkcfg CLK_MAC1>;
status = "disabled";
};
--
2.51.0
next prev parent reply other threads:[~2025-11-20 16:26 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-20 16:26 [RFC net-next v1 0/7] highly rfc macb usrio/tsu patches Conor Dooley
2025-11-20 16:26 ` Conor Dooley
2025-11-20 16:26 ` Conor Dooley [this message]
2025-11-20 16:26 ` [RFC net-next v1 1/7] riscv: dts: microchip: add tsu clock to macb on mpfs Conor Dooley
2025-11-20 16:26 ` [RFC net-next v1 2/7] net: macb: warn on pclk use as a tsu_clk fallback Conor Dooley
2025-11-20 16:26 ` Conor Dooley
2025-11-20 16:26 ` [RFC net-next v1 3/7] net: macb: rename macb_default_usrio to at91_default_usrio as not all platforms have mii mode control in usrio Conor Dooley
2025-11-20 16:26 ` Conor Dooley
2025-11-20 16:26 ` [RFC net-next v1 4/7] net: macb: np4 doesn't need a usrio pointer Conor Dooley
2025-11-20 16:26 ` Conor Dooley
2025-11-20 16:26 ` [RFC net-next v1 5/7] dt-bindings: net: macb: add property indicating timer adjust mode Conor Dooley
2025-11-20 16:26 ` Conor Dooley
2025-11-20 16:26 ` [RFC net-next v1 6/7] net: macb: afaict, the driver doesn't support tsu " Conor Dooley
2025-11-20 16:26 ` Conor Dooley
2025-11-20 16:26 ` [RFC net-next v1 7/7] net: macb: add mpfs specific usrio configuration Conor Dooley
2025-11-20 16:26 ` Conor Dooley
2025-11-20 16:31 ` [RFC net-next v1 0/7] highly rfc macb usrio/tsu patches Conor Dooley
2025-11-20 16:31 ` Conor Dooley
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