[PATCH 0/2] OpenSBI FWFT ADUE update fix

[PATCH 0/2] OpenSBI FWFT ADUE update fix

[Anup Patel]

As-per latest RISC-V Privileged ISA spec, TLBs must be flushed
upon FWFT ADUE changes hence this series.
(Refer, https://lists.riscv.org/g/tech-privileged/message/2728)

This series based upon the "OpenSBI hart protection abstraction"
series.

These patches can also found in fwft_adue_fix_v1 branch at:
https://github.com/avpatel/opensbi.git

Andrew Waterman (2):
  lib: sbi: Expose __sbi_sfence_vma_all() function
  lib: sbi: Flush TLBs upon FWFT ADUE change

 include/sbi/sbi_tlb.h  |  2 ++
 lib/sbi/sbi_fwft.c     | 13 ++++++++++++-
 lib/sbi/sbi_hart_pmp.c |  3 ++-
 lib/sbi/sbi_tlb.c      |  4 ++--
 4 files changed, 18 insertions(+), 4 deletions(-)

-- 
2.43.0


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[PATCH 1/2] lib: sbi: Expose __sbi_sfence_vma_all() function

[Anup Patel]

From: Andrew Waterman <andrew@sifive.com>

The __sbi_sfence_vma_all() can be shared by different parts of
OpenSBI so rename __tlb_flush_all() to __sbi_sfence_vma_all()
and make it global function.

Signed-off-by: Andrew Waterman <andrew@sifive.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_tlb.h  | 2 ++
 lib/sbi/sbi_hart_pmp.c | 3 ++-
 lib/sbi/sbi_tlb.c      | 4 ++--
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index 2c50fe85..3936e857 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -54,6 +54,8 @@ do { \
 
 #define SBI_TLB_INFO_SIZE		sizeof(struct sbi_tlb_info)
 
+void __sbi_sfence_vma_all();
+
 int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo);
 
 int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot);
diff --git a/lib/sbi/sbi_hart_pmp.c b/lib/sbi/sbi_hart_pmp.c
index ab96e2fa..1655d87c 100644
--- a/lib/sbi/sbi_hart_pmp.c
+++ b/lib/sbi/sbi_hart_pmp.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_hfence.h>
 #include <sbi/sbi_math.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_tlb.h>
 #include <sbi/riscv_asm.h>
 
 /*
@@ -74,7 +75,7 @@ static void sbi_hart_pmp_fence(void)
 	 * conditions.
 	 */
 	if (misa_extension('S')) {
-		__asm__ __volatile__("sfence.vma");
+		__sbi_sfence_vma_all();
 
 		/*
 		 * If hypervisor mode is supported, flush caching
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 01b31f4e..ada60c32 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -29,7 +29,7 @@ static unsigned long tlb_fifo_off;
 static unsigned long tlb_fifo_mem_off;
 static unsigned long tlb_range_flush_limit;
 
-static void tlb_flush_all(void)
+void __sbi_sfence_vma_all(void)
 {
 	__asm__ __volatile("sfence.vma");
 }
@@ -86,7 +86,7 @@ static void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo)
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_RCVD);
 
 	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
-		tlb_flush_all();
+		__sbi_sfence_vma_all();
 		return;
 	}
 
-- 
2.43.0


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[PATCH 2/2] lib: sbi: Flush TLBs upon FWFT ADUE change

[Anup Patel]

From: Andrew Waterman <andrew@sifive.com>

A clarification has been added to the RISC-V privileged specification
regarding synchronization requirements when xenvcfg.ADUE changes.
(Refer, the following commit in the RISC-V Privileged ISA spec
https://github.com/riscv/riscv-isa-manual/commit/4e540263db8ae3a27d132a1752cc0fad222facd8)

As-per these requirements, the SBI FWFT ADUE implementation must
flush TLBs upon changes in ADUE state on a hart.

Signed-off-by: Andrew Waterman <andrew@sifive.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/sbi/sbi_fwft.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index a2aefb9a..373140b7 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -13,8 +13,10 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_heap.h>
+#include <sbi/sbi_hfence.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
+#include <sbi/sbi_tlb.h>
 #include <sbi/sbi_types.h>
 
 #include <sbi/riscv_asm.h>
@@ -167,7 +169,16 @@ static int fwft_adue_supported(struct fwft_config *conf)
 
 static int fwft_set_adue(struct fwft_config *conf, unsigned long value)
 {
-	return fwft_menvcfg_set_bit(value, ENVCFG_ADUE_SHIFT);
+	int res = fwft_menvcfg_set_bit(value, ENVCFG_ADUE_SHIFT);
+
+	if (res == SBI_OK) {
+		__sbi_sfence_vma_all();
+
+		if (misa_extension('H'))
+			__sbi_hfence_gvma_all();
+	}
+
+	return res;
 }
 
 static int fwft_get_adue(struct fwft_config *conf, unsigned long *value)
-- 
2.43.0


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Re: [PATCH 0/2] OpenSBI FWFT ADUE update fix

[Anup Patel]

On Thu, Nov 27, 2025 at 4:51 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> As-per latest RISC-V Privileged ISA spec, TLBs must be flushed
> upon FWFT ADUE changes hence this series.
> (Refer, https://lists.riscv.org/g/tech-privileged/message/2728)
>
> This series based upon the "OpenSBI hart protection abstraction"
> series.
>
> These patches can also found in fwft_adue_fix_v1 branch at:
> https://github.com/avpatel/opensbi.git
>
> Andrew Waterman (2):
>   lib: sbi: Expose __sbi_sfence_vma_all() function
>   lib: sbi: Flush TLBs upon FWFT ADUE change

Applied this series to the riscv/opensbi repo.

Regards,
Anup

>
>  include/sbi/sbi_tlb.h  |  2 ++
>  lib/sbi/sbi_fwft.c     | 13 ++++++++++++-
>  lib/sbi/sbi_hart_pmp.c |  3 ++-
>  lib/sbi/sbi_tlb.c      |  4 ++--
>  4 files changed, 18 insertions(+), 4 deletions(-)
>
> --
> 2.43.0
>

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